REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. – gt 02-07-03 R. Monnin B Make change to power supply current test maximum limits as specified under table I. - ro 03-08-05 R. Monnin C Make change to VIH and VIL limits as specified under paragraph 1.4. - ro 03-11-05 R. Monnin D Redrawn. Update paragraphs to MIL-PRF-38535 requirements. - drw 15-12-03 Charles F. Saffle REV SHEET REV SHEET REV STATUS REV OF SHEETS SHEET PMIC N/A PREPARED BY D D D D D D D D D D D D D 1 2 3 4 5 6 7 8 9 10 11 12 13 Rick Officer STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http://www.landandmaritime.dla.mil CHECKED BY Rajesh Pithadia APPROVED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A Raymond Monnin DRAWING APPROVAL DATE 99-12-17 REVISION LEVEL D MICROCIRCUIT, DIGITAL-LINEAR, DUAL, 12-BIT, PROGRAMMABLE, DIGITAL-TO-ANALOG CONVERTER WITH INTERNAL VOLTAGE REFERENCE, MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 5962-99576 1 OF 13 5962-E028-16 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 99576 Federal stock class designator \ RHA designator (see 1.2.1) 01 Q P A Device type (see 1.2.2) Device class designator (see 1.2.3) Case outline (see 1.2.4) Lead finish (see 1.2.5) / \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type. The device type identifies the circuit function as follows: Device type Generic number 01 Circuit function TLV5638M Dual, 12-bit, programmable digital-to-analog converter with power down and internal reference. 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 as follows: Outline letter P 2 Descriptive designator Terminals GDIP1-T8 or CDIP2-T8 CQCC1-N20 8 20 Package style Dual-in-line Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-99576 A REVISION LEVEL D SHEET 2 1.3 Absolute maximum ratings. 1/ Supply voltage (VDD to AGND) ........................................................................... 7 V Digital input voltage range to AGND ................................................................... -0.3 V VDD +0.3 V Reference input voltage range to AGND ............................................................. -0.3 V VDD +0.3 V Power dissipation (PD): (TA ≤ 25°C) Case P ............................................................................................................. Case 2 ............................................................................................................. Junction temperature (TJ) ................................................................................... Storage temperature range .................................................................................. Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds ........................ Thermal resistance, junction-to-case (θJC) ......................................................... 1050 mW 2/ 1375 mW 3/ +150°C -65°C to +150°C 260°C See MIL-STD-1835 1.4 Recommended operating conditions. Supply voltage (VDD): With VDD = 5 V ................................................................................................ 4.5 V to 5.5 V With VDD = 3 V ................................................................................................ 2.7 V to 3.3 V Power on reset (POR) ......................................................................................... 0.55 V to 2.0 V High level digital input voltage (VIH): With VDD = 2.7 V ............................................................................................. 2.0 V minimum With VDD = 5.5 V ............................................................................................. 2.4 V minimum Low level digital input voltage (VIL): With VDD 2.7 V ................................................................................................ 0.6 V maximum With VDD 5.5 V ................................................................................................ 0.8 V maximum Reference voltage (Vref to REF terminal): With VDD = 5 V ................................................................................................ AGND to VDD-1.5 4/ With VDD = 3 V ............................................................................................... AGND to VDD-1.5 4/ Load resistance (RL) ........................................................................................... 2 kΩ Load capacitance (CL) (device type 01) .............................................................. 100 pF maximum Clock frequency (fCLK) (device type 01) ............................................................. 20 MHz Ambient operating temperature range (TA) ......................................................... -55°C to +125°C ________ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ For case P, the derating factor above TA = +25°C is 8.4 mW/°C. 3/ For case 2, the derating factor above TA = +25°C is 11.0 mW/°C. 4/ Due to the x2 output buffer, a reference input voltage ≥ (VDD – 0.4 V) / 2 causes clipping of the transfer function. The output buffer of the internal reference must be disabled, if an external reference in used. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-99576 A REVISION LEVEL D SHEET 3 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Block diagram. The block diagram shall be as specified on figure 2. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-99576 A REVISION LEVEL D SHEET 4 TABLE I. Electrical performance characteristics. Test Symbol Group A subgroups Conditions 1/ -55°C ≤ TA ≤ +125°C unless otherwise specified Device type Limits Min Unit Max Power supply section Power supply current IDD VDD = 5 V, internal reference Fast 1,2,3 01 7.0 mA all inputs = 0 V or VDD, DAC latch = 0X800, no load Slow 3.6 VDD = 3 V, internal reference Fast 6.3 DAC latch = 0X800, no load Slow 3.0 VDD = 5 V, external reference Fast 6.3 DAC latch = 0X800, no load Slow 3.0 VDD = 3 V, external reference Fast 5.7 Slow 2.6 all inputs = 0 V or VDD, all inputs = 0 V or VDD, all inputs = 0 V or VDD, DAC latch = 0X800, no load Reference input section Input voltage range VIN REFIN = 2.048 V 1,2,3 01 0 VDD V –1.5 Digital inputs section High level digital input current Low level digital input current IIH VIN = VDD 1,2,3 01 1 IIL VIN = 0 V 1,2,3 01 -1 Output voltage range VOUT RL = 10 kΩ 1,2,3 01 0 Output load regulation accuracy VOLR µA µA Outputs section VDD V -0.4 1,2,3 VO = 4.096 V, 2.048 V, 01 ±0.25 RL = 2 kΩ % full scale volts See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-99576 A REVISION LEVEL D SHEET 5 TABLE I. Electrical performance characteristics – continued. Test Symbol Group A subgroups Conditions 1/ -55°C ≤ TA ≤ +125°C unless otherwise specified Device type Limits Min Unit Max Static DAC section Resolution RES 1,2,3 01 Integral nonlinearity 2/ INL 1,2,3 01 ±6 LSB Differential nonlinearity 3/ DNL 1,2,3 01 ±1 LSB Zero scale error, 4/ EZS 1,2,3 01 ±24 mV 1,2,3 01 ±0.6 % of FS voltage 4 01 End point adjusted 12 bits offset error at zero scale Gain error EG 5/ Analog output dynamic section Output slew rate SR CL = 100 pF, Slow 1.0 V/µs RL = 10 kΩ, TA = +25°C, Fast 7.0 VOUT from 10% to 90% Signal to noise ratio SNR fS = 480 kSPS, 4,5,6 01 69 dB 4,5,6 01 58 dB 4,5,6 01 4,5,6 01 fOUT = 1 kHz, CL = 100 pF, RL = 10 kΩ Signal to noise + distortion SINAD fS = 480 kSPS, fOUT = 1 kHz, CL = 100 pF, RL = 10 kΩ Total harmonic distortion THD fS = 480 kSPS, -57 dB fOUT = 1 kHz, CL = 100 pF, RL = 10 kΩ Spurious free dynamic range SFDR fS = 480 kSPS, 57 dB fOUT = 1 kHz, CL = 100 pF, RL = 10 kΩ See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-99576 A REVISION LEVEL D SHEET 6 TABLE I. Electrical performance characteristics – continued. Test Symbol Group A subgroups Conditions 1/ -55°C ≤ TA ≤ +125°C unless otherwise specified Device type Limits Min Unit Max Digital input timing section Setup time, CS low before first negative SCLK edge th Setup time, 16 negative SCLK edge before CS rising edge tsu See figure 3 9,10,11 01 10 ns See figure 3 9,10,11 01 10 ns (CSCK) tsu (C16CS) SCLK pulse width high tWH See figure 3 9,10,11 01 25 ns SCLK pulse width low tWL See figure 3 9,10,11 01 25 ns Setup time, data ready before SCLK falling edge tsu(D) See figure 3 9,10,11 01 10 ns Hold time, data held valid after SCLK falling edge th(D) See figure 3 9,10,11 01 5 ns 1/ Unless otherwise specified, VDD = 2.7 V to 5.5 V for device type 01. 2/ The relative accuracy or integral nonlinearity (INL) sometimes referred to as linearity error, is the maximum deviation of the output from the line between zero and full scale excluding the effects of zero code and full scale errors. 3/ The differential nonlinearity (DNL) sometimes referred to as differential error, is the difference between the measure and ideal 1 LSB amplitude change of any two adjacent codes. Monotonic means the output voltage changes in the same direction (or remains constant) as a change in the digital input code. 4/ Zero scale error is the deviation from zero voltage output when the digital input code is zero. 5/ Gain error is the deviation from the ideal output (2 Vref – 1 LSB) with an output load of 10 kΩ excluding the effects of the zero-error. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-99576 A REVISION LEVEL D SHEET 7 Device type Case outlines 01 P Terminal number 2 Terminal symbol 1 DIN NC 2 SCLK DIN 3 CS NC 4 OUTPUT A NC 5 AGND SCLK 6 REF NC 7 OUTPUT B CS 8 VDD NC 9 --- NC 10 --- OUTPUT A 11 --- NC 12 --- AGND 13 --- NC 14 --- NC 15 --- REF 16 --- NC 17 --- OUTPUT B 18 --- NC 19 --- NC 20 --- VDD NC = No connection FIGURE 1. Terminal connections. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-99576 A REVISION LEVEL D SHEET 8 Case outlines P and 2 Terminal symbol AGND CS DIN OUTPUT A OUTPUT B REF SCLK I/O/P P I I O O I/O I P VDD Description Ground Chip select. Digital input active low, used to enable/disable inputs. Digital serial data input DAC A analog output DAC B analog output Analog reference voltage input / output Digital serial clock input Positive power supply FIGURE 1. Terminal connections – continued. FIGURE 2. Block diagram. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-99576 A REVISION LEVEL D SHEET 9 FIGURE 3. Timing waveforms. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-99576 A REVISION LEVEL D SHEET 10 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. 4.2.1 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections, and as specified herein. 4.4.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 7 and 8 in table I, method 5005 of MIL-STD-883 shall be omitted. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-99576 A REVISION LEVEL D SHEET 11 TABLE II. Electrical test requirements. Test requirements Interim electrical parameters (see 4.2) Final electrical parameters (see 4.2) Group A test requirements (see 4.4) Group C end-point electrical parameters (see 4.4) Group D end-point electrical parameters (see 4.4) Group E end-point electrical parameters (see 4.4) Subgroups (in accordance with MIL-PRF-38535, table III) Device Device class Q class V --- --- 1, 2, 3, 4, 5, 6, 9, 10, 11 1/ 1, 2, 3, 4, 5, 6, 9, 10, 11 1/ 1, 2, 3, 4, 5, 6, 9, 10, 11 1, 2, 3, 4, 5, 6, 9, 10, 11 1 1 1 1 --- --- 1/ PDA applies to subgroup 1. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein. 4.4.2.1 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table II herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table I at TA = +25°C ±5°C, after exposure, to the subgroups specified in table II herein. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-99576 A REVISION LEVEL D SHEET 12 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC 5962) should contact DLA Land and Maritime-VA, telephone (614) 692-8108. 6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime-VA, Columbus, Ohio 43218-3990, or telephone (614) 692-0540. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in MIL-HDBK-103 and QML-38535. The vendors listed in MIL-HDBK-103 and QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land and Maritime-VA and have agreed to this drawing. STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-99576 A REVISION LEVEL D SHEET 13 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 15-12-03 Approved sources of supply for SMD 5962-99576 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DLA Land and Maritime-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Standard microcircuit drawing PIN 1/ Vendor CAGE number Vendor similar PIN 2/ 5962-9957601QPA 01295 TLV5638MJB 5962-9957601Q2A 01295 TLV5638MFKB 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. Vendor CAGE number 01295 Vendor name and address Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin.