74HC125; 74HCT125 Quad buffer/line driver; 3-state Rev. 4 — 10 January 2013 Product data sheet 1. General description The 74HC125; 74HCT125 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high impedance OFF-state. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2. Features and benefits Complies with JEDEC standard no. 7A Input levels: The 74HC125: CMOS levels The 74HCT125: TTL levels ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from 40 C to +85 C and from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number 74HC125N Package Temperature range Name Description Version 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1 40 C to +125 C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads; body SOT402-1 width 4.4 mm 74HCT125N 74HC125D 74HCT125D 74HC125DB 74HCT125DB 74HC125PW 74HCT125PW 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state 4. Functional diagram 1Y 2 1A 1 1OE 2 2Y 5 2A 4 2OE 3 1 6 1 3 EN1 5 6 4 9 3A 3Y 8 9 10 3OE 12 4A 8 10 4Y 11 nA 12 nY 11 13 4OE 13 nOE mna229 mna228 Fig 1. Logic symbol Fig 2. mna227 IEC logic symbol Fig 3. Logic diagram (one buffer) 5. Pinning information 5.1 Pinning 74HC125 74HCT125 1OE 1 14 VCC 1A 2 13 4OE 1Y 3 12 4A 2OE 4 11 4Y 2A 5 10 3OE 2Y 6 9 3A GND 7 8 3Y aaa-003129 Fig 4. Pin configuration DIP14, SO14 and (T)SSOP14 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 © NXP B.V. 2013. All rights reserved. 2 of 17 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state 5.2 Pin description Table 2. Pin description Symbol Pin Description 1OE, 2OE, 3OE, 4OE 1, 4, 10, 13 output enable input (active LOW) 1A, 2A, 3A, 4A 2, 5, 9, 12 data input 1Y, 2Y, 3Y, 4Y 3, 6, 8, 11 data output GND 7 ground (0 V) VCC 14 supply voltage 6. Functional description Table 3. Function table[1] Control Input Output nOE nA nY L H [1] L L H H X Z H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current VI < 0.5 V or VI > VCC + 0.5 V [1] IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] IO output current VO = 0.5 V to (VCC + 0.5 V) ICC supply current - +70 mA IGND ground current - 70 mA Tstg storage temperature 65 +150 C DIP14 package - 750 mW SO14 and (T)SSOP14 packages - 500 mW [2] Min Max Unit 0.5 +7 V - 20 mA - 20 mA - 35 mA [2] total power dissipation Ptot [1] Conditions The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For DIP14 package: Ptot derates linearly with 12 mW/K above 70 C. For SO14 package: Ptot derates linearly with 8 mW/K above 70 C. For (T)SSOP14 packages: Ptot derates linearly with 5.5 mW/K above 60 C. 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 © NXP B.V. 2013. All rights reserved. 3 of 17 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V) Symbol Parameter Conditions 74HC125 Min 74HCT125 Typ Max Min Unit Typ Max VCC supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C t/V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions Min Typ VCC = 2.0 V 1.5 VCC = 4.5 V 3.15 VCC = 6.0 V 4.2 VCC = 2.0 V - VCC = 4.5 V - VCC = 6.0 V 40 C to +85 C 40 C to +125 C Unit Max Min Max Min Max 1.2 - 1.5 - 1.5 - V 2.4 - 3.15 - 3.15 - V 3.2 - 4.2 - 4.2 - V 0.8 0.5 - 0.5 - 0.5 V 2.1 1.35 - 1.35 - 1.35 V - 2.8 1.8 - 1.8 - 1.8 V IO = 20 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 20 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 20 A; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = 6.0 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = 7.8 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V IO = 20 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 A; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 6.0 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 7.8 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V 74HC125 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 6.0 V - - 0.1 - 1.0 - 1.0 A IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 6.0 V - - 0.5 - 5.0 - 10.0 A 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 © NXP B.V. 2013. All rights reserved. 4 of 17 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions Min ICC supply current CI input capacitance VI = VCC or GND; IO = 0 A; VCC = 6.0 V 40 C to +85 C 40 C to +125 C Unit Typ Max Min Max Min Max - - 8.0 - 80 - 160 - 3.5 - A pF 74HCT125 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A 4.4 4.5 - 4.4 - 4.4 - V IO = 6 mA 3.98 4.32 - 3.84 - 3.7 - V VOL LOW-level output voltage VI = VIH or VIL; VCC = 4.5 V IO = 20 A - 0 0.1 - 0.1 - 0.1 V IO = 6.0 mA - 0.16 0.26 - 0.33 - 0.4 V II input leakage current VI = VCC or GND; VCC = 5.5 V - - 0.1 - 1.0 - 1.0 A IOZ OFF-state output current VI = VIH or VIL; VCC = 5.5 V; VO = VCC or GND - - 0.5 - 5.0 - 10 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 8.0 - 80 - 160 A ICC additional supply current per input pin; VI = VCC 2.1 V; IO = 0 A; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V - 100 360 - 450 - 490 A CI input capacitance - 3.5 - 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 pF © NXP B.V. 2013. All rights reserved. 5 of 17 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 7. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V - 30 100 - 125 - 150 ns VCC = 4.5 V - 11 20 - 25 - 30 ns VCC = 5 V; CL = 15 pF - 9 - - - - - ns VCC = 6.0 V - 9 17 - 21 - 26 ns VCC = 2.0 V - 41 125 - 155 - 190 ns VCC = 4.5 V - 15 25 - 31 - 38 ns VCC = 6.0 V - 12 21 - 26 - 32 ns VCC = 2.0 V - 41 125 - 155 - 190 ns VCC = 4.5 V - 15 25 - 31 - 38 ns VCC = 6.0 V - 12 21 - 26 - 32 ns VCC = 2.0 V - 14 60 - 75 - 90 ns VCC = 4.5 V - 5 12 - 15 - 18 ns VCC = 6.0 V - 4 10 - 13 - 15 ns - 22 - - - - - pF For type 74HC125 tpd ten tdis tt CPD propagation delay enable time nA to nY; see Figure 5 nOE to nY; see Figure 6 disable time nOE to nY; see Figure 6 transition time power dissipation capacitance 74HC_HCT125 Product data sheet [1] [2] [3] [4] nY; see Figure 5 CL = 50 pF; f = 1 MHz; VI = GND to VCC [5] All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 © NXP B.V. 2013. All rights reserved. 6 of 17 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 7. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max - 15 25 - 31 - 38 ns - 12 - - - - - ns - 15 28 - 35 - 42 ns For type 74HCT125 propagation delay tpd [1] nA to nY; see Figure 5 VCC = 4.5 V VCC = 5 V; CL = 15 pF ten enable time tdis disable time nOE to nY; see Figure 6 [2] nOE to nY; see Figure 6 VCC = 4.5 V [3] VCC = 4.5 V tt transition time nY; see Figure 5 [4] CPD power dissipation capacitance CL = 50 pF; f = 1 MHz; VI = GND to VCC [5] [1] - 15 25 - 31 - 38 ns - 5 12 - 15 - 18 ns - 24 - - - - - pF tpd is the same as tPLH and tPHL. [2] ten is the same as tPZH and tPZL. [3] tdis is the same as tPLZ and tPHZ. [4] tt is the same as tTHL and tTLH. [5] CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD VCC2 fi N + (CL VCC2 fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; (CL VCC2 fo) = sum of outputs. 11. Waveforms VI nA input VM VM GND tPHL tPLH VOH 90 % VM nY output VM 10 % VOL tTHL tTLH aaa-003130 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 5. Propagation delay input (nA) to output (nY) 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 © NXP B.V. 2013. All rights reserved. 7 of 17 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state VI nOE input VM GND tPZL tPLZ VCC output LOW-to-OFF OFF-to-LOW VM 10 % VOL tPHZ VOH tPZH 90 % output HIGH-to-OFF OFF-to-HIGH GND VM outputs enabled outputs disabled outputs enabled aaa-003131 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Enable and disable times Table 8. Measurement points Type Input Output VM VM 74HC125 0.5VCC 0.5VCC 74HCT125 1.3 V 1.3 V 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 © NXP B.V. 2013. All rights reserved. 8 of 17 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC VCC G VI VO RL S1 open DUT CL RT 001aad983 Test data is given in Table 9. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 7. Load circuit for switching times Table 9. Test data Type Input Load S1 position VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 74HC125 VCC 6 ns 15 pF, 50 pF 1 k open GND VCC 74HCT125 3V 6 ns 15 pF, 50 pF 1 k open GND VCC 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 © NXP B.V. 2013. All rights reserved. 9 of 17 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state 12. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil) SOT27-1 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b MH 8 14 pin 1 index E 1 7 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.13 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 2.2 inches 0.17 0.02 0.13 0.068 0.044 0.021 0.015 0.014 0.009 0.77 0.73 0.26 0.24 0.1 0.3 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.087 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT27-1 050G04 MO-001 SC-501-14 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-13 Fig 8. Package outline SOT27-1 (DIP14) 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 © NXP B.V. 2013. All rights reserved. 10 of 17 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.35 0.014 0.0075 0.34 0.16 0.15 0.010 0.057 inches 0.069 0.004 0.049 0.05 0.244 0.039 0.041 0.228 0.016 0.028 0.024 0.01 0.01 0.028 0.004 0.012 θ 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT108-1 076E06 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 9. Package outline SOT108-1 (SO14) 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 © NXP B.V. 2013. All rights reserved. 11 of 17 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm D SOT337-1 E A X c y HE v M A Z 8 14 Q A2 A (A 3) A1 pin 1 index θ Lp L 7 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.4 0.9 8o o 0 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT337-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Fig 10. Package outline SOT337-1 (SSOP14) 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 © NXP B.V. 2013. All rights reserved. 12 of 17 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 E D A X c y HE v M A Z 8 14 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.72 0.38 8o o 0 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig 11. Package outline SOT402-1 (TSSOP14) 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 © NXP B.V. 2013. All rights reserved. 13 of 17 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state 13. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor LSTTL Low-power Schottky Transistor-Transistor Logic ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model CDM Charge-Device Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT125 v.4 20130110 Product data sheet - 74HC_HCT125 v.3 - 74HC_HCT125_CNV v.2 Modifications: 74HC_HCT125 v.3 Modifications: 74HC_HCT125_CNV v.2 74HC_HCT125 Product data sheet • New general description. 20120827 Product data sheet • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. 19970827 Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 - © NXP B.V. 2013. All rights reserved. 14 of 17 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 15.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. 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This document supersedes and replaces all information supplied prior to the publication hereof. 74HC_HCT125 Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 © NXP B.V. 2013. All rights reserved. 15 of 17 74HC125; 74HCT125 NXP Semiconductors Quad buffer/line driver; 3-state Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] 74HC_HCT125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 10 January 2013 © NXP B.V. 2013. All rights reserved. 16 of 17 NXP Semiconductors 74HC125; 74HCT125 Quad buffer/line driver; 3-state 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information. . . . . . . . . . . . . . . . . . . . . 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2013. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 10 January 2013 Document identifier: 74HC_HCT125