REVISIONS LTR DESCRIPTION A Under Table I, make changes to Linearity error and Zero code error tests limits for device types 03 and 04 only. Add one note under figure 1 for both case outlines X and Y. Update document paragraphs to current requirements. - ro DATE APPROVED 14-10-20 C. SAFFLE CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV A A PAGE 18 19 REV STATUS OF PAGES REV A A A A A A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 PMIC N/A PREPARED BY RICK OFFICER Original date of drawing YY-MM-DD CHECKED BY TOM HESS 06-09-14 TITLE MICROCIRCUIT, DIGITAL-LINEAR, 16-BIT, LOW POWER, VOLTAGE OUTPUT, DIGITAL-TOANALOG CONVERTERS, MONOLITHIC SILICON APPROVED BY RAYMOND MONNIN SIZE A REV AMSC N/A DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 CODE IDENT. NO. DWG NO. V62/06671 16236 A PAGE 1 OF 19 5962-V001-15 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance 16 bit, low power, voltage output, digital to analog converter microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/06671 - Drawing number 01 X E Device type (See 1.2.1) Case outline (See 1.2.2) Lead finish (See 1.2.3) 1.2.1 Device type(s). Transport media, quantity Device type Generic 01 DAC8830-REP Tape and reel, 2500 02 DAC8830-EP Tube, 75 03 DAC8831-REP Tape and reel, 2500 04 DAC8831-EP Tube, 50 Circuit function 16 bit, low power, voltage output, digital to analog converter 16 bit, low power, voltage output, digital to analog converter 16 bit, low power, voltage output, digital to analog converter 16 bit, low power, voltage output, digital to analog converter 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins X Y 8 14 JEDEC PUB 95 Package style MS-012-AA MS-012-AB Plastic small outline Plastic small outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator A B C D E Z DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO Material Hot solder dip Tin-lead plate Gold plate Palladium Gold flash palladium Other SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 2 1.3 Absolute maximum ratings. 1/ VDD to AGND ............................................................................................................. -0.3 V to 7 V Digital input voltage to DGND .................................................................................... -0.3 V to VDD + 0.3 V VOUT to AGND ........................................................................................................... -0.3 V to VDD + 0.3 V AGND, AGNDF, AGNDS to DGND ............................................................................ -0.3 V to +0.3 V Storage temperature range (TSTG) ............................................................................. -65C to +150C Junction temperature range (TJ) ................................................................................ +150C Power dissipation (PD) : X package ............................................................................................................... Y package ............................................................................................................... Thermal resistance, junction to ambient (JA): X package ............................................................................................................... Y package ............................................................................................................... Lead temperature, soldering : Vapor phase (60 seconds) ..................................................................................... Infrared (15 seconds) ............................................................................................. 167.2 mW 239.2 mW 149.5C/W 104.5C/W 215C 220C 1.4 Recommended operating conditions. 2/ Operating free-air temperature range (TA) ................................................................. -55C to +125C 1/ 2/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Use of this product beyond the manufacturers design rules or stated parameters is done at the user’s risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 3 2. APPLICABLE DOCUMENTS JEDEC Solid State Technology Association JEDEC PUB 95 – Registered and Standard Outlines for Semiconductor Devices (Copies of these documents are available online at http:/www.jedec.org or from JEDEC – Solid State Technology Association, 3103 North 10th Street, Suite 240–S, Arlington, VA 22201-2107). 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as follows: A. B. C. Manufacturer’s name, CAGE code, or logo Pin 1 identifier ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Timing waveforms. The timing waveforms shall be as shown in figure 4. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 4 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions 2/ Temperature, TA Device type Limits Min Unit Max Static performance Resolution Linearity error Differential linearity error All grades Gain error -55C to +125C All 16 bits 25C All 1 -55C to +125C 01, 02 1.5 03, 04 0.4 -55C to +125C All 1 LSB 25C All 5 LSB 7 -55C to +125C Gain drift Zero code error Zero code drift LSB -55C to +125C All 0.1 typical 25C All 1 -55C to +125C 01, 02 2 03, 04 3 -55C to +125C All 0.05 typical -55C to +125C All 0 VREF 03, 04 -VREF VREF ppm / C LSB ppm / C Output characteristics Voltage output 3/ Unipolar operation Bipolar operation Output impedance V -55C to +125C All 6.25 typical k Settling time tS To 1/2 LSB of FS, CL = 10 pF -55C to +125C All 1 typical s Slew rate 4/ SR CL = 10 pF -55C to +125C All 25 typical V/s 1 LSB change around major carry -55C to +125C All 8 typical nV-s -55C to +125C All 0.2 typical nV-s 25C 01, 02 10 typical nV / 03, 04 18 typical Hz Digital to analog glitch Digital feedthrough 5/ Output noise Power supply rejection PSR VDD varies 10% All -55C to +125C 1 LSB See footnotes at end of table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 5 TABLE I. Electrical performance characteristics – Continued. 1/ Test Symbol Conditions 2/ Temperature, TA Device type Limits Min Unit Max Output characteristics - continued. Bipolar resistor matching -55C to +125C RFB / RINV 03, 04 1 typical Ratio error Bipolar zero error 25C 03, 04 0.01 % 5 LSB 7 -55C to +125C Bipolar zero drift / 0.2 typical -55C to +125C 03, 04 -55C to +125C All 1.25 -55C to +125C All 9 03, 04 7.5 ppm / C Reference input Reference input 6/ voltage range Reference input 7/ impedance Unipolar operation Bipolar operation Reference -3 dB bandwidth BW Reference feedthrough Signal to noise ratio k Code = FFFFh -55C to +125C All 1.3 typical MHz Code = 0000h, VREF = 1 VPP at 100 kHz -55C to +125C All 1 typical mV -55C to +125C All 92 typical dB -55C to +125C All 75 typical pF SNR Reference input capacitance V VDD Code = 0000h Code = FFFFh 120 typical Digital inputs Input low voltage VIL All -55C to +125C VDD = 2.7 V 0.6 0.8 VDD = 5 V Input high voltage VIH V All -55C to +125C VDD = 2.7 V 2.1 V 2.4 VDD = 5 V See footnotes at end of table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 6 TABLE I. Electrical performance characteristics – Continued. 1/ Test Symbol Conditions 2/ Temperature, TA Device type Limits Min Unit Max Digital inputs - continued. Input current IIN -55C to +125C All 1 A Input capacitance CIN -55C to +125C All 10 pF -55C to +125C All -55C to +125C All -55C to +125C All Hysteresis voltage 0.4 typical V Power supply Supply voltage VDD Supply current IDD VDD = 3 V 2.7 V 20 A 20 VDD = 5 V Power 5.5 All -55C to +125C VDD = 3 V 60 W 100 VDD = 5 V Temperature range Specified performance All -55C to +125C -55 +125 C 1/ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. 2/ Unless otherwise specified, VDD = 3 V or VDD = 5 V, VREF = 2.5 V. 3/ The device type 01 output is unipolar ( 0 V to VREF ). The device type 02 output is bipolar ( VREF ) when it connects to an external buffer ( see the bipolar output operation section under manufacturer’s datasheet ). 4/ Slew rate is measure from 10% to 90% of transition when the output changes from 0 to full scale. 5/ Digital feedthrough is defined as the impulse injected into the analog output from the digital input. It is measured when the DAC output does not change, CS is held high, while SCLK and DIN signals are toggled. 6/ Specified by design, Vref production tested only at 2.5 V. 7/ Reference input resistance is code dependent, minimum at 8555h. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 7 TABLE I. Electrical performance characteristics – Continued. 1/ Test Symbol Conditions 8/ 9/ VDD = 5 V Temperature, TA Device type Limits Min Timing characteristic Unit Max See figure 4. SCLK period tsck -55C to +125C All 20 ns SCLK high or low time twsck -55C to +125C All 10 ns Delay from SCLK high tDelay -55C to +125C All 18 ns CS enable lead time tLead -55C to +125C All 12 ns CS enable lag time tLag -55C to +125C All 15 ns Delay from CS high to SCLK high tDSCLK -55C to +125C All 15 ns CS high between active period ttd -55C to +125C All 30 ns Data setup time (input) tsu -55C to +125C All 10 ns Data hold time (input) tho -55C to +125C All 0 ns LDAC width tWLDAC -55C to +125C All 30 ns Delay from CS high tDLDAC -55C to +125C All 30 ns -55C to +125C All 10 s to CS low to LDAC low VDD high to CS low (power up delay) See footnotes at end of table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 8 TABLE I. Electrical performance characteristics – Continued. 1/ Test Symbol Conditions 8/ 9/ VDD = 3 V Temperature, TA Device type Limits Min Timing characteristic Unit Max See figure 4. SCLK period tsck -55C to +125C All 20 ns SCLK high or low time twsck -55C to +125C All 10 ns Delay from SCLK high tDelay -55C to +125C All 18 ns CS enable lead time tLead -55C to +125C All 15 ns CS enable lag time tLag -55C to +125C All 15 ns Delay from CS high to SCLK high tDSCLK -55C to +125C All 15 ns CS high between active period ttd -55C to +125C All 30 ns Data setup time (input) tsu -55C to +125C All 10 ns Data hold time (input) tho -55C to +125C All 0 ns LDAC width tWLDAC -55C to +125C All 30 ns Delay from CS high tDLDAC -55C to +125C All 30 ns -55C to +125C All 10 s to CS low to LDAC low VDD high to CS low (power up delay) 8/ Specified by design. Not production tested. 9/ Sample tested during the initial release and after any redesign or process that may affect this parameter. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 9 Case X FIGURE 1. Case outlines. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 10 Case X - continued Dimensions Inches Symbol Millimeters Min Max Min Max A --- 0.069 --- 1.75 A1 0.004 0.010 0.10 0.25 b 0.012 0.020 0.31 0.51 c 0.007 0.010 0.17 0.25 D 0.189 0.197 4.80 5.00 E 0.150 0.157 3.80 4.00 E1 0.228 0.244 5.80 6.20 e L n 0.050 BSC 0.016 1.27 BSC 0.050 0.40 8 1.27 8 NOTES: 1. Controlling dimensions are inch, millimeter dimensions are given for reference only. 2. For dimension D, body length does not include mold flash, protrusion, or gate burrs. Mold flash, protrusion, or gate burrs shall not exceed 0.006 inch (0.15 mm) per end. 3. For dimension E, body width does not include interlead flash. Interlead flash shall not exceed 0.017 inch (0.43 mm) per side. 4. Falls with JEDEC MS-012-AA. FIGURE 1. Case outlines – Continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 11 Case Y FIGURE 1. Case outlines – Continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 12 Case Y - continued Dimensions Inches Symbol Millimeters Min Max Min Max A --- .069 --- 1.75 A1 .004 .010 0.10 0.25 b .012 .020 0.31 0.51 c .007 .010 0.17 0.25 D .337 .344 8.55 8.75 e .050 BSC 1.27 BSC E .150 .157 3.80 4.00 E1 .228 .244 5.80 6.20 L .016 .050 0.40 1.27 n 14 leads 14 leads NOTES: 1. Controlling dimensions are inch, millimeter dimensions are given for reference only. 2. For dimension D, body length does not include mold flash, protrusion, or gate burrs. Mold flash, protrusion, or gate burrs shall not exceed 0.006 inch (0.15 mm) per end. 3. For dimension E, body width does not include interlead flash. Interlead flash shall not exceed 0.017 inch (0.43 mm) per side. 4. Falls with JEDEC MO-012-AB. FIGURE 1. Case outlines - Continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 13 Device types 01, 02 03, 04 Case outlines X Y Terminal number Terminal symbol 1 VOUT RFB 2 AGND VOUT 3 VREF AGNDF 4 CS AGNDS 5 SCLK VREF-S 6 SDI VREF-F 7 DGND CS 8 VDD SCLK 9 --- NC 10 --- SDI 11 --- LDAC 12 --- DGND 13 --- INV 14 --- VDD FIGURE 2. Terminal connections. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 14 Device types 01, 02 Terminal symbol Description VOUT Analog output of DAC. AGND Analog ground. VREF Voltage reference input. Chip select input (active low). CS SCLK SDI DGND VDD Data is not clocked into SDI unless CS is low. Serial clock input. Serial data input. Data is latched into input register on the rising edge of SCLK. Digital ground. Analog power supply, 3 V to 5 V. Device types 03, 04 Terminal symbol Description RFB Feedback resistor. Connect to the output of external operational amplifier in bipolar mode. VOUT Analog output of DAC. AGNDF Analog ground (Force). AGNDS Analog ground (Sense). VREF-S Voltage reference input (Sense). Connect to external voltage reference. VREF-F Voltage reference input (Force). Connect to external voltage reference. CS Chip select input (active low). Data is not clocked into SDI unless CS is low. SCLK Serial clock input. NC No internal connection. SDI Serial data input. Data is latched into input register on the rising edge of SCLK. LDAC Load DAC control input. Active low. When LDAC is low, the DAC latch is simultaneously updated with the content of the input register. DGND Digital ground. INV Junction point of internal scaling resistors. Connect to external operational amplifier’s inverting input in bipolar mode. VDD Analog power supply, 3 V to 5 V. FIGURE 2. Terminal connections – Continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 15 FIGURE 3. Logic diagrams. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 16 FIGURE 4. Timing waveforms. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 17 FIGURE 4. Timing waveforms – Continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 18 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. DLA Land and Maritime maintains an online database of all current sources of supply at http://www.landandmaritime.dla.mil/Programs/Smcr/. Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Package marking Transport media, quantity Vendor part number V62/06671-01XE 01295 8830M Tape and reel, 2500 DAC8830MCDREP V62/06671-02XE 01295 8830M Tube, 75 DAC8830MCDEP V62/06671-03YE 01295 8831M Tape and reel, 2500 DAC8831MCDREP V62/06671-04YE 01295 8831M Tube, 50 DAC8831MCDEP 1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. CAGE code 01295 DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO Source of supply Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 SIZE A CODE IDENT NO. 16236 REV A DWG NO. V62/06671 PAGE 19