V6204682 VID

REVISIONS
LTR
DESCRIPTION
DATE
APPROVED
A
Make clarification to paragraph 1.2.2 and update
the boilerplate paragraphs. Add a footnote to
Table I and paragraph 6.3. Make changes to the
notes under figure 1. - ro
09-03-10
R. HEBER
Prepared in accordance with ASME Y14.24
Vendor item drawing
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PMIC N/A
PREPARED BY
RICK OFFICER
Original date of drawing
YY-MM-DD
CHECKED BY
TOM HESS
04-02-12
TITLE
MICROCIRCUIT, LINEAR, DUAL/QUAD, RAIL TO
RAIL, LOW POWER, OPERATIONAL AMPLIFIER,
MONOLITHIC SILICON
APPROVED BY
RAYMOND MONNIN
SIZE
A
REV
AMSC N/A
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
CODE IDENT. NO.
DWG NO.
V62/04682
16236
A
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1
OF
22
5962-V041-09
1. SCOPE
1.1 Scope. This drawing documents the general requirements of a high performance dual / quad rail to rail, low power, operational
amplifier microcircuit, with an operating temperature range of -40C to +125C.
1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item
drawing establishes an administrative control number for identifying the item on the engineering documentation:
V62/04682
-
Drawing
number
01
X
E
Device type
(See 1.2.1)
Case outline
(See 1.2.2)
Lead finish
(See 1.2.3)
1.2.1 Device type(s).
Device type
Generic
01
02
TLC2252
TLC2252A
03
04
TLC2254
TLC2254A
Circuit function
Dual, rail to rail, low power, operational amplifier
Dual, rail to rail, low power, operational amplifier
with enhanced VIO
Quad, rail to rail, low power, operational amplifier
Quad, rail to rail, low power, operational amplifier
with enhanced VIO
1.2.2 Case outline(s). The case outline(s) are as specified herein.
Outline letter
Number of pins
X
Y
8
14
JEDEC PUB 95
Package style
MS-012-AA
MS-012-AB
Plastic surface mount
Plastic surface mount
1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture:
Finish designator
A
B
C
D
E
Z
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Material
Hot solder dip
Tin-lead plate
Gold plate
Palladium
Gold flash palladium
Other
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1.3 Absolute maximum ratings.
1/
Supply voltage range (+VDD) ..................................................................................... +8 V 2/
Supply voltage range (-VDD) ...................................................................................... -8 V 2/
Differential input voltage (VID) .................................................................................... 16 V
3/
Input voltage range (VI) (any input) ............................................................................ 8 V 2/
Input current (II) (each input) ...................................................................................... 5 mA
Output current (IO) ..................................................................................................... 50 mA
Total current into +VDD .............................................................................................. 50 mA
Total current into -VDD ............................................................................................... 50 mA
Duration of short-circuit current (at or below) 25C .................................................... Unlimited 4/
Continuous total dissipation (PD) ............................................................................... See 1.5, Dissipation rating table
Operating free-air temperature range (TA) (Q suffix) .................................................. -40C to +125C
Storage temperature range (TSTG) .............................................................................. -65C to +150C
Lead temperature, 1.6 mm (1/16 inch) from case for 10 seconds .............................. +260C
1.4 Recommended operating conditions. 5/
Supply voltage ( VDD ) ............................................................................................. 2.2 V minimum to 8 V maximum
Input voltage range (VI) .............................................................................................. -VDD minimum to +VDD –1.5 V maximum
Common mode input voltage (VIC) ............................................................................ -VDD minimum to +VDD –1.5 V maximum
Operating free-air temperature range (TA) ................................................................. -40C to +125C
1.5 Dissipation rating table.
TA  25C
power rating
above TA = 25C
TA = 70C
power rating
TA = 85C
power rating
TA = 125C
power rating
X
724 mW
5.8 mW/C
464 mW
377 mW
144 mW
Y
950 mW
7.6 mW/C
608 mW
450 mW
190 mW
Package
1/
2/
3/
4/
5/
Derating factor
Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress
ratings only, and functional operation of the device at these or any other conditions beyond those indicated under
“recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may
affect device reliability.
All voltage values, except differential voltages, are with respect to +VDD and –VDD.
Differential voltages are at the +IN with respect to the -IN. Excessive current flows when input is brought below –VDD –0.3 V.
The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the
maximum dissipation rating is not exceeded.
Use of this product beyond the manufacturers design rules or stated parameters is done at the user’s risk. The manufacturer
and/or distributor maintain no responsibility or liability for product used beyond the stated limits.
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2. APPLICABLE DOCUMENTS
JEDEC PUB 95
–
Registered and Standard Outlines for Semiconductor Devices
(Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington,
VA 22201-3834 or online at http://www.jedec.org)
3. REQUIREMENTS
3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as
follows:
A.
B.
C.
Manufacturer’s name, CAGE code, or logo
Pin 1 identifier
ESDS identification (optional)
3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable)
above.
3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are
as specified in 1.3, 1.4, and table I herein.
3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein.
3.5 Diagrams.
3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1.
3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2.
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TABLE I. Electrical performance characteristics. 1/
Test
Input offset voltage
Symbol
VIO
Conditions
VDD = 5 V,
unless otherwise specified
Temperature, 2/
TA
Min
VDD = 2.5 V, VIC = 0,
25C
VO = 0, RS = 50 
-40C to +125C
Temperature
coefficient of input
offset voltage
VIO
Input offset voltage 3/
long term drift
DVIO
Input offset current
IIO
VDD = 2.5 V, VIC = 0,
VDD = 2.5 V, VIC = 0,
01
1500
02
850
01
1750
02
1000
VDD = 2.5 V, VIC = 0,
IIB
01,02
0.5 typical
V /
C
25C
01,02
0.003 typical
V /
mo
25C
01,02
60
pA
VICR
1000
-40C to +125C
VDD = 2.5 V, VIC = 0,
01,02
25C
60
01,02
25C
Low level output
voltage
VOH
VOL
0 to 4
V
0 to
3.5
01,02
4.98 typical
IOH = -20 A
25C
IOH = -75 A
25C
4.9
-40C to +125C
4.8
IOH = -150 A
25C
4.8
VIC = 2.5 V, IOL = 50 A
25C
VIC = 2.5 V, IOL = 500 A
25C
0.15
-40C to +125C
0.15
25C
1
-40C to +125C
1.2
VIC = 2.5 V, IOL = 4 mA
pA
1000
-40C to +125C
|VIO|  5 mV, RS = 50 
V
25C to +125C
-40C to +125C
High level output
voltage
Max
VO = 0, RS = 50 
VO = 0, RS = 50 
Common mode input
voltage range
Unit
VO = 0, RS = 50 
VO = 0, RS = 50 
Input bias current
Limits
Device
type
01,02
V
0.01 typical
V
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – continued. 1/
Test
Large signal differential
voltage amplification
Symbol
AVD
Conditions
VDD = 5 V,
unless otherwise specified
Temperature, 2/
TA
Limits
Device
type
Min
01,02
25C
VIC = 2.5 V, VO = 1 V to 4 V,
100
V / mV
1700 typical
25C
VIC = 2.5 V, VO = 1 V to 4 V,
Max
10
-40C to +125C
RL = 100 k referenced to 2.5 V
Unit
RL = 1 M referenced to 2.5 V
12
typical

typical

Differential input
resistance
ri(d)
25C
01,02
10
Common mode input
resistance
ri(c)
25C
01,02
10
Common mode input
capacitance
ci(c)
f = 10 kHz
25C
01,02
8 typical
pF
Closed loop output
impedance
zo
f = 25 kHz, AV = 10
25C
01,02
200 typical

Common mode
rejection ratio
CMRR
VIC = 0 V to 2.7 V, VO = 2.5 V,
25C
01,02
RS = 50 
Supply voltage
rejection ratio
kSVR
( VDD / VIO )
Supply current
80
dB
01,02
25C
VO = 2.5 V, no load
dB
80
-40C to +125C
VIC = VDD / 2
IDD
01,02
25C
70
70
-40C to +125C
VDD = 4.4 V to 16 V, no load,
12
150
-40C to +125C
Slew rate at unity gain
SR
01,02
25C
VO = 0.5 V to 3.5 V,
A
125
V / s
0.07
RL = 100 k referenced to 2.5 V,
Equivalent input
noise voltage
Vn
0.05
-40C to +125C
CL = 100 pF referenced to 2.5 V
f = 10 Hz
25C
01,02
f = 1 kHz
Peak to peak
equivalent input
noise voltage
VN(PP)
nV /
36 typical
Hz
19 typical
f = 0.1 Hz to 1 Hz
25C
01,02
f = 0.1 Hz to 10 Hz
V
0.7 typical
1.1 typical
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – continued. 1/
Test
Symbol
Equivalent input noise
current
In
Total harmonic
distortion plus noise
THD+N
Conditions
VDD = 5 V,
unless otherwise specified
Temperature, 2/
TA
Min
25C
01,02
Unit
Max
0.6 typical
fA /
Hz
25C
AV = 1, VO = 0.5 V to 2.5 V,
f = 10 kHz,
RL = 50 k referenced to 2.5 V
01,02
GBWP
0.2 % typical
1 % typical
AV = 10, VO = 0.5 V to 2.5 V,
f = 10 kHz,
RL = 50 k referenced to 2.5 V
Gain bandwidth
product
Limits
Device
type
f = 50 kHz,
RL = 50 k referenced to 2.5 V,
25C
01,02
0.2 typical
MHz
25C
01,02
30 typical
kHz
25C
01,02
63 typical
25C
01,02
15 typical
CL = 100 pF referenced to 2.5 V
Maximum output
swing bandwidth
BOM
VO(PP) = 2 V, AV = 1,
RL = 50 k referenced to 2.5 V,
CL = 100 pF referenced to 2.5 V
Phase margin at
unity gain
m
Gain margin
Gm
RL = 50 k referenced to 2.5 V,
CL = 100 pF referenced to 2.5 V
RL = 50 k referenced to 2.5 V,
dB
CL = 100 pF referenced to 2.5 V
1/
Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over
the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters
may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization
and/or design.
2/
Full range is –40C to +125C for Q suffix.
3/
Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150C
extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
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TABLE I. Electrical performance characteristics – continued. 1/
Test
Input offset voltage
Symbol
VIO
Conditions
VDD = 5 V,
unless otherwise specified
Temperature, 2/
TA
Limits
Device
type
Min
VIC = 0, VO = 0, RS = 50 
25C
-40C to +125C
Unit
Max
01
1500
02
850
01
1750
02
1000
V
Temperature
coefficient of input
offset voltage
VIO
VIC = 0, VO = 0, RS = 50 
25C to +125C
01,02
0.5 typical
V /
C
Input offset voltage 3/
long term drift
DVIO
VIC = 0, VO = 0, RS = 50 
25C
01,02
0.003 typical
V /
mo
Input offset current
IIO
VIC = 0, VO = 0, RS = 50 
25C
01,02
60
pA
1000
-40C to +125C
Input bias current
IIB
VIC = 0, VO = 0, RS = 50 
01,02
25C
60
1000
-40C to +125C
Common mode input
voltage range
VICR
|VIO|  5 mV, RS = 50 
01,02
25C
-5 to 4
Maximum negative
peak output voltage
+VOM
-VOM
01,02
4.98 typical
IO = -20 A
25C
IO = -100 A
25C
4.9
-40C to +125C
4.7
IO = -200 A
25C
4.8
VIC = 0 V, IO = 50 A
25C
VIC = 0 V, IO = 500 A
25C
-4.85
-40C to +125C
-4.85
25C
-4
-40C to +125C
-3.8
VIC = 0 V, IO = 4 mA
V
-5 to
3.5
-40C to +125C
Maximum positive
peak output voltage
pA
01,02
V
-4.99 typical
V
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – continued. 1/
Test
Large signal differential
voltage amplification
Symbol
AVD
Conditions
VDD = 5 V,
unless otherwise specified
Temperature, 2/
TA
Limits
Device
type
Min
VO = 4 V,
01,02
25C
VO = 4 V, RL = 1 M
Max
40
V/mV
10
-40C to +125C
RL = 100 k
Unit
3000 typical
25C
12
typical

typical

Differential input
resistance
ri(d)
25C
01,02
10
Common mode input
resistance
ri(c)
25C
01,02
10
Common mode input
capacitance
ci(c)
f = 10 kHz, X package
25C
01,02
8 typical
pF
Closed loop output
impedance
zo
f = 25 kHz, AV = 10
25C
01,02
190 typical

Common mode
rejection ratio
CMRR
VIC = -5 V to 2.7 V, VO = 0 V,
25C
01,02
RS = 50 
Supply voltage
rejection ratio
kSVR
( VDD / VIO )
Supply current
80
dB
01,02
25C
VO = 2.5 V, no load
dB
80
-40C to +125C
VIC = 0
IDD
01,02
25C
75
75
-40C to +125C
VDD = 2.2 V to 8 V, no load,
12
150
-40C to +125C
Slew rate at unity gain
SR
VO = 2 V, RL = 100 k,
Vn
f = 10 Hz
25C
01,02
f = 1 kHz
Peak to peak
equivalent input
noise voltage
VN(PP)
V / s
0.07
0.05
-40C to +125C
CL = 100 pF
Equivalent input
noise voltage
01,02
25C
A
125
nV /
38 typical
Hz
19 typical
f = 0.1 Hz to 1 Hz
25C
01,02
f = 0.1 Hz to 10 Hz
V
0.8 typical
1.1 typical
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – continued. 1/
Test
Symbol
Equivalent input noise
current
In
Total harmonic
distortion plus noise
THD+N
Conditions
VDD = 5 V,
unless otherwise specified
Temperature, 2/
TA
Limits
Device
type
Min
25C
01,02
Unit
Max
0.6 typical
fA /
Hz
AV = 1, VO = 2.3 V,
25C
01,02
0.2 % typical
f = 10 kHz, RL = 50 k
1 % typical
AV = 10, VO = 2.3 V,
f = 10 kHz, RL = 50 k
Gain bandwidth
product
GBWP
Maximum output
swing bandwidth
BOM
Phase margin at
unity gain
m
Gain margin
Gm
25C
01,02
0.21 typical
MHz
25C
01,02
14 typical
kHz
RL = 50 k, CL = 100 pF
25C
01,02
63 typical
RL = 50 k, CL = 100 pF
25C
01,02
15 typical
f = 10 kHz, RL = 50 k,
CL = 100 pF
VO(PP) = 4.6 V, AV = 1,
RL = 50 k, CL = 100 pF
dB
1/
Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over
the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters
may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization
and/or design.
2/
Full range is –40C to +125C for Q suffix.
3/
Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150C
extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
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TABLE I. Electrical performance characteristics – continued. 1/
Test
Input offset voltage
Symbol
VIO
Conditions
VDD = 5 V,
unless otherwise specified
Temperature, 2/
TA
Min
VDD = 2.5 V, VIC = 0,
25C
VO = 0, RS = 50 
-40C to +125C
Temperature
coefficient of input
offset voltage
VIO
Input offset voltage 3/
long term drift
DVIO
Input offset current
IIO
VDD = 2.5 V, VIC = 0,
VDD = 2.5 V, VIC = 0,
03
1500
04
850
03
1750
04
1000
VDD = 2.5 V, VIC = 0,
IIB
03,04
0.5 typical
V /
C
25C
03,04
0.003 typical
V /
mo
25C
03,04
60
pA
VICR
1000
+125C
VDD = 2.5 V, VIC = 0,
03,04
25C
60
Low level output
voltage
VOH
VOL
03,04
25C
0 to 4
V
0 to
3.5
03,04
4.98 typical
IOH = -20 A
25C
IOH = -75 A
25C
4.9
-40C to +125C
4.8
IOH = -150 A
25C
4.8
VIC = 2.5 V, IOL = 50 A
25C
VIC = 2.5 V, IOL = 500 A
25C
0.15
-40C to +125C
0.15
25C
1
-40C to +125C
1.2
VIC = 2.5 V, IOL = 4 mA
pA
1000
+125C
|VIO|  5 mV, RS = 50 
V
25C to +125C
-40C to +125C
High level output
voltage
Max
VO = 0, RS = 50 
VO = 0, RS = 50 
Common mode input
voltage range
Unit
VO = 0, RS = 50 
VO = 0, RS = 50 
Input bias current
Limits
Device
type
03,04
0.01 typical
V
mV
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – continued. 1/
Test
Large signal differential
voltage amplification
Symbol
AVD
Conditions
VDD = 5 V,
unless otherwise specified
Temperature, 2/
TA
Limits
Device
type
Min
03,04
25C
VIC = 2.5 V, VO = 1 V to 4 V,
100
V/mV
1700 typical
25C
VIC = 2.5 V, VO = 1 V to 4 V,
Max
10
-40C to +125C
RL = 100 k referenced to 2.5 V
Unit
RL = 1 M referenced to 2.5 V
12
typical

typical

Differential input
resistance
ri(d)
25C
03,04
10
Common mode input
resistance
ri(c)
25C
03,04
10
Common mode input
capacitance
ci(c)
f = 10 kHz, Y package
25C
03,04
8 typical
pF
Closed loop output
impedance
zo
f = 25 kHz, AV = 10
25C
03,04
200 typical

Common mode
rejection ratio
CMRR
VIC = 0 V to 2.7 V, VO = 2.5 V,
25C
03,04
RS = 50 
Supply voltage
rejection ratio
kSVR
( VDD / VIO )
Supply current
(four amplifiers)
Slew rate at unity gain
80
dB
03,04
25C
VO = 2.5 V, no load
dB
80
-40C to +125C
VIC = VDD / 2
IDD
03,04
25C
70
70
-40C to +125C
VDD = 4.4 V to 16 V, no load,
12
250
300
-40C to +125C
SR
03,04
25C
VO = 0.5 V to 3.5 V,
A
V / s
0.07
RL = 100 k referenced to 2.5 V,
Equivalent input
noise voltage
Vn
0.05
-40C to +125C
CL = 100 pF referenced to 2.5 V
f = 10 Hz
25C
03,04
f = 1 kHz
Peak to peak
equivalent input
noise voltage
VN(PP)
36 typical
19 typical
f = 0.1 Hz to 1 Hz
25C
03,04
f = 0.1 Hz to 10 Hz
0.7 typical
nV /
Hz
V
1.1 typical
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – continued. 1/
Test
Symbol
Equivalent input noise
current
In
Total harmonic
distortion plus noise
THD+N
Conditions
VDD = 5 V,
unless otherwise specified
Temperature, 2/
TA
Min
25C
03,04
Unit
Max
0.6 typical
fA /
Hz
25C
AV = 1, VO = 0.5 V to 2.5 V,
f = 20 kHz,
RL = 50 k referenced to 2.5 V
03,04
GBWP
0.2 % typical
1 % typical
AV = 10, VO = 0.5 V to 2.5 V,
f = 20 kHz,
RL = 50 k referenced to 2.5 V
Gain bandwidth
product
Limits
Device
type
f = 50 kHz,
RL = 50 k referenced to 2.5 V,
25C
03,04
0.2 typical
MHz
25C
03,04
30 typical
kHz
25C
03,04
63 typical
25C
03,04
15 typical
CL = 100 pF referenced to 2.5 V
Maximum output
swing bandwidth
BOM
VO(PP) = 2 V, AV = 1,
RL = 50 k referenced to 2.5 V,
CL = 100 pF referenced to 2.5 V
Phase margin at
unity gain
m
Gain margin
Gm
RL = 50 k referenced to 2.5 V,
CL = 100 pF referenced to 2.5 V
RL = 50 k referenced to 2.5 V,
dB
CL = 100 pF referenced to 2.5 V
1/
Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over
the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters
may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization
and/or design.
2/
Full range is –40C to +125C for Q suffix.
3/
Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150C
extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
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TABLE I. Electrical performance characteristics – continued. 1/
Test
Input offset voltage
Symbol
VIO
Conditions
VDD = 5 V,
unless otherwise specified
Temperature, 2/
TA
Limits
Device
type
Min
VIC = 0, VO = 0, RS = 50 
25C
-40C to +125C
Unit
Max
03
1500
04
850
03
1750
04
1000
V
Temperature
coefficient of input
offset voltage
VIO
VIC = 0, VO = 0, RS = 50 
25C to +125C
03,04
0.5 typical
V /
C
Input offset voltage 3/
long term drift
DVIO
VIC = 0, VO = 0, RS = 50 
25C
03,04
0.003 typical
V /
mo
Input offset current
IIO
VIC = 0, VO = 0, RS = 50 
25C
03,04
60
pA
1000
+125C
Input bias current
IIB
VIC = 0, VO = 0, RS = 50 
03,04
25C
60
1000
+125C
Common mode input
voltage range
VICR
|VIO|  5 mV, RS = 50 
03,04
25C
-5 to 4
Maximum negative
peak output voltage
+VOM
-VOM
03,04
4.98 typical
IO = -20 A
25C
IO = -100 A
25C
4.9
-40C to +125C
4.7
IO = -200 A
25C
4.8
VIC = 0 V, IO = 50 A
25C
VIC = 0 V, IO = 500 A
25C
-4.85
-40C to +125C
-4.85
25C
-4
-40C to +125C
-3.8
VIC = 0 V, IO = 4 mA
V
-5 to
3.5
-40C to +125C
Maximum positive
peak output voltage
pA
03,04
-4.99 typical
V
V
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – continued. 1/
Test
Large signal differential
voltage amplification
Symbol
AVD
Conditions
VDD = 5 V,
unless otherwise specified
Temperature, 2/
TA
Limits
Device
type
Min
VO = 4 V,
03,04
25C
VO = 4 V, RL = 1 M
Max
40
V / mV
10
-40C to +125C
RL = 100 k
Unit
3000 typical
25C
12
typical

typical

Differential input
resistance
ri(d)
25C
03,04
10
Common mode input
resistance
ri(c)
25C
03,04
10
Common mode input
capacitance
ci(c)
f = 10 kHz, Y package
25C
03,04
8 typical
pF
Closed loop output
impedance
zo
f = 25 kHz, AV = 10
25C
03,04
190 typical

Common mode
rejection ratio
CMRR
VIC = -5 V to 2.7 V, VO = 0 V,
25C
03,04
RS = 50 
Supply voltage
rejection ratio
kSVR
( VDD / VIO )
Supply current
(four amplifiers)
Slew rate at unity gain
250
SR
VO = 2 V, RL = 100 k,
Vn
03,04
25C
25C
VN(PP)
V / s
0.07
0.05
-40C to +125C
f = 10 Hz
03,04
38 typical
19 typical
f = 0.1 Hz to 1 Hz
25C
A
300
f = 1 kHz
Peak to peak
equivalent input
noise voltage
dB
-40C to +125C
CL = 100 pF
Equivalent input
noise voltage
80
03,04
25C
VO = 0 V, no load
dB
80
-40C to +125C
VIC = VDD / 2
IDD
03,04
25C
75
75
-40C to +125C
VDD = 2.2 V to 8 V, no load,
12
03,04
f = 0.1 Hz to 10 Hz
0.8 typical
nV /
Hz
V
1.1 typical
See footnotes at end of table.
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TABLE I. Electrical performance characteristics – continued. 1/
Test
Symbol
Equivalent input noise
current
In
Total harmonic
distortion plus noise
THD+N
Conditions
VDD = 5 V,
unless otherwise specified
Temperature, 2/
TA
Limits
Device
type
Min
25C
03,04
Unit
Max
0.6 typical
fA /
Hz
AV = 1, VO = 2.3 V,
25C
03,04
0.2 % typical
f = 20 kHz, RL = 50 k
1 % typical
AV = 10, VO = 2.3 V,
f = 20 kHz, RL = 50 k
Gain bandwidth
product
GBWP
Maximum output
swing bandwidth
BOM
Phase margin at
unity gain
m
Gain margin
Gm
25C
03,04
0.21 typical
MHz
25C
03,04
14 typical
kHz
RL = 50 k, CL = 100 pF
25C
03,04
63 typical
RL = 50 k, CL = 100 pF
25C
03,04
15 typical
f = 10 kHz, RL = 50 k,
CL = 100 pF
VO(PP) = 4.6 V, AV = 1,
RL = 50 k, CL = 100 pF
dB
1/
Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over
the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters
may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization
and/or design.
2/
Full range is –40C to +125C for Q suffix.
3/
Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at TA = 150C
extrapolated to TA = 25C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
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Case X
FIGURE 1. Case outlines.
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Case X - Continued
Dimensions
Symbol
Inches
Millimeters
Min
Max
Min
Max
A
---
.069
---
1.75
A1
.004
.010
0.10
0.25
b
.012
.020
0.31
0.51
c
.005
.010
0.13
0.25
D
.189
.197
4.80
5.00
E
.150
.157
3.81
4.00
E1
.228
.244
5.80
6.20
e
L
.050 BSC
.016
1.27 BSC
.050
0.40
1.27
NOTES:
1. Controlling dimensions are inch, millimeter dimensions are given for reference only.
2. For dimension D, body length does not include mold flash, protrusion, or gate burrs.
Mold flash, protrusion, or gate burrs shall not exceed 0.006 inch (0.15 mm) per end.
3. For dimension E, body width does not include interlead flash. Interlead flash shall not
exceed 0.017 inch (0.43 mm) per side.
4. Fall within JEDEC MS-012 variation AA.
FIGURE 1. Case outlines - Continued.
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Case Y
FIGURE 1. Case outlines – Continued.
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Case Y - Continued
Dimensions
Symbol
Inches
Millimeters
Min
Max
Min
Max
A
---
.069
---
1.75
A1
.004
.010
0.10
0.25
b
.012
.020
0.31
0.51
c
.005
.010
0.13
0.25
D
.337
.344
8.55
8.75
E
.150
.157
3.80
4.00
E1
.228
.244
5.80
6.20
e
L
.050 BSC
.016
1.27 BSC
.050
0.40
1.27
NOTES:
1. Controlling dimensions are inch, millimeter dimensions are given for reference only.
2. For dimension D, body length does not include mold flash, protrusion, or gate burrs.
Mold flash, protrusion, or gate burrs shall not exceed 0.006 inch (0.15 mm) per end.
3. For dimension E, body width does not include interlead flash. Interlead flash shall not
exceed 0.017 inch (0.43 mm) per side.
4. Fall within JEDEC MS-012 variation AB
FIGURE 1. Case outlines - Continued.
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Device types
01 and 02
03 and 04
Case outlines
X
Y
Terminal number
Terminal symbol
1
OUT1
OUT1
2
-IN1
-IN1
3
+IN1
+IN1
4
-VDD / GND
+VDD
5
+IN2
+IN2
6
-IN2
-IN2
7
OUT2
OUT2
8
+VDD
OUT3
9
---
-IN3
10
---
+IN3
11
---
-VDD / GND
12
---
+IN4
13
---
-IN4
14
---
OUT4
FIGURE 2. Terminal connections.
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4. VERIFICATION
4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as
indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices,
classification, packaging, and labeling of moisture sensitive devices, as applicable.
5. PREPARATION FOR DELIVERY
5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial
practices for electrostatic discharge sensitive devices.
6. NOTES
6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum.
6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book.
The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided.
6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee
of present or continued availability as a source of supply for the item.
Package 2/
Vendor item drawing
administrative control
number 1/
VIO max
at 25C
Device
manufacturer
CAGE code
V62/04682-01XE
1550 V
01295
SOIC (D)
V62/04682-02XE
850 V
01295
V62/04682-03YE
1550 V
V62/04682-04YE
850 V
Vendor part number
Top side
marking
Tape and reel
TLC2252QDREP
2252EP
SOIC (D)
Tape and reel
TLC2252AQDREP
2252AE
01295
SOIC (D)
Tape and reel
TLC2254QDREP
TLC2254EP
01295
SOIC (D)
Tape and reel
TLC2254AQDREP
TLC2254AEP
1/ The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation.
2/ Package drawings, standard packaging quantities, thermal data, symbolization, and printed circuit board (PCB) design
guidelines are available at www.ti.com/sc/package.
CAGE code
01295
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Source of supply
Texas Instruments, Inc.
Semiconductor Group
8505 Forest Lane
P.O. Box 660199
Dallas, TX 75243
Point of contact: U.S. Highway 75 South
P.O. Box 84, M/S 853
Sherman, TX 75090-9493
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A
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