REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 11-11-29 Thomas M. Hess B Add device type 03. - phn 12-02-27 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV B B B B B B B B B B B B PAGE 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Phu H. Nguyen Original date of drawing CHECKED BY TITLE Phu H. Nguyen YY MM DD 05-06-14 APPROVED BY Thomas M. Hess SIZE CODE IDENT. NO. A REV AMSC N/A DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 MICROCIRCUIT, LINEAR, WIDE BAND, LOW DISTORTION FULLY DIFFERENTIAL AMPLIFIERS, MONOLITHIC SILICON DWG NO. V62/05608 16236 B PAGE 1 OF 12 5962-V035-12 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance wide band, low distortion fully differential amplifiers, with an operating temperature range of -55°C to +125°C for device type 01 and 02 and an operating temperature range of 55°C to +60°C for device type 03. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturer’s PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/05608 - Drawing number 01 X E Device type (See 1.2.1) Case outline (See 1.2.2) Lead finish (See 1.2.3) 1.2.1 Device type(s). 1/ Device type 01 02 03 2/ Generic TA THS4502-EP THS4503-EP THS4503-EP Circuit function -55°C to +125°C -55°C to +125°C -55°C to +60°C Wideband, low distortion fully differential amplifiers Wideband, low distortion fully differential amplifiers Wideband, low distortion fully differential amplifiers 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins X Y 8 8 JEDEC PUB 95 Package style JEDEC MS-012 JEDEC M0-187 Plastic small outline package Plastic small outline package 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator A B C D E Z 1/ 2/ Material Hot solder dip Tin-lead plate Gold plate Palladium Gold flash palladium Other Users are cautioned to review the manufacturers data manual for additional user information relating to this device. The device type 02 and 03 may have low level oscillation when the die temperature (also known as the junction temperature) exceeds 60°C. These device are not recommended for new designs where the die temperature is expected to exceeds 60°C. for more information, see manufacturer data on Maximum Die temperature to Oscillation. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/05608 PAGE 2 1.3 Absolute maximum ratings. 3/ Supply voltage, (VS) ................................................................................................................. Input voltage, (VI): ..................................................................................................................... Output current, (IO) ................................................................................................................... Differential input voltage, (VID) .................................................................................................. Maximum junction temperature, (TJ) ........................................................................................ Maximum junction temperature, continuous operation, long term reliability, (TJ) ..................... Operating free air temperature range, (TA) (device type 01 and 02) ......................................... Operating free air temperature range, (TA) (device type 03) ..................................................... Storage temperature range, (TSTG) ........................................................................................... Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds ............................................. ESD ratings: HBM .............................................................................................................................. CDM .............................................................................................................................. MM ................................................................................................................................ Package dissipation ratings: Package Case X Case Y 4/ θJC (°C/W) 38.3 4.7 +16.5 V ±VS 150 mA 4/ +4.0 V +150°C 5/ +125°C 6/ -55°C to +125°C -55°C to +60°C -65°C to +150°C +300°C +3000 V +1500 V +100 V θJA 7/ (°C/W) 97.5 58.4 1.4 Recommended operating conditions. Supply voltage: Maximum dual supply .............................................................................................................. Single supply ............................................................................................................................ Operating free air temperature range, (TA) (device type 01 and 02) ............................................ Operating free air temperature range, (TA) (device type 03) ........................................................ ±7.5 V +4.5 V to +15.0 V -55°C to +125°C -55°C to +60°C 2. APPLICABLE DOCUMENTS JEDEC – SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 – Registered and Standard Outlines for Semiconductor Devices (Copies of these documents are available online at http:/www.jedec.org or from JEDEC – Solid State Technology Association, 3103 North 10th Street, Suite 240–S, Arlington, VA 22201.) 3/ 4/ 5/ 6/ 7/ Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may affect device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. The devices on this drawing may incorporate a thermal pad on the underside of the chip. This act as a heatsink and must be connected to a thermally dissipative plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature which could permanently damage the device. Refer to the manufacturer for more information about utilizing the thermally enhanced package. The absolute maximum temperature under any condition is limited by the constraints of the silicon process. Long term high temperature storage and/or extended used at maximum recommended operating conditions may result in a reduction of overall device life. See figure 3 for additional information on thermal derating. This data was taken using JEDEC standard high-K test PCB. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/05608 PAGE 3 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturer’s part number as shown in 6.3 herein and as follows: A. B. C. Manufacturer’s name, CAGE code, or logo Pin 1 identifier ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturer’s part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline(s). The case outline(s) shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Wirebond life versus temperature. Wirebond life versus temperature shall be as shown in figure 3. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/05608 PAGE 4 TABLE I. Electrical performance characteristics. 1/ Test Test condition VS = ±5.0 V, G = +1 Rf = Rg = 1 kΩ, RL = 399 Ω Single ended input unless otherwise noted Device type: 2/ Limits Typ 25°C Unit Min/ Typ/ Max MHz Typ Over temperature 3/ 25°C -55°C to +125°C OR -55°C to +60°C AC Performance G = +1, PIN = -20 dBm, Rf = 392 Ω 370 G = +2, PIN = -30 dBm, Rf = 1 kΩ 175 G = +5, PIN = -30 dBm, Rf = 1.3 kΩ 70 G = +10, PIN = -30 dBm, Rf = 1.3 kΩ 30 Gain bandwidth product G > +10 300 Bandwidth for 0.1 dB flatness PIN = -20 dBm 150 Large signal bandwidth VP = 2 V 220 Slew rate 4 VPP Step 2800 V/µs Rise time 2 VPP Step 0.8 ns Fall time 2 VPP Step 0.6 Setting time to 0.01% VO = 4 VPP 8.3 Setting time to 0.1% VO = 4 VPP 6.3 Harmonic distortion G = +1, VO = 2 VPP Small signal bandwidth 2 nd harmonic rd 3 harmonic f = 8 MHz -83 f = 30 MHz -74 f = 8 MHz -97 dBc f = 30 MHz -78 Third order intermodulation distortion VO = 2 VPP, fc = 30 MHz, Rf = 392 Ω, 200 kHz tone spacing -94 Third order output intercept point fc = 30 MHz, Rf = 392 Ω, Referenced to 50 Ω, 52 dBm Input voltage noise f > 1 MHz 6.8 nV/ Hz Input current noise f > 100 kHz 1.7 pA/ Hz Overdrive recovery time Overdrive = 5.5 V 75 ns DC performance Open loop voltage gain Input offset voltage VOD = ±4 V, VOCM = 0 V 55 52 -1 ±6 48 Average offset voltage drift Input bias current 4 4.6 Average bias current drift Input offset current 0.5 1 Average offset current drift dB Min ±7 mV Max ±10 µV/°C Typ 5.4 µA Max ±10 nA/°C Typ 2 µA Max ±40 nA/°C Typ See notes at end of table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/05608 PAGE 5 TABLE I. Electrical performance characteristics – Continued. Test Input Common mode input range Common mode rejection ratio Input impedance Output Differential output voltage swing Test condition VS = ±5.0 V, G = +1 Rf = Rg = 1 kΩ, RL = 399 Ω Single ended input unless otherwise noted Device type: 2/ VICM = ±0.5 V, VOCM = 0 V RL = 399 Ω Differential output current drive RL = 20 Ω Output balance error PIN = -20 dBm, f = 100 kHz Closed loop output impedance f = 1 MHz (single ended) Output Common Mode Voltage control Small signal bandwidth RL = 400 Ω Slew rate Minimum gain Maximum gain Common mode offset voltage Input bias current 2 VPP step Limits Over temperature 3/ Unit Min/ Typ/ Max V dB Ω || pF Min Min Typ 25°C 25°C -55°C to +125°C OR -55°C to +60°C ±4.0 80 7 10 || 1 ±3.7 74 ±3.4 70 ±8 ±7.6 ±7.4 V Min 120 -58 0.1 110 100 mA dB Ω Min Typ Typ 180 MHz Typ 87 1 1 +2 100 V/µs V/V V/V mV Typ Min Max Max Max 0.98 1.02 ±7.5 150 0.98 1.02 ±9.9 170 ±4 25 || 1 ±3.7 ±3.4 µA V VOCM left floating VOCM left floating 0 0 0.05 -0.05 0.1 -0.1 kΩ || pF V V Max Min VS+ = 4 V to 5 V, VS- = -5 V to -4 V ±5 23 23 80 ±7.5 28 16 76 ±7.5 34 10 70 V mA mA dB Max Max Min Min V V 800 200 -2.9 -4.3 1000 240 Min Max Max Max VOCM = 2.5 V Input voltage range Input impedance Maximum default voltage Minimum default voltage Power supply Specified operating voltage Maximum quiescent current Minimum quiescent current Power supply rejection (±PSRR) Power down (device type 01 only) Enable voltage threshold Disable voltage threshold Power down quiescent current Input bias current Typ 1/ Device enabled ON above -2.9 V Device disabled OFF below -4.3 V Input impedance 50 || 1 Turn on time delay Turn off time delay 1000 800 1200 260 µA µA kΩ || pF ns ns Min Typ Typ Typ Typ See notes at end of table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/05608 PAGE 6 TABLE I. Electrical performance characteristics.- Continued. Test Test condition VS = 5.0 V, G = +1 Rf = Rg = 1 kΩ, RL = 399 Ω Single ended input unless otherwise noted Device type: 2/ 1/ Limits Typ Unit Min/ Typ/ Max MHz Typ Over temperature 25°C 25°C -55°C to +125°C OR -55°C to +60°C AC Performance G = +1, PIN = -20 dBm, Rf = 392 Ω 320 G = +2, PIN = -30 dBm, Rf = 1 kΩ 160 G = +5, PIN = -30 dBm, Rf = 1.3 kΩ 60 G = +10, PIN = -30 dBm, Rf = 1.3 kΩ 30 Gain bandwidth product G > +10 300 Bandwidth for 0.1 dB flatness PIN = -20 dBm 180 Large signal bandwidth VP = 1 V 200 Slew rate 2 VPP Step 1300 V/µs Rise time 2 VPP Step 0.6 ns Fall time 2 VPP Step 0.8 Setting time to 0.01% VO = 2 V Step 13.1 Setting time to 0.1% VO = 2 V Step 8.3 Harmonic distortion VO = 2 VPP Small signal bandwidth 2 nd harmonic rd 3 harmonic f = 8 MHz -81 f = 30 MHz -60 f = 8 MHz -74 dBc f = 30 MHz -62 Input voltage noise f > 1 MHz 6.8 nV/ Hz Input current noise f > 100 kHz 1.6 pA/ Hz Overdrive recovery time Overdrive = 5.5 V 75 ns DC performance Open loop voltage gain Input offset voltage VOD = ±1 V, VOCM = 2.5 V 54 51 48 dB Min -0.6 ±5 ±6.5 mV Max ±10 µV/°C Typ Average offset voltage drift Input bias current 4 4.6 Average bias current drift Input offset current 0.5 0.7 Average offset current drift Input Common mode input range Common mode rejection ratio Input impedance VICM = 2.25 V to 2.75 V, VOCM = 2.5 V 1/4 80 7 10 || 1 1.3 / 3.7 74 5.2 µA Max ±10 nA/°C Typ 1.2 µA Max ±20 nA/°C Typ 1.6 / 3.4 60 V dB Min Min Typ Ω || pF See notes at end of table. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/05608 PAGE 7 TABLE I. Electrical performance characteristics – Continued. Test Test condition VS = 5.0 V, G = +1 Rf = Rg = 1 kΩ, RL = 399 Ω Single ended input unless otherwise noted Device type: 2/ Limits Over temperature Typ Output Differential output voltage swing RL = 399 Ω, Referenced to 2.5 V Differential output current drive RL = 20 Ω Output balance error PIN = -20 dBm, f = 100 kHz Closed loop output impedance (single f = 1 MHz ended) Output Common Mode Voltage control Small signal bandwidth RL = 400 Ω 1/ Unit Min/ Typ/ Max 25°C 25°C -55°C to +125°C OR -55°C to +60°C ±3.3 ±2.8 ±2.6 V Min 100 -58 0.1 90 80 mA dB Ω Min Typ Typ 180 MHz Typ 80 1 1 2 1 1/4 25 || 1 0.98 1.02 ±6.7 2 1.2/3.8 0.98 1.02 ±9.2 3 1.3/3.7 V/µs V/V V/V mV Typ Min Max Max Max Min Typ Slew rate Minimum gain Maximum gain Common mode offset voltage Input bias current Input voltage range Input impedance 2 VPP step Maximum default voltage Minimum default voltage Power supply Specified operating voltage Maximum quiescent current Minimum quiescent current Power supply rejection (±PSRR) Power down (device type 01 only) Enable voltage threshold Disable voltage threshold Power down quiescent current VOCM left floating VOCM left floating 2.5 2.5 2.55 2.45 2.6 2.4 kΩ || pF V V VS+ = 4.5 V to 5.5 V 5 20 20 75 15 25 15 72 15 31 8 66 V mA mA dB Max Max Min Min V V 600 2.1 0.7 800 1200 µA Min Max Max 125 140 µA kΩ || pF ns ns VOCM = 2.5 V Device enabled ON above -2.1 V Device disabled OFF below 0.7 V Input bias current Input impedance 100 50 || 1 Turn on time delay Turn off time delay 1000 800 1/ 2/ 3/ µA V Max Min Max Typ Typ Typ Testing and other quality control techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or design. Device type 01 and 02 operate at TA = -55°C to +125°C and device type 03 operates at TA = -55°C to +60°C. See maximum die temperature to prevent oscillation section in the Application Information from manufacturer data. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/05608 PAGE 8 Case X Symbol A A1 A2 b c Notes: 1. 2. 3. Millimeters Min Max 1.75 0.10 0.25 0.25 Typ 0.31 0.51 0.17 0.25 Inches Min Max .069 .007 .010 .010 Typ .012 .020 .007 .010 Symbol D E E1 e L Millimeters Min Max 4.80 5.00 3.80 4.00 5.80 6.20 1.27 Typ 0.40 1.27 Inches Min Max .189 .197 .150 .157 .228 .244 .050 Typ .016 .050 This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0.000 inches (0.15 mm). Falls within JEDEC MS-012 variation AA. FIGURE 1. Case outlines. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/05608 PAGE 9 Case Y Symbol A A1 A2 b c Notes: 1. 2. 3. 4. Millimeters Min Max 1.75 0.10 0.25 0.25 Typ 0.31 0.51 0.17 0.25 Inches Min Max .069 .007 .010 .010 Typ .012 .020 .007 .010 Symbol D E E1 e L Millimeters Min Max 4.80 5.00 3.80 4.00 5.80 6.20 1.27 Typ 0.40 1.27 Inches Min Max .189 .197 .150 .157 .228 .244 .050 Typ .016 .050 This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion. This package is designed to be soldered to a thermal pad on the board. Refer to manufacturer literature fo information regarding recommended board layout. Falls within JEDEC MO-187. FIGURE 1. Case outline - Continued. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/05608 PAGE 10 FIGURE 2. Terminal connections. FIGURE 3. Wirebond life versus temperature. DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/05608 PAGE 11 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsible for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturer’s standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Configuration control. The data contained herein is based on the salient characteristics of the device manufacturer’s data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identification of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. 1/ 2/ 3/ Vendor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number V62/05608-01XE 01295 2/ V62/05608-02XE 01295 2/ V62/05608-01YE 01295 2/ V62/05608-02YE 01295 2/ V62/05608-03YE 01295 THS4503MDGNREP 3/ Symbol BLB The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation. Not yet available from a source of supplied. The package is available taped and reel. The R suffix standard quality is 2500. CAGE code 01295 DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO Source of supply Texas Instruments, Inc. Semiconductor Group 8505 Forest Lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 SIZE A CODE IDENT NO. 16236 REV B DWG NO. V62/05608 PAGE 12