PD - 91749
IRFR/U6215
PRELIMINARY
HEXFET® Power MOSFET
P-Channel
l 175°C Operating Temperature
l Surface Mount (IRFR6215)
l Straight Lead (IRFU6215)
l Advanced Process Technology
l Fast Switching
l Fully Avalanche Rated
Description
l
D
VDSS = -150V
RDS(on) = 0.295Ω
G
ID = -13A
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide
variety of applications.
The D-PAK is designed for surface mounting using
vapor phase, infrared, or wave soldering techniques.
The straight lead version (IRFU series) is for throughhole mounting applications. Power dissipation levels
up to 1.5 watts are possible in typical surface mount
applications.
D -P A K
T O -252 A A
I-P A K
T O -25 1A A
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
Units
-13
-9.0
-44
110
0.71
± 20
310
-6.6
11
5.0
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
RθJA
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Junction-to-Case
Junction-to-Ambient (PCB mount) **
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
–––
1.4
50
110
°C/W
1
5/11/98
IRFR/U6215
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
Min.
-150
–––
–––
–––
-2.0
3.6
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
-0.20
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
14
36
53
37
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
860
220
130
IGSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = -250µA
––– V/°C Reference to 25°C, ID = -1mA
0.295
VGS = -10V, ID = -6.6A
Ω
0.58
VGS = -10V, ID = -6.6A TJ = 150°C
-4.0
V
VDS = VGS, ID = -250µA
–––
S
VDS = -50V, ID = -6.6A
-25
VDS = -150V, VGS = 0V
µA
-250
VDS = -120V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
V GS = -20V
66
ID = -6.6A
8.1
nC
VDS = -120V
35
VGS = -10V, See Fig. 6 and 13
–––
VDD = -75V
–––
ID = -6.6A
ns
–––
RG = 6.8Ω
–––
RD = 12Ω, See Fig. 10
D
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
S
–––
VGS = 0V
–––
pF
VDS = -25V
–––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
-13
––– –––
showing the
A
G
integral reverse
––– –––
-44
p-n junction diode.
S
––– ––– -1.6
V
TJ = 25°C, IS = -6.6A, VGS = 0V
––– 160 240
ns
TJ = 25°C, IF = -6.6A
––– 1.2 1.7
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 14mH
RG = 25Ω, IAS = -6.6A. (See Figure 12)
This is applied for I-PAK, LS of D-PAK is measured between lead and
center of die contact
ISD ≤-6.6A, di/dt ≤ -620A/µs, VDD ≤ V(BR)DSS, Uses IRF6215 data and test conditions
TJ ≤ 175°C
** When mounted on 1" square PCB (FR-4 or G-10 Material )
For recommended footprint and soldering techniques refer to application note #AN-994
2
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IRFR/U6215
100
100
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
TOP
-ID , Drain-to-Source Current (A )
-ID , D rain-to-S ource C urrent (A )
TOP
10
20 µ s P U L S E W ID TH
T c = 25 °C
A
-4 .5 V
1
1
10
10
-4 .5V
2 0µ s P U LS E W ID TH
T C = 1 75 °C
1
100
1
10
-VD S , D rain-to-S ource V oltage (V )
-VD S , D rain-to-S ource V oltage (V )
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
2.5
R D S (on) , Drain-to-S ource O n Resistance
(N orm alized)
-I D , D rain-to -So urc e C urre nt (A )
100
TJ = 2 5 °C
T J = 1 7 5 °C
10
V D S = -5 0 V
2 0 µ s P U L S E W ID T H
1
4
5
6
7
8
9
-VG S , G a te -to -S o u rc e V o lta g e (V )
Fig 3. Typical Transfer Characteristics
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A
100
10
A
I D = -11 A
2.0
1.5
1.0
0.5
VG S = -1 0V
0.0
-60
-40
-20
0
20
40
60
80
A
100 120 140 160 180
T J , Junction T em perature (°C )
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFR/U6215
V GS
C is s
C rs s
C o ss
C , Capacitance (pF)
1600
=
=
=
=
20
0V ,
f = 1M H z
C g s + C g d , Cd s S H O R T E D
C gd
C d s + C gd
-V G S , G ate-to-S ource V oltage (V )
2000
C iss
1200
C oss
800
C rss
400
0
A
1
10
I D = -6 .6 A
16
12
8
4
FO R TE S T CIR C U IT
S E E FIG U R E 1 3
0
100
0
-VD S , D rain-to-S ourc e V oltage (V )
40
60
A
80
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
100
O P E R A TIO N IN TH IS A R E A L IM ITE D
B Y R D S (o n)
10µ s
-I D , D rain C urrent (A)
-I S D , Reverse D rain Current (A )
20
Q G , Total G ate C harge (nC )
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
TJ = 17 5 °C
10
T J = 2 5°C
1
100µ s
10
1m s
VG S = 0 V
0.1
0.2
0.6
1.0
1.4
-VS D , S ourc e-to-D rain V oltage (V )
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
V D S = -12 0V
V D S = -75 V
V D S = -30 V
A
1.8
T C = 25 °C
T J = 17 5°C
S ing le P u lse
1
1
10m s
10
100
A
1000
-VD S , D rain-to-S ourc e V oltage (V )
Fig 8. Maximum Safe Operating Area
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IRFR/U6215
14
RD
VDS
VGS
12
D.U.T.
-ID , Drain Current (A)
RG
+
10
VDD
-10V
8
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
6
Fig 10a. Switching Time Test Circuit
4
td(on)
2
tr
t d(off)
tf
VGS
10%
0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
90%
Fig 9. Maximum Drain Current Vs.
Case Temperature
VDS
Fig 10b. Switching Time Waveforms
Therm al R es ponse (Z thJ C )
10
1
D = 0 .5 0
0 .2 0
0 .1 0
PD M
0 .0 5
0.1
t
0 .0 2
0 .0 1
1
t2
S IN G L E P U L S E
(T H E R M A L R E S P O N S E )
N o te s :
1 . D u ty f ac to r D = t
1
/t
2
2 . P e a k TJ = P D M x Z th J C + T C
0.01
0.00001
0.0001
0.001
0.01
A
0.1
1
t 1 , R e cta n g u la r P uls e D u ratio n (se c )
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U6215
D .U .T
RG
A
IA S
-2 0 V
tp
VD D
D R IV E R
0 .0 1Ω
15V
Fig 12a. Unclamped Inductive Test Circuit
IAS
E A S , S ingle P ulse A valanche E nergy (m J)
800
L
VDS
TO P
B O TTO M
ID
-2 .7A
-4 .7A
-6.6 A
600
400
200
0
A
25
50
75
100
125
150
175
S tarting T J , J unc tion T em perature (°C )
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
tp
V (BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
-10V
QGS
QGD
D.U.T.
+VDS
VGS
VG
-3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFR/U6215
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
•
•
•
•
RG
*
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
D=
Period
P.W.
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRFR/U6215
Package Outline
TO-252AA Outline
Dimensions are shown in millimeters (inches)
2 .3 8 (.0 9 4 )
2 .1 9 (.0 8 6 )
6 .7 3 (.2 6 5 )
6 .3 5 (.2 5 0 )
1 .1 4 (.0 4 5 )
0 .8 9 (.0 3 5 )
-A 1 .2 7 (.0 5 0 )
0 .8 8 (.0 3 5 )
5 .4 6 (.2 1 5 )
5 .2 1 (.2 0 5 )
0 .5 8 (.0 2 3 )
0 .4 6 (.0 1 8 )
4
6 .4 5 (.2 4 5 )
5 .6 8 (.2 2 4 )
6 .2 2 (.2 4 5 )
5 .9 7 (.2 3 5 )
1 .0 2 (.0 4 0 )
1 .6 4 (.0 2 5 )
1
2
1 0 .4 2 (.4 1 0 )
9 .4 0 (.3 7 0 )
3
0 .5 1 (.0 2 0 )
M IN .
-B 1 .5 2 (.0 6 0 )
1 .1 5 (.0 4 5 )
3X
1 .1 4 (.0 4 5 )
2 X 0 .7 6 (.0 3 0 )
0 .8 9 (.0 3 5 )
0 .6 4 (.0 2 5 )
0 .2 5 (.0 1 0 )
2 .2 8 (.0 9 0 )
4 .5 7 (.1 8 0 )
L E A D A S S IG N M E N T S
1 - GATE
2 - D R A IN
3 - SOURCE
4 - D R A IN
0 .5 8 (.0 2 3 )
0 .4 6 (.0 1 8 )
M A M B
N O TE S :
1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 .
2 C O N T R O L L IN G D IM E N S IO N : IN C H .
3 C O N F O R M S T O J E D E C O U T L IN E T O -2 5 2 A A .
4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP ,
S O L D E R D IP M A X . + 0 .1 6 (.0 0 6 ).
Part Marking Information
TO-252AA (D-PARK)
E XA M P L E : T H IS IS A N IR F R 1 2 0
W IT H A S S E M B L Y
LOT COD E 9U1P
IN T E R N A T IO N A L
R E C T IF IE R
LO GO
A
IR F R
120
9U
ASS EMB LY
LOT CODE
8
F IR S T P O R T IO N
OF PART NUMBER
1P
S E C O N D P O R TIO N
OF PART NUMBER
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IRFR/U6215
Package Outline
TO-251AA Outline
Dimensions are shown in millimeters (inches)
6 .7 3 (.2 6 5 )
6 .3 5 (.2 5 0 )
-A -
2 .3 8 (.0 9 4 )
2 .1 9 (.0 8 6 )
0 .5 8 (.0 2 3 )
0 .4 6 (.0 1 8 )
1 .2 7 (.0 5 0 )
0 .8 8 (.0 3 5 )
5 .4 6 (.2 1 5 )
5 .2 1 (.2 0 5 )
L E A D A S S IG N M E N T S
1 - GATE
2 - D R A IN
3 - SOURCE
4 - D R A IN
4
6 .4 5 (.2 4 5 )
5 .6 8 (.2 2 4 )
6 .2 2 (.2 4 5 )
5 .9 7 (.2 3 5 )
1 .5 2 (.0 6 0 )
1 .1 5 (.0 4 5 )
1
2
3
-B 2 .2 8 (.0 9 0 )
1 .9 1 (.0 7 5 )
3X
1 .1 4 (.0 4 5 )
0 .7 6 (.0 3 0 )
2 .2 8 (.0 9 0 )
N O TE S :
1 D IM E N S IO N IN G & T O L E R A N C IN G P E R A N S I Y 1 4 .5 M , 1 9 8 2 .
2 C O N T R O L L IN G D IM E N S IO N : IN C H .
3 C O N F O R M S T O J E D E C O U T L IN E T O -2 5 2 A A .
4 D IM E N S IO N S S H O W N A R E B E F O R E S O L D E R D IP ,
S O L D E R D IP M A X . + 0 .1 6 (.0 0 6 ).
9 .6 5 (.3 8 0 )
8 .8 9 (.3 5 0 )
3X
1 .1 4 (.0 4 5 )
0 .8 9 (.0 3 5 )
0 .8 9 (.0 3 5 )
0 .6 4 (.0 2 5 )
0 .2 5 (.0 1 0 )
2X
M A M B
0 .5 8 (.0 2 3 )
0 .4 6 (.0 1 8 )
Part Marking Information
TO-251AA (I-PARK)
E XA M P L E : TH IS IS A N IR F U 1 2 0
W IT H A S S E M B L Y
LOT CODE 9U1P
IN TE R N A T IO N A L
R E C TIF IE R
LO G O
IR F U
12 0
9U
AS SEMBLY
LOT CODE
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F IR S T P O R TIO N
OF PART NUMBER
1P
S E C O N D P O R TIO N
OF PART NUM BER
9
IRFR/U6215
Tape & Reel Information
TO-252AA
TR
TRR
1 6.3 ( .641 )
1 5.7 ( .619 )
12 .1 ( .4 76 )
11 .9 ( .4 69 )
F E E D D IR E C T IO N
TR L
16.3 ( .64 1 )
15.7 ( .61 9 )
8 .1 ( .3 18 )
7 .9 ( .3 12 )
F E E D D IR E C T IO N
NO T ES :
1. C O N T R O LL IN G D IM E N S IO N : M ILLIM E T E R .
2. A LL D IM E N S IO N S A R E S H O W N IN M ILL IM E T E R S ( IN C H E S ).
3. O U T L IN E C O N F O R M S T O E IA -4 81 & E IA -54 1.
13 IN C H
16 m m
NOTES :
1. O U T LIN E C O N F O R M S T O E IA -481 .
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T 3Z2, Tel: (905) 453 2200
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: 171 (K&H Bldg.) 30-4 Nishi-ikebukuro 3-chome, Toshima-ku, Tokyo Japan Tel: 81 33 983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 16907 Tel: 65 221 8371
Data and specifications subject to change without notice.
5/98
10
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