X-MPC574XG-256DS Daughter Card Schematics

5
4
3
2
1
Calypso Customer EVB 256 BGA Daughter Card (X-MPC574XG-256DS)
Table Of Contents:
D
Sheet 2
Sheet 3
Sheet 4
Sheet 5
Sheet 6
Sheet 7
Sheet 8
Power - Calypso power pins footprint
Power - Calypso Decoupling Capacitors
GPIO - Calypso GPIO pins 1 of 2
GPIO - Calypso GPIO pins 2 of 2
Clocks
Bus Termination
Daughtercard Connectors
Revision Information
Rev Date
X1 11 Mar 2013
X2 13 Mar 2013
X3 15 Mar 2013
X4 29 Mar 2013
X5 15 Apr 2013
15 Apr 2013
A
Designer
Alasdair Robertson
Alasdair Robertson
Alasdair Robertson
Alasdair Robertson
Alasdair Robertson
Alasdair Robertson
Comments
Initial release sent for review based on X-MPC574XG-324DS X2
Version sent to Pre Layout, incorporating fixes from review
Component consolodation, Few minor changes. Sent to Layout
Changes made during layout to Daughtercard Connectors
LAY RefDes Re-Sequence & SCH Back-Annotate
Post Layout (Back Annotated). Matches PCB RevA
D
C
C
Using Bolero 3M with the Calypso 256BGA daughter card:
- Pin C8 PORST on Calypso is VSS_LV on B3m. To use with B3M, Ground the PORST header
(on the main board)
- Pin H2 VDD_HV_FLA on Calypso is VDD_HV_A on B3M. If VDD_HV_A is 3.3V then fit the
VDD_HV_FLA jumper on Calyspo main board. If wanting to run VDD_HV_A at 5V then need to
supply 5v to pin2 of the VDD_HV_FLA jumper
Caution:
- Pin K2 VDD_LP_DEC on Calypso is VSS_LV on B3M. Replace LVDEC_CAP (1uF) with a zero
ohm link to short pin to GND
These schematics are provided for reference purposes only. As such,
Freescale does not make any warranty, implied or otherwise, as to the
suitability of circuit design or component selection (type or value) used in
these schematics for hardware design using the Freescale Calypso family
of Microprocessors. Customers using any part of these schematics as a
basis for hardware design, do so at their own risk and Freescale does not
assume any liability for such a hardware design.
B
- VSS_HV on Calypso is VDD_LV on B3M. No impact (both common grounds)
- Pin M9 VIN1_CMP_REF on Calypso is a Port on B3M. Remove jumper header from
VIN1_CMP_REF pin
B
- Pin M10 VDD_HV_C on Calypso is a Port on B3M. Remove VDD_HV_C jumper header
- Pin M11 VDD_HV_ADC1 on Calypso is a port on B3M. Remove zero ohm link between HV_AD1
and ADC1_REF. There are also 2 caps on this pin that could be removed but should not
pose a problem if pin is not used.
Notes:
- Pin M12 Pm14 is PL11 on B3M. No issues, just be careful of pin assignments.
All components and board processes are to be ROHS compliant
All small capacitors are 0402 unless otherwise stated
All resistors are 0603 5% 0.1w unless otherwise stated. All zero ohm links are 0603
All connectors and headers are denoted Px and are 2.54mm pitch unless otherwise stated
Automotive Microcontroller Applications
All jumpers are denoted Jx. Jumpers are 2mm pitch
East Kilbride, Scotland
Jumper default positions are shown in the schematics. For 3 way jumpers, default is always posn 1-2.
Freescale General Business Use
2 Pin jumpers generally have the "source" on pin 1.
- All switches are denoted SWx
This document contains information proprietary to Freescale and shall not be used for engineering design,
- All test points are denoted TPx
A
AISG
East Kilbride
procurement or manufacture in whole or in part Freescale
without the express
writtenApplications,
permission of Freescale
- Test point Vias are denoted TPVx
-
A
Designer:
Drawing Title:
A. Robertson
Drawn by:
User notes are given throughtout the schematics.
Specific PCB LAYOUT notes are detailed in ITALICS
Approved:
A. Robertson
5
Calypso 256 BGA Daughter Card
Page Title:
A. Robertson
4
3
2
Index and Title Page
Size
B
Document Number
Date:
Friday, May 03, 2013
SCH-27899
Rev
A
PDF: SPF-27899
Sheet
1
1
of
8
5
4
3
Calypso MCU Power Connections
2
Caution:
Default Configuraiton:
- ALL MCU supply voltages are set to 3.3V (ADC0, ADC1, VDD_HV_A,
VDD_HV_B, VDD_HV_C, VBallast)
- VDD_HV_FLA = External 3.3V supplied (jumper fitted)
- VDD_LV Supplied from ballast transistor
- If VDD_HV_A is driven from 5V, the VDD_HV_FLA pin
must not be supplied from 3.3V (remove the HVA_FLA
jumper)
- Don't attempt to over drive an analogue pad to 5V
when the digital VDD_HV_x supply is set to 3.3V. This
will trigger the ESD protectrion on that pad. For
example if VDD_HV_A is set to 3.3V and the analogue
supplies are set to 5V, you cannot drive 5V into a
pad in the VDD_HV_A domain
D
J8
Individual MCU
supply control
jumpers
E_CAP
2
C
LVDEC_CAP
R35
0
DAC External
Ref Voltage
Select
J11
Q20
MJD31CT4
1
3
1
2
HVFLA_CAP
HVC_CAP
HVB_CAP
HVA_CAP
5v0
J9
2
2
J7
3v3
3 1
3v3
5v0
D
TPH3
1
3v3
3
3
1
3
5v0
0
ADC1REF_CAP
(Current Limit Resistor to
protecxt against case when
other MCU supplies are
disconnected and external
reference supply is live)
R36
1.0K
J10
2
ADC1_CAP
3v3
J6
2
J5
R7
ADC0_CAP
5v0
1
2
J4
3v3
1
5v0
3
1
3v3
2
J3
C
3
5v0
1
3
1
3v3
1
MCU_3V3_L
4 2
MCU_5V0_L
8 MCU_3V3_L
3
MCU_3V3_S
8 MCU_5V0_L
LV_CAP
MCU_5V0_S
8 MCU_3V3_S
B_CAP
8 MCU_5V0_S
1
MCU_1V25_L
This is not necessarily the same as the default shown in the RM. All
VDD_HV_x domains have at least one peripheral that only functions at
3.3V. Therefore the default is to run these from 3.3V. The analogue pins
can only be driven to the same voltage as the VDD_HV_x domain they are
situated in (ie max 3.3V) so makes sense for the analogue supply and
reference to be 3.3V
HVA_CAP
From MCU
supply
jumpers on
main board
8 MCU_1V25_L
1
DAC Ref
M9
VIN1_CMP_REF
K2
D8
E5
H14
J3
K10
K11
L10
L11
VDD_LP_DEC
VRC_CTRL
VDD_LV_D8
VDD_LV_E5
VDD_LV_H14
VDD_LV_J3
VDD_LV_K10
VDD_LV_K11
VDD_LV_L10
VDD_LV_L11
J2
H2
VDD_HV_FLA_H2
-
1.25v Core & External Ballast
1
1
1
2
1
E6
H6
H7
H15
J6
J7
J8
K6
K7
K8
K9
L6
L7
L8
L9
0
1
R24
ADC0_GND
ADC1_GND
GND
B
more VDD_HV_A on 256BGA
fewer VDD_HV_B
fewer VDD_LV
more VSS_HV
fewer VSS_LV
VSS_LV_E6
VSS_LV_H6
VSS_LV_H7
VSS_LV_H15
VSS_LV_J6
VSS_LV_J7
VSS_LV_J8
VSS_LV_K6
VSS_LV_K7
VSS_LV_K8
VSS_LV_K9
VSS_LV_L6
VSS_LV_L7
VSS_LV_L8
VSS_LV_L9
VSS_HV_VPP
J1
G6
G7
G8
G9
G10
G11
H8
H9
H10
H11
J9
J10
J11
T9
M16
Flash
Differences to 324BGA
Power Pins
VSS_HV_G6
VSS_HV_G7
VSS_HV_G8
VSS_HV_G9
VSS_HV_G10
VSS_HV_G11
VSS_HV_H8
VSS_HV_H9
VSS_HV_H10
VSS_HV_H11
VSS_HV_J9
VSS_HV_J10
VSS_HV_J11
VSS_HV_T9
VSS_HV_ADC1
Package 2of3
VSS_HV_ADC0
VDD_HV_C_M10
VDD_HV_B_G13
Calypso 6M 256 BGA
Analogue
T15
M10
G13
C2
C9
E16
H13
N6
N9
R9
VDD_HV_A_C2
VDD_HV_A_C9
VDD_HV_A_E16
VDD_HV_A_H13
VDD_HV_A_N6
VDD_HV_A_N9
VDD_HV_A_R9
M11
L16
VDD_HV_ADC1_REF
B
VDD_HV_ADC1
U1B
PPC5748GSK0MMJ6 + OTB-256(324R)-1.0-006-00
VDD_HV_ADC0
R15
TPH2
TPH1
GND
Automotive Microcontroller
Applications
East Kilbride, Scotland
GND
A
A
Freescale General Business Use
Drawing Title:
Ground Links
(0 Ohm
Resistors)
5
4
R9
0
R10
Calypso 256 BGA Daughter Card
0
Page Title:
ADC0_GND
GND
ADC1_GND
3
Calypso MCU Power
GND
2
Size
B
Document Number
Date:
Friday, May 03, 2013
SCH-27899
Rev
A
PDF: SPF-27899
Sheet
1
2
of
8
5
4
3
2
1
Calypso MCU Decoupling and bulk storage
Capacitor Types:
470pF - Ceramic COG, 50v 5% 0402
1000pF - Ceramic COG, 50V 5% 0402
4700pF - Ceramic X7R, 50V 10% 0402
Flash
ADC
ADC0_CAP
ADC1_CAP
C48
1000pF
ADC1REF_CAP
C46
1000pF
HVFLA_CAP
D
C2
10UF
DNP
+
C3
10UF
DNP
C59
1.0 UF
C56
0.1UF
ADC0_GND
+
C47
C58
1.0 UF
1000pF
C55
0.1UF
ADC1_GND
C36
C57
1.0 UF
C34
2.2UF
LMK107B7225KA-T
(low ESR)
1000pF
ADC1_GND
0.01uF
0.1uF
0.68uF
1.0uF
2.2uF
-
- Ceramic X7R, 50V 10% 0402
Ceramic X7R, 16V 10% 0402
Ceramic X7R 16V 10% 0805 (Murata GCM219R71C684KA37 )
Ceraminc X7R, 10V 10% 0603 (Taiyo Yuden LMK107B7105KA-T)
Ceraminc X7R, 10V, 10%, 0603 (Taiyo Yuden LMK107B7225KA-TR)
4.7uF
10uF
- TANT, 12.5V 20% ESR=0.08R 7343
- TANT, 35V 10% ESR=0.125R CC7343-31
D
4.7uF Alternative (150-78844)- Polymer ALU, 16V 20% ESR=0.08R
7343-18
GND
Place small Caps as close as possible to MCU pins
VDD_HVA
VDD_HVB
HVA_CAP
C27
470pF
C51
1000pF
C22
470pF
C54
1000pF
C28
470pF
C37
1000pF
C40
470pF
+ C1
10UF
C
VDD_HVC
HVB_CAP
HVC_CAP
C33
470pF
+ C4
10UF
DNP
C26
0.1UF
GND
C52
0.1UF
C23
0.1UF
C53
0.1UF
C30
0.1UF
C38
0.1UF
C41
0.1UF
C42
1000pF
+ C5
10UF
DNP
C35
0.1UF
GND
C
C44
0.1UF
GND
Place 10uF cap to west side of package
Place small caps close to each MCU pin
Ballast Transistor
VDD_LV
LV_CAP
C24
0.1UF
C50
0.1UF
DNP
C49
0.1UF
C25
0.1UF
DNP
B_CAP
C8
C32
0.1UF
C39
0.1UF
C45
0.1UF
DNP
LP Internal Reg Cap
E_CAP
C21
0.1UF
DNP
LV_CAP
LVDEC_CAP
4700pF
C9
2.2UF
DNP
(low
ESR)
Place
close to
transistor
B
GND
E_CAP
C10
2.2UF
DNP
(low
ESR)
C29
0.68uF
(low
ESR)
C60
0.68uF
(low
ESR)
C31
0.68uF
(low
ESR)
C20
0.68uF
DNP
(low
ESR)
C43
1uF
LMK107B7105KA-T
(low ESR)
B
(Murata GCM219R71C684KA37)
GND
VDD_LV (1.25V) Decoupling. Place one of the non DNP caps each side of the device
as close as possible to pin. Distribute other (DNP) caps around rest of pins
GND
2.2uF caps
are DNP.
Place close
to emitter
See caps below for Bypass Transistor bulk storage (some on VDD1V2 rail)
GND
Place one 0.68uF cap footprint
each side of package
One of these is DNP. May replace 2 caps with
0.47uF to keep overall capacitance within limits
Differences to 324BGA
A
Automotive Microcontroller
Applications
East Kilbride, Scotland
- 1 more VDD_HV_A capacitor pair
- 1 fewer VDD_HV_B capacitor pair
- 1 fewer VDD_LV capacitor (one of DNP caps)
A
Freescale General Business Use
Drawing Title:
Calypso 256 BGA Daughter Card
Page Title:
Calypso MCU Decoupling
5
4
3
2
Size
B
Document Number
Date:
Friday, May 03, 2013
SCH-27899
Rev
A
PDF: SPF-27899
Sheet
1
3
of
8
5
4
3
2
1
Calypso GPIO 1 of 2
U1A
** PA1 is also NMI. Routed to I/O Matrix
D
(WKPU2 / NMI0)
(WKPU3)
Key to text colours:
Purple
Orange
Blue
Black
RED
Green
-
Comms Physical Interfaces
Other Peripherals and I/O
Debug (JTAG & Nexus)
Clock, Reset and Control
I/O Matrix and other functions (eg LED)
I/O Matrix (dedicated)
C
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
(SD_CD - WKPU19)
(SW1 & GPIO**)
(SW2 & GPIO)
(MII_RXCLK)
(CMP1_13 / IO)
(SAI_GPIO)
(MLB_GPIO)
(MII_RXD2)
(RMII_RXD1)
(RMII_RXD0)
(MII_COL)
(RMII_RXER)
(CMP1_15 / IO)
(CMP1_14 / IO)
(CMP1_12 / IO)
(CMP1_10 / IO)
8
8
8
8
8
8
8
8
6
6
8
8
8
7
7
7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
(CAN0_TX)
(CAN0_RX)
(LIN0_TX)
(LIN0_RX)
(ADC_POT)
(GPIO)
(GPIO)
(GPIO)
(XTAL32)
(EXTAL32)
(SAI0_SYNC)
(GPIO)
(GPIO)
(MLB_DN)
(MLB_SN)
(MLB_CN / SIG)
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
L3
M2
A2
D4
T16
N13
N14
R16
T11
T10
N7
M13
L14
L15
K15
K16
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
(TDI)
(TDO)
(USB1_CLK)
(USB1_DIR)
(FR_B_TX_EN)
(FR_A_TX)
(LIN1_TX)
(LIN1_RX)
(RS232_TX)
(RS232_RX)
(CAN1_TX)
(CAN1_RX)
(FR_DBG0)
(FR_DBG1)
(FR_DBG2)
(FR_DBG3)
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
B10
D9
B11
C11
A9
B9
N3
N4
B3
C3
L1
K4
B4
A3
B2
A1
8
8
8
8
8
8
8
8
8
8
8
8
8
8
7
7
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
PD10
PD11
PD12
PD13
PD14
PD15
(HEX1 & GPIO)
(HEX2 & GPIO)
(HEX3 & GPIO)
(HEX4 & GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO & MLB_ST)
(MLB_DP)
(MLB_SP / DAT)
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
PD10
PD11
PD12
PD13
PD14
PD15
R12
T13
N11
R13
P12
T14
R14
P13
P14
N16
M14
M15
L13
K14
K13
J13
8
8
MCU-RSTx
PORSTx
MCU-RSTx
PORSTx
K1
C8
6
6
MCU-XTAL
MCU-EXTAL
MCU-XTAL
MCU-EXTAL
T7
T8
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
G4
F3
F1
G16
T2
C10
D11
C15
B16
B15
A15
B14
P6
R5
P4
R2
B
A
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
Calypso 256 BGA
Package 1of3 GPIO Pins1
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
PE8
PE9
PE10
PE11
PE12
PE13
PE14
PE15
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
PB15
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
PF8
PF9
PF10
PF11
PF12
PF13
PF14
PF15
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
PC15
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PG8
PG9
PG10
PG11
PG12
PG13
PG14
PG15
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
PD10
PD11
PD12
PD13
PD14
PD15
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PH7
PH8
PH9
PH10
PH11
PH12
PH13
PH14
PH15
G2
F4
A7
A10
A8
B8
B6
A5
G1
H1
G3
H3
C14
C16
A14
C12
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
PE8
PE9
PE10
PE11
PE12
PE13
PE14
PE15
(MLB_I2C1_SCL)
(MLB_I2C1_SDA)
(FR_A_TX_EN)
(FR_A_RX)
(FR_B_TX)
(FR_B_RX)
(SD_CMD)
(SD_CLK)
(SAI_I2C2_SDA)
(SAI_I2C2_SCL)
(SAI_I2C3_SDA)
(SAI_I2C3_SCL)
(MII_CRS)
(MII_RXD3)
(USB1_D2)
(USB1_D3)
P7
T6
R6
R7
R8
P8
N8
P9
N2
M4
P2
R1
P1
P3
D14
D15
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
PF8
PF9
PF10
PF11
PF12
PF13
PF14
PF15
(SAI0_MCLK)
(SAI0_BCLK)
(SAI0_D3)
(SAI0_D2)
(SAI0_D1)
(SAI0_D0)
(SAI1_SYNC)
(SAI1_MCLK)
(GPIO)
(SW3 & GPIO) WKPU22
(CMP1_8 / IO)
(SW4 & GPIO) WKPU15
(GPIO)
(CMP1_11 /IO)
(RMII_MDIO)
(RMII_RXDV)
E13
E14
E4
E1
F2
D1
M1
L2
K3
J4
B13
A16
F15
F16
C13
D13
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PG8
PG9
PG10
PG11
PG12
PG13
PG14
PG15
(RMII_MDC)
(RMII_TXCLK)
(LED1 & GPIO)
(LED2 & GPIO)
(LED3 & GPIO)
(LED4 & GPIO)
(CLKOUT1 GPIO)
(CLKOUT0 GPIO)
(GPIO)
(MLB_IRQ - WKPU21)
(USB1_D4)
(USB1_D5)
(MII_TXD2)
(MII_TXD3)
(USB1_D0)
(USB1_D1)
E15
F13
D16
F14
D7
B7
C7
C6
A6
A11
D10
A13
B12
B1
C1
E3
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PH7
PH8
PH9
PH10
PH11
PH12
PH13
PH14
PH15
(RMII_TXD1)
(RMII_TXD0)
(RMII_TXEN)
(eMIOS1_UC_5H)
(eMIOS1_UC_6H)
(eMIOS1_UC_7H)
(MLB_RST)
(MLB_PWR)
(SD_WP)
(TCK)
(TMS)
(USB1_D6)
(USB1_D7)
(GPIO)
(GPIO)
(GPIO)
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
PE8
PE9
PE10
PE11
PE12
PE13
PE14
PE15
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
PF8
PF9
PF10
PF11
PF12
PF13
PF14
PF15
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PG8
PG9
PG10
PG11
PG12
PG13
PG14
PG15
7
8
8
8
8
8
8
8
8
8
8
8
7
7
8
8
PH0
PH1
PH2
PH3
PH4
PH5
PH6
PH7
PH8
PH9
PH10
PH11
PH12
PH13
PH14
PH15
7
7
7
8
8
8
8
8
8
8
8
8
8
8
8
8
D
C
(eMIOS
(eMIOS
(eMIOS
(eMIOS
E1UC_11_H)
E1UC_12_H)
E1UC_13_H)
E1UC_14_H)
B
Differences to 324BGA
(none on this page)
RESET
PORST
Automotive Microcontroller
Applications
East Kilbride, Scotland
XTAL
EXTAL
A
Freescale General Business Use
Drawing Title:
PPC5748GSK0MMJ6 + OTB-256(324R)-1.0-006-00
Page Title:
5
4
3
2
Calypso 256 BGA Daughter Card
Calypso GPIO 1of2
Size
B
Document Number
Date:
Friday, May 03, 2013
SCH-27899
Rev
A
PDF: SPF-27899
Sheet
1
4
of
8
5
4
3
2
1
Calypso GPIO 2 of 2
U1C
Key to text colours:
D
Purple
Orange
Blue
Black
RED
Green
-
Comms Physical Interfaces
Other Peripherals and I/O
Debug (JTAG & Nexus)
Clock, Reset and Control
I/O Matrix and other functions (eg LED)
I/O Matrix (dedicated)
C
PI0
PI1
PI2
PI3
PI4
PI5
PI6
PI7
PI8
PI9
PI10
PI11
PI12
PI13
PI14
PI15
C5
A4
D6
B5
A12
D12
D2
E2
J14
J15
J16
H16
G15
G14
T12
P11
8
8
8
8
8
8
8
8
7
8
8
8
8
8
8
8
PI0
PI1
PI2
PI3
PI4
PI5
PI6
PI7
PI8
PI9
PI10
PI11
PI12
PI13
PI14
PI15
(SD_D3)
(SD_D2)
(SD_D1)
(SD_D0)
(USB1_STP)
(USB1_NXT)
(USB0_RST)
(USB1_RST)
(MLB_CP / CLK)
(GPIO)
(GPIO)
(ENET_RST)
(GPIO & MLB_PS0)
(GPIO & MLB_PS1)
(SAI2_D0)
(SAI2_MCLK)
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
PJ0
PJ1
PJ2
PJ3
PJ4
PJ5
PJ6
PJ7
PJ8
PJ9
PJ10
PJ11
PJ12
PJ13
PJ14
PJ15
(SAI2_SYNC)
(SAI2_BCLK)
(SAI1_D0)
(SAI1_BCLK)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
PJ0
PJ1
PJ2
PJ3
PJ4
PJ5
PJ6
PJ7
PJ8
PJ9
PJ10
PJ11
PJ12
PJ13
PJ14
PJ15
R11
N10
R10
P10
D3
N12
N15
P16
P15
P5
T5
R3
T1
N5
T4
R4
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
PK0
PK1
PK2
PK3
PK4
PK5
PK6
PK7
PK8
PK9
PK10
PK11
PK12
PK13
PK14
PK15
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
PK0
PK1
PK2
PK3
PK4
PK5
PK6
PK7
PK8
PK9
PK10
PK11
PK12
PK13
PK14
PK15
T3
H4
L4
N1
M3
M5
M6
M7
M8
E8
E7
F8
G12
H12
J12
D5
8
8
PL0
PL1
(GPIO)
(GPIO)
PL0
PL1
B
C4
F7
PI0
PI1
PI2
PI3
PI4
PI5
PI6
PI7
PI8
PI9
PI10
PI11
PI12
PI13
PI14
PI15
Calypso 256 BGA
Package 3of3 GPIO Pins2
PM3
PM4
PM5
PM14
K12
L12
F9
PM3
PM4
PM5
M12 PM14
(GPIO)
(GPIO)
(GPIO)
(GPIO)
(GPIO)
PM3
PM4
PM5
8
8
8
PM14
8
D
PJ0
PJ1
PJ2
PJ3
PJ4
PJ5
PJ6
PJ7
PJ8
PJ9
PJ10
PJ11
PJ12
PJ13
PJ14
PJ15
C
PK0
PK1
PK2
PK3
PK4
PK5
PK6
PK7
PK8
PK9
PK10
PK11
PK12
PK13
PK14
PK15
PO0
PO1
K5
L5
PO0
PO1
(GPIO)
(GPIO)
PO0
PO1
8
8
B
PL0
PL1
Differences to 324BGA
PP12
PP13
PP14
PP15
8
8
8
8
8
8
8
8
A
PQ0
PQ1
PQ2
PQ3
PQ4
PQ5
PQ6
PQ7
(USB0_STP)
(USB0_CLK)
(USB0_DIR)
(USB0_NXT)
(USB0_D7)
(USB0_D6)
(USB0_D5)
(USB0_D4)
PQ0
PQ1
PQ2
PQ3
PQ4
PQ5
PQ6
PQ7
J5
H5
G5
F5
F6
E9
F10
E10
E12
F12
E11
F11
PP12
PP13
PP14
PP15
(USB0_D3)
(USB0_D2)
(USB0_D1)
(USB0_D0)
PP12
PP13
PP14
PP15
PQ0
PQ1
PQ2
PQ3
PQ4
PQ5
PQ6
PQ7
8
8
8
8
pins
pins
pins
pins
pins
on
on
on
on
on
Port
Port
Port
Port
Port
L
M
N
O
P
Automotive Microcontroller
Applications
East Kilbride, Scotland
A
Freescale General Business Use
Drawing Title:
PPC5748GSK0MMJ6 + OTB-256(324R)-1.0-006-00
4
fewer
fewer
fewer
fewer
fewer
(And corresponding changes
to daughtercard connectors)
Page Title:
5
14
12
16
14
12
3
2
Calypso 256 BGA Daughter Card
Calypso GPIO 2of2
Size
B
Document Number
Date:
Friday, May 03, 2013
SCH-27899
Rev
A
PDF: SPF-27899
Sheet
1
5
of
8
5
4
3
2
1
Clocks
D
D
Oscillators and External Clock
4
PB9
EXT-CLK
(From SMA connector on main board)
C62
PB9
(EXTAL32)
R33
1.0M
DNP
C
12PF
3
Y20
32.768KHZ
C
2
PB8
C61
12PF
FC-255 32.7680K-A3
(Load Capacitance 7pF)
4
MCU-EXTAL
4
MCU-XTAL
J2
R8
1.0M
DNP
GND
Y1
40.0MHZ
J1
MCU-EXTAL
1
MCU-XTAL
EXTAL
12PF
1
PB8
(XTAL32)
1
1
4
C7
2
EXT-CLK
2
8
XTAL
C6
12PF
2
R34
3
GND
0
NX8045GB-40.000M-STD-CSJ-1 XTAL
(Optimised for Automotive, 8pF Load capacitance)
DNP
GND
B
B
Automotive Microcontroller
Applications
East Kilbride, Scotland
A
A
Freescale General Business Use
Drawing Title:
Calypso 256 BGA Daughter Card
Page Title:
5
4
3
2
Clocks
Size
B
Document Number
Date:
Friday, May 03, 2013
SCH-27899
Rev
A
PDF: SPF-27899
Sheet
1
6
of
8
5
4
3
2
1
High Speed Signal Termination
D
D
Ethernet Termination
4
4
4
4
4
PG13
PG12
PH0
PH1
PH2
4
PG0
PG13
PG12
PH0
PH1
PH2
PG0
R4
R6
R5
R3
R1
50
50
50
50
50
R2
50
PG13-R
PG12-R
PH0-R
PH1-R
PH2-R
PG0-R
PG13-R
PG12-R
PH0-R
PH1-R
PH2-R
8
8
8
8
8
PG0-R
8
MLB_DAT
MLB_SIG
MLB_CLK
8
8
8
MLB_SN
8
MLB_SP
8
MLB_DN
8
MLB_DP
8
MLB_CN
8
MLB_CP
8
Place resistors as close as possible to MCU
MLB Termination
MLB_DAT
MLB_SIG
MLB_CLK
C
R20
100
DNP
4
4
PB14
PD15
4
PB13
4
PD14
4
PB15
5
PI8
R25
100
DNP
C
R29
100
DNP
PB14
R23
0
MLB_SN
PD15
R21
0
MLB_SP
PB13
R30
0
MLB_DN
PD14
R32
0
MLB_DP
PB15
R26
0
MLB_CN
PI8
R28
0
MLB_CP
R22
105.0 1%
(PD[15] Shared with MLB_DAT for 3-pin mode)
R31
105.0 1%
(PB[15] Shared with MLB_SIG for 3-pin mode)
R27
100 1%
(PI[8] Shared with MLB_CLK for 3-pin mode)
Place resistors as close as possible to MCU
From MCU
B
To Daughtercard
Layout Note - Place resistors as shown with
shared pad (as close to MCU as possible)
B
Remove R1 and
fit R2 to
enable 3-pin
signals
R1 Fitted by default
for LVDS 6-pin signals
Automotive Microcontroller
Applications
East Kilbride, Scotland
A
A
Freescale General Business Use
Drawing Title:
Calypso 256 BGA Daughter Card
Page Title:
High Speed Signal Termination
5
4
3
2
Size
B
Document Number
Date:
Friday, May 03, 2013
SCH-27899
Rev
A
PDF: SPF-27899
Sheet
1
7
of
8
5
4
3
2
1
Daughter Card Connectors (Plugs)
Notes:
Connectors on Main board (Shown for reference)
- there was no neat way to fit these connectors onto a B sized sheet so unfortunately the sheet
size has been increased to C so will need to be printed on larger paper.
- The Crystal Signals are NOT routed via the daughtercard connectors
- The Specific MCU power pins are not routed via the daughter card however the jumpered MCU
supply lines are brought up from the main board (see the top pins of the connector on the left)
D
- The connector schematic symbols have been horizontally mirrored so they match the main EVB
connector. This has no bearing on the PCB placement or footprint. Pin1 on the recepticle mates
with pin 1 on the plug.
D
P21
6
EXT-CLK
4
PB2
4
5
PE6
PI3
5
5
PI1
PI2
4
5
5
4
5
PC13
PI0
PK10
PC8
PK13
5
4
PK15
PC15
C
4
PG5
5
5
PO0
PI7
4
5
PE1
PI6
4
4
PE11
PG3
4
PE8
4
4
PG9
PA0
4
4
4
PG7
PG8
PC10
4
5
PB1
PK2
4
5
5
5
PF13
PK4
PK6
PK8
B
4
4
PF9
PA14
5
5
5
5
PJ11
PJ10
PK0
PJ9
5
4
PJ13
PA4
4
PA15
4
PB10
2
MCU_5V0_S
2
MCU_1V25_L
P20
(GND)
EXT-CLK
(GND)
PB2
(GND)
(PP11)
PE6
PI3
(PP10)
(PP5)
PI1
PI2
(PP9)
PC13
PI0
PK10
PC8
PK13
(GND)
(PP2)
PK15
PC15
(PP7)
(GND)
(PP6)
(GND)
(PO12)
(PO7)
(PO10)
(PO4)
(PO9)
(GND)
SH2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
SH4
SH1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
SH3
(GND)
(GND)
PH7
PH6
PB3
PH8
(PP8)
(GND)
(PP3)
PE7
PK9
(GND)
PC12
PK11
(GND)
(PP4)
PK14
PK12
PC9
PL0
(GND)
(PP1)
(GND)
PC14
PJ4
(GND)
(PO11)
(PO8)
(GND)
PH14
(PO13)
(GND)
(GND)
PG5
(PO14)
PO0
PI7
(PP0)
(GND)
PE1
PI6
(PO5)
PE11
PG3
(GND)
PE8
(GND)
PG9
PA0
(GND)
PG7
PG8
PC10
(GND)
(GND)
PB1
PK2
(GND)
PF13
PK4
PK6
PK8
(PN14)
(GND)
SH6
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
SH8
SH5
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
SH7
(GND)
PO1
PH13
PG4
PH15
(PO15)
PE10
PE0
(PO6)
(GND)
PG2
PA2
PE9
PA1
MCU-RSTx
(PN15)
(PO3)
(GND)
PG6
PC11
(PO2)
(GND)
PB0
PK1
PF12
(GND)
(GND)
(GND)
PK3
PK5
PF11
(GND)
(GND)
PF9
PA14
(PN13)
(GND)
(PN11)
PJ11
PJ10
PK0
PJ9
(PN9)
(GND)
PJ13
PA4
(GND)
(PN10)
PA15
(PN3)
(PN6)
(GND)
(PN0)
PB10
(GND)
(GND)
(GND)
(GND)
SH10
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
SH12
SH9
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
SH11
(GND)
PK7
PC6
PF8
(GND)
PC7
(PN12)
PJ12
(GND)
PJ15
(GND)
(PN8)
PF10
(PN7)
PJ14
(GND)
(PN4)
PA13
(GND)
(PN5)
PA12
(PN2)
PF1
PF0
(GND)
(GND)
MCU_3V3_S
MCU_5V0_S
MCU_1V25_L
(GND)
MCU_3V3_L
MCU_5V0_L
(GND)
PH7
PH6
PB3
PH8
4
4
4
4
PE7
PK9
4
5
PC12
PK11
4
5
PK14
PK12
PC9
PL0
5
5
4
5
PC14
PJ4
4
5
PH14
4
PO1
PH13
PG4
PH15
5
4
4
4
PE10
PE0
4
4
PG2
PA2
PE9
PA1
MCU-RSTx
4
4
4
4
4
PG6
PC11
4
4
PB0
PK1
PF12
4
5
4
PK3
PK5
PF11
5
5
4
4
4
4
PH10
PH4
PE5
5
5
4
PI5
PQ0
PC5
4
4
4
PG14
PH12
PC4
4
4
PC2
PA6
4
4
4
5
4
5
5
5
PH11
PA5
PE14
PQ4
PG15
PQ5
PQ7
PP15
4
4
PE12
PA11
4
4
4
4
7
7
4
PA7
PE13
PF15
PG1
PH1-R
PH0-R
PA3
4
5
PH3
PM3
5
PM14
4
4
5
4
PD13
PD12
PI11
PD10
7
7
7
MLB_DAT
MLB_SIG
MLB_CLK
(GND)
(PM11)
PH10
PH4
PE5
(PM12)
PI5
PQ0
PC5
(GND)
PG14
PH12
PC4
(GND)
(PL9)
PC2
PA6
(PL3)
PH11
PA5
PE14
PQ4
PG15
PQ5
PQ7
PP15
(GND)
(PL12)
(PL11)
(PL6)
(PL7)
(GND)
SH2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
SH4
SH1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
SH3
(GND)
PC1
PE3
PH5
PC0
PQ3
PC3
PE4
PH9
(PL10)
PE15
PORSTx
PE2
(PL4)
PG11
PQ1
(GND)
PG10
PQ2
(PL8)
PQ6
(GND)
PP13
PP12
PI4
PP14
(GND)
(PL2)
(PL5)
(PL13)
(PM0)
(GND)
(GND)
(PL15)
(PM1)
(PM2)
PE12
PA11
(GND)
PA7
PE13
PF15
PG1
PH1-R
PH0-R
PA3
(GND)
(PM8)
PH3
PM3
(PM6)
(PM13)
PM14
(GND)
PD13
PD12
PI11
PD10
(GND)
MLB_DAT
MLB_SIG
MLB_CLK
(GND)
(GND)
SH6
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
SH8
SH5
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
SH7
(GND)
(PL14)
(PM9)
(PM7)
PA10
PA9
PA8
PF14
PG0-R
PH2-R
(GND)
PG12-R
PG13-R
(GND)
(GND)
(PM10)
PM4
PL1
(GND)
PM5
PI13
PB12
PD9
PI12
PB7
PI15
(GND)
MLB_CN
MLB_CP
(GND)
(GND)
(GND)
SH10
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
SH12
SH9
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
SH11
(GND)
MLB_DN
MLB_DP
(GND)
(GND)
PI14
PJ7
PD11
PJ6
PD6
PD2
PD3
PJ8
(GND)
PB6
PD0
PI10
(GND)
PD4
PF6
(PN1)
(GND)
PF4
PF7
PF3
(GND)
(GND)
DC_3V3_S
TPV1
(GND)
MLB_SN
MLB_SP
(GND)
(GND)
PD7
PJ5
PJ0
(GND)
PD5
PB5
PB11
PD1
PJ1
(GND)
PD8
PI9
PF5
PB4
PJ2
PJ3
(GND)
(GND)
PF2
(PM15)
(GND)
(GND)
DC_5V0_S
TPV3
TPV2
DC_P12V
DC_1V25_L
PK7
PC6
PF8
5
4
4
7
7
MLB_SN
MLB_SP
PC7
4
PJ12
5
4
5
5
PD7
PJ5
PJ0
PJ15
5
PF10
4
PD5
PB5
PB11
PD1
PJ1
PJ14
5
4
4
4
4
5
PA13
4
PA12
4
4
5
4
4
5
5
PD8
PI9
PF5
PB4
PJ2
PJ3
PF1
PF0
4
4
4
PF2
MCU_3V3_S
2
MCU_3V3_L
MCU_5V0_L
2
2
PLUG 180
GND
4
4
4
4
5
4
4
4
PE15
PORSTx
PE2
4
4
4
PG11
PQ1
4
5
PG10
PQ2
4
5
PQ6
5
PP13
PP12
PI4
PP14
5
5
5
5
PA10
PA9
PA8
PF14
PG0-R
PH2-R
4
4
4
4
7
7
PG12-R
PG13-R
7
7
PM4
PL1
5
5
PM5
PI13
PB12
PD9
PI12
PB7
PI15
5
5
4
4
5
4
5
MLB_CN
MLB_CP
7
7
C
B
MLB_DN
MLB_DP
7
7
PI14
PJ7
PD11
PJ6
PD6
PD2
PD3
PJ8
5
5
4
5
4
4
4
5
PB6
PD0
PI10
4
4
5
PD4
PF6
4
4
PF4
PF7
PF3
4
4
4
TPV4
DC_3V3_L
DC_5V0_L
TPV5
TPV6
PLUG 180
Plug
Plug
A
PC1
PE3
PH5
PC0
PQ3
PC3
PE4
PH9
A
GND
GND
GND
Automotive Microcontroller
Applications
East Kilbride, Scotland
Freescale General Business Use
Drawing Title:
Calypso 256 BGA Daughter Card
Page Title:
Daughter Card Connectors (Plugs)
5
4
3
2
Size
C
Document Number
Date:
Friday, May 03, 2013
SCH-27899
Sheet
1
Rev
A
PDF: SPF-27899
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of
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