5 4 3 2 1 Calypso Customer EVB 176QFP Daughter Card (X-MPC574XG-176DS) Table Of Contents: D Sheet 2 Sheet 3 Sheet 4 Sheet 5 Sheet 6 Sheet 7 Sheet 8 Power - Calypso power pins footprint Power - Calypso Decoupling Capacitors GPIO - Calypso GPIO pins 1 of 2 GPIO - Calypso GPIO pins 2 of 2 Clocks Bus Termination Daughtercard Connectors Revision Information Rev Date X1 11 Mar 2013 X2 13 Mar 2013 X3 15 Mar 2013 X4 29 Mar 2013 X5 15 Apr 2013 15 Apr 2013 A B 22 Jul 2013 C 19 Nov 2013 D 19 Dec 2013 Designer Alasdair Robertson Alasdair Robertson Alasdair Robertson Alasdair Robertson Alasdair Robertson Alasdair Robertson Alasdair Robertson Jesus Sanchez Jesus Sanchez Comments Initial release sent for review based on X-MPC574XG-324DS X2 Version sent to Pre Layout, incorporating fixes from review Component consolodation, Added MCU GND tab. Sent to Layout Changes made during layout to Daughtercard Connectors LAY RefDes Re-Sequence & SCH Back-Annotate Post Layout (Back Annotated). Matches PCB RevA Update to accomodate extra socket pins on MCU The socket was updated, exposed center PAD is grounded. Changes on MCU Power to validate Calypso 3M D C C Caution: These schematics are provided for reference purposes only. As such, Freescale does not make any warranty, implied or otherwise, as to the suitability of circuit design or component selection (type or value) used in these schematics for hardware design using the Freescale Calypso family of Microprocessors. Customers using any part of these schematics as a basis for hardware design, do so at their own risk and Freescale does not assume any liability for such a hardware design. B B Notes: - A All components and board processes are to be ROHS compliant All small capacitors are 0402 unless otherwise stated All resistors are 0603 5% 0.1w unless otherwise stated. All zero ohm links are 0603 All connectors and headers are denoted Px and are 2.54mm pitch unless otherwise stated All jumpers are denoted Jx. Jumpers are 2mm pitch Jumper default positions are shown in the schematics. For 3 way jumpers, default is always posn 1-2. 2 Pin jumpers generally have the "source" on pin 1. - All switches are denoted SWx - All test points are denoted TPx - Test point Vias are denoted TPVx Automotive Microcontroller Applications East Kilbride, Scotland Freescale General Business Use This document contains information proprietary to Freescale and shall not be used for engineering design, procurement or manufacture in whole or in part without the express written permission of Freescale A Freescale AISG Applications, East Kilbride Designer: Drawing Title: A. Robertson Drawn by: User notes are given throughtout the schematics. Specific PCB LAYOUT notes are detailed in ITALICS Approved: A. Robertson 5 Calypso 176 QFP Daughter Card Page Title: A. Robertson 4 3 2 Index and Title Page Size B Document Number Date: Friday, December 20, 2013 SCH-27898 Rev D PDF: SPF-27898 Sheet 1 1 of 8 5 4 3 2 1 Calypso MCU Power Connections Caution: Default Configuraiton: - ALL MCU supply voltages are set to 3.3V (ADC0, ADC1, VDD_HV_A, VDD_HV_B, VDD_HV_C, VBallast) - VDD_HV_FLA = External 3.3V supplied (jumper fitted) - VDD_LV Supplied from ballast transistor - If VDD_HV_A is driven from 5V, the VDD_HV_FLA pin must not be supplied from 3.3V (remove the HVA_FLA jumper) - Don't attempt to over drive an analogue pad to 5V when the digital VDD_HV_x supply is set to 3.3V. This will trigger the ESD protectrion on that pad. For example if VDD_HV_A is set to 3.3V and the analogue supplies are set to 5V, you cannot drive 5V into a pad in the VDD_HV_A domain D From MCU supply jumpers on main board 3v3 1 2 MCU_5V0_L J10 J14 J9 3 R39 1.0 DNP MCU_3V3_L 3v3 2 5v0 1 2 J8 B_CAP 4 3v3 3 5v0 3 LVDEC_CAP HVFLA_CAP 2 HVB_CAP 31 54 110 152 EX_PAD1 EX_PAD2 EX_PAD3 EX_PAD4 EX_PAD5 VSS_LV_109 109 HVA_CAP TP107 TPAD_030 2 GND GND TPH1 R37 10K R9 ADC0_GND 0 R8 GND ADC1_GND Drawing Title: R38 10K DNP 4 Calypso 176 QFP Daughter Card GND C51 1.0 UF DNP Page Title: Calypso MCU Power GND GND 5 3 A Freescale General Business Use Calypso 3M INT_BAL_SELECT enable 0 Automotive Microcontroller Applications East Kilbride, Scotland GND 3 Ground Links (0 Ohm Resistors) PPC5748GSK0MKU6 + OTQ-176SG-0.5-004-00 J11 A B 2 fewer VDD_HV_A on 176QFP 1 fewer VDD_HV_B No VDD_HV_C 5 Fewer VDD_LV No VIN1_CMP_REF 15 Fewer VSS_LV 5 Fewer VSS_HV Heat Dissipation GND TAB 1 ADC1_GND - Central Pad for heat dissipation & GND R20 1 ADC0_GND Differences to 324BGA 1.25v Core & External Ballast VSS_HV_VPP 26 7 28 55 57 86 123 150 0 VDD_LP_DEC VDD_LV_31 VDD_LV_54 VDD_LV_110 VDD_LV_152 32 VRC_CTRL 27 VDD_HV_FLA Flash Power Pins VSS_HV_7 VSS_HV_28 VSS_HV_55 VSS_HV_57 VSS_HV_86 VSS_HV_123 VSS_HV_150 VSS_HV_ADC1 97 VSS_HV_ADC0 VDD_HV_B_124 6 59 85 151 VDD_HV_A_6 VDD_HV_A_59 VDD_HV_A_85 VDD_HV_A_151 VDD_HV_ADC1_REF Calypso 6M 176QFP Package 2of3 C Individual MCU supply control jumpers R36 0 124 HVA_CAP ADC1REF_CAP 98 ADC1_CAP 99 TPH2 Analogue 89 Q20 MJD31CT4 2 0 VDD_HV_ADC1 U1B VDD_HV_ADC0 90 ADC0_CAP R27 1 J6 2 J5 1 2 J4 2 J3 C B 3v3 1 5v0 3 3v3 1 5v0 3 3v3 1 3 1 Individual MCU supply control jumpers LV_CAP 3 1 8 MCU_3V3_L 5v0 MCU_3V3_S 30 8 MCU_5V0_L MCU_5V0_S E_CAP 8 MCU_3V3_S D MCU_1V25_L 177 178 179 180 181 8 MCU_5V0_S 1 8 MCU_1V25_L This is not necessarily the same as the default shown in the RM. All VDD_HV_x domains have at least one peripheral that only functions at 3.3V. Therefore the default is to run these from 3.3V. The analogue pins can only be driven to the same voltage as the VDD_HV_x domain they are situated in (ie max 3.3V) so makes sense for the analogue supply and reference to be 3.3V GND 2 Size B Document Number Date: Tuesday, January 21, 2014 SCH-27898 Rev D PDF: SPF-27898 Sheet 1 2 of 8 5 4 3 2 1 Calypso MCU Decoupling and bulk storage Capacitor Types: ADC 470pF - Ceramic COG, 50v 5% 0402 1000pF - Ceramic COG, 50V 5% 0402 4700pF - Ceramic X7R, 50V 10% 0402 Flash ADC0_CAP ADC1_CAP C43 1000pF C34 1000pF ADC1REF_CAP HVFLA_CAP D C4 10UF DNP + C3 10UF DNP C44 1.0 UF C42 0.1UF ADC0_GND + C41 C33 1.0 UF 1000pF C35 0.1UF ADC1_GND C32 C40 1.0 UF C31 2.2UF LMK107B7225KA-T (low ESR) 1000pF ADC1_GND 0.01uF 0.1uF 0.68uF 1.0uF 2.2uF - - Ceramic X7R, 50V 10% 0402 Ceramic X7R, 16V 10% 0402 Ceramic X7R 16V 10% 0805 (Murata GCM219R71C684KA37 ) Ceraminc X7R, 10V 10% 0603 (Taiyo Yuden LMK107B7105KA-T) Ceraminc X7R, 10V, 10%, 0603 (Taiyo Yuden LMK107B7225KA-TR) 4.7uF 10uF - TANT, 12.5V 20% ESR=0.08R 7343 - TANT, 35V 10% ESR=0.125R CC7343-31 D 4.7uF Alternative (150-78844)- Polymer ALU, 16V 20% ESR=0.08R 7343-18 GND Place small Caps as close as possible to MCU pins VDD_HVA VDD_HVB HVA_CAP C27 470pF C24 1000pF C48 470pF HVB_CAP C46 1000pF + C2 10UF C C23 470pF + C1 10UF DNP C26 0.1UF GND C25 0.1UF C47 0.1UF C45 0.1UF C C22 0.1UF GND Place 10uF cap to west side of package Place small caps close to each MCU pin VDD_LV Ballast Transistor LV_CAP C50 0.1UF C20 0.1UF B_CAP C7 E_CAP C37 0.1UF GND LV_CAP LVDEC_CAP 4700pF C8 2.2UF DNP (low ESR) Place close to transistor B LP Internal Reg Cap E_CAP C9 2.2UF DNP (low ESR) C49 0.68uF (low ESR) C29 0.1UF C30 0.68uF (low ESR) C21 0.68uF (low ESR) C28 0.68uF DNP (low ESR) C36 1uF LMK107B7105KA-T (low ESR) B (Murata GCM219R71C684KA37) GND VDD_LV (1.25V) Decoupling. Place as close as possible to pin. GND 2.2uF caps are DNP. Place close to emitter See caps below for Bypass Transistor bulk storage (some on VDD1V2 rail) GND Place one 0.68uF cap footprint each side of package One of these is DNP. May replace 2 caps with 0.47uF to keep overall capacitance within limits Differences to 324BGA A - Automotive Microcontroller Applications East Kilbride, Scotland 2 Fewer VDD_HV_A capacitor pairs 1 fewer VDD_HV_B capacitor pair No VDD_HV_C capacitor pairs 5 fewer VDD_LV capacitor pairs A Freescale General Business Use Drawing Title: Calypso 176 QFP Daughter Card Page Title: Calypso MCU Decoupling 5 4 3 2 Size B Document Number Date: Friday, December 20, 2013 SCH-27898 Rev D PDF: SPF-27898 Sheet 1 3 of 8 5 4 3 2 1 Calypso GPIO 1 of 2 U1A ** PA1 is also NMI. Routed to I/O Matrix D (WKPU2 / NMI0) (WKPU3) Key to text colours: Purple Orange Blue Black RED Green - Comms Physical Interfaces Other Peripherals and I/O Debug (JTAG & Nexus) Clock, Reset and Control I/O Matrix and other functions (eg LED) I/O Matrix (dedicated) C (SD_CD - WKPU19) (SW1 & GPIO**) (SW2 & GPIO) (MII_RXCLK) (CMP1_13 / IO) (SAI_GPIO) (MLB_GPIO) (MII_RXD2) (RMII_RXD1) (RMII_RXD0) (MII_COL) (RMII_RXER) (CMP1_15 / IO) (CMP1_14 / IO) (CMP1_12 / IO) (CMP1_10 / IO) PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 24 19 17 114 51 146 147 128 129 130 131 132 53 52 50 48 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 (CAN0_TX) (CAN0_RX) (LIN0_TX) (LIN0_RX) (ADC_POT) (GPIO) (GPIO) (GPIO) (XTAL32) (EXTAL32) (SAI0_SYNC) (GPIO) (GPIO) (MLB_DN) (MLB_SN) (MLB_CN / SIG) PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 39 40 176 1 88 91 92 93 61 60 62 96 101 103 105 107 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 (TDI) (TDO) (USB1_CLK) (USB1_DIR) (FR_B_TX_EN) (FR_A_TX) (LIN1_TX) (LIN1_RX) (RS232_TX) (RS232_RX) (CAN1_TX) (CAN1_RX) (FR_DBG0) (FR_DBG1) (FR_DBG2) (FR_DBG3) PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 154 149 145 144 159 158 44 45 175 2 36 35 173 174 3 4 8 8 8 8 8 8 8 8 8 8 8 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 (HEX1 & (HEX2 & (HEX3 & (HEX4 & (GPIO) (GPIO) (GPIO) (GPIO) (GPIO) (GPIO) (GPIO) PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 77 78 79 80 81 82 83 84 87 94 95 8 8 7 7 PD12 PD13 PD14 PD15 (GPIO) (GPIO & MLB_ST) (MLB_DP) (MLB_SP / DAT) PD12 PD13 PD14 PD15 100 102 104 106 8 8 MCU-RSTx PORSTx MCU-RSTx PORSTx 6 6 MCU-XTAL MCU-EXTAL MCU-XTAL MCU-EXTAL 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 8 8 8 8 8 8 8 8 6 6 8 8 8 7 7 7 B A GPIO) GPIO) GPIO) GPIO) 29 153 56 58 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 Calypso 176QFP Package 1of3 GPIO Pins1 PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 PE8 PE9 PE10 PE11 PE12 PE13 PE14 PE15 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PF0 PF1 PF2 PF3 PF4 PF5 PF6 PF7 PF8 PF9 PF10 PF11 PF12 PF13 PF14 PF15 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PG0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 PG9 PG10 PG11 PG12 PG13 PG14 PG15 PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 PD9 PD10 PH0 PH1 PH2 PH3 PH4 PH5 PH6 PH7 PH8 PH9 PH10 PH11 PH12 PH13 PH14 PH15 PD12 PD13 PD14 PD15 18 20 156 157 160 161 167 168 21 22 23 25 133 127 136 137 PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 PE8 PE9 PE10 PE11 PE12 PE13 PE14 PE15 (MLB_I2C1_SCL) (MLB_I2C1_SDA) (FR_A_TX_EN) (FR_A_RX) (FR_B_TX) (FR_B_RX) (SD_CMD) (SD_CLK) (SAI_I2C2_SDA) (SAI_I2C2_SCL) (SAI_I2C3_SDA) (SAI_I2C3_SCL) (MII_CRS) (MII_RXD3) (USB1_D2) (USB1_D3) 63 64 65 66 67 68 69 70 42 41 46 47 43 49 126 125 PF0 PF1 PF2 PF3 PF4 PF5 PF6 PF7 PF8 PF9 PF10 PF11 PF12 PF13 PF14 PF15 (SAI0_MCLK) (SAI0_BCLK) (SAI0_D3) (SAI0_D2) (SAI0_D1) (SAI0_D0) (SAI1_SYNC) (SAI1_MCLK) (GPIO) (SW3 & GPIO) WKPU22 (CMP1_8 / IO) (SW4 & GPIO) WKPU15 (GPIO) (CMP1_11 /IO) (RMII_MDIO) (RMII_RXDV) 122 121 16 15 14 13 38 37 34 33 138 139 116 115 134 135 PG0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 PG9 PG10 PG11 PG12 PG13 PG14 PG15 (RMII_MDC) (RMII_TXCLK) (LED1 & GPIO) (LED2 & GPIO) (LED3 & GPIO) (LED4 & GPIO) (CLKOUT1 GPIO) (CLKOUT0 GPIO) (GPIO) (MLB_IRQ - WKPU21) (USB1_D4) (USB1_D5) (MII_TXD2) (MII_TXD3) (USB1_D0) (USB1_D1) 117 118 119 120 162 163 164 165 166 155 148 140 141 9 10 8 PH0 PH1 PH2 PH3 PH4 PH5 PH6 PH7 PH8 PH9 PH10 PH11 PH12 PH13 PH14 PH15 (RMII_TXD1) (RMII_TXD0) (RMII_TXEN) (eMIOS1_UC_5H) (eMIOS1_UC_6H) (eMIOS1_UC_7H) (MLB_RST) (MLB_PWR) (SD_WP) (TCK) (TMS) (USB1_D6) (USB1_D7) (GPIO) (GPIO) (GPIO) PE0 PE1 PE2 PE3 PE4 PE5 PE6 PE7 PE8 PE9 PE10 PE11 PE12 PE13 PE14 PE15 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 PF0 PF1 PF2 PF3 PF4 PF5 PF6 PF7 PF8 PF9 PF10 PF11 PF12 PF13 PF14 PF15 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 PG0 PG1 PG2 PG3 PG4 PG5 PG6 PG7 PG8 PG9 PG10 PG11 PG12 PG13 PG14 PG15 7 8 8 8 8 8 8 8 8 8 8 8 7 7 8 8 PH0 PH1 PH2 PH3 PH4 PH5 PH6 PH7 PH8 PH9 PH10 PH11 PH12 PH13 PH14 PH15 7 7 7 8 8 8 8 8 8 8 8 8 8 8 8 8 D C (eMIOS (eMIOS (eMIOS (eMIOS E1UC_11_H) E1UC_12_H) E1UC_13_H) E1UC_14_H) B Differences to 324BGA - Port D 11 Not on 176QFP RESET PORST Automotive Microcontroller Applications East Kilbride, Scotland XTAL EXTAL A Freescale General Business Use Drawing Title: PPC5748GSK0MKU6 + OTQ-176SG-0.5-004-00 Page Title: 5 4 3 2 Calypso 176 QFP Daughter Card Calypso GPIO 1of2 Size B Document Number Date: Friday, December 20, 2013 SCH-27898 Rev D PDF: SPF-27898 Sheet 1 4 of 8 5 4 3 2 1 Calypso GPIO 2 of 2 U1C Key to text colours: D Purple Orange Blue Black RED Green - Comms Physical Interfaces Other Peripherals and I/O Debug (JTAG & Nexus) Clock, Reset and Control I/O Matrix and other functions (eg LED) I/O Matrix (dedicated) 8 8 8 8 8 8 8 8 7 PI0 PI1 PI2 PI3 PI4 PI5 PI6 PI7 PI8 8 8 8 8 8 PI11 PI12 PI13 PI14 PI15 8 8 8 8 8 PJ0 PJ1 PJ2 PJ3 PJ4 (SD_D3) (SD_D2) (SD_D1) (SD_D0) (USB1_STP) (USB1_NXT) (USB0_RST) (USB1_RST) (MLB_CP / CLK) (GPIO) PI0 PI1 PI2 PI3 PI4 PI5 PI6 PI7 PI8 172 171 170 169 143 142 11 12 108 (ENET_RST) (GPIO & MLB_PS0) (GPIO & MLB_PS1) (SAI2_D0) (SAI2_MCLK) PI11 PI12 PI13 PI14 PI15 111 112 113 76 75 (SAI2_SYNC) (SAI2_BCLK) (SAI1_D0) (SAI1_BCLK) (GPIO) PJ0 PJ1 PJ2 PJ3 PJ4 74 73 72 71 5 PI0 PI1 PI2 PI3 PI4 PI5 PI6 PI7 PI8 Calypso 176QFP Package 3of3 GPIO Pins2 D PI11 PI12 PI13 PI14 PI15 PJ0 PJ1 PJ2 PJ3 PJ4 C C B B Differences to 324BGA - 2 fewer pins on Port I - 12 fewer pins on Port J - No Ports K to Q (And corresponding changes to daughtercard connectors) Automotive Microcontroller Applications East Kilbride, Scotland A A Freescale General Business Use Drawing Title: Page Title: PPC5748GSK0MKU6 + OTQ-176SG-0.5-004-00 5 4 3 2 Calypso 176 QFP Daughter Card Calypso GPIO 2of2 Size B Document Number Date: Friday, December 20, 2013 SCH-27898 Rev D PDF: SPF-27898 Sheet 1 5 of 8 5 4 3 2 1 Clocks D D Oscillators and External Clock 4 PB9 C39 PB9 (EXTAL32) R30 1.0M DNP C 12PF 3 Y20 32.768KHZ C 2 4 PB8 C38 12PF FC-255 32.7680K-A3 (Load Capacitance 7pF) 4 4 MCU-EXTAL MCU-XTAL J2 R7 1.0M DNP GND 12PF Y1 40.0MHZ J1 MCU-EXTAL 1 MCU-XTAL C6 EXTAL 1 PB8 (XTAL32) 1 1 2 EXT-CLK (From SMA connector on main board) 2 8 EXT-CLK XTAL C5 12PF 2 R35 3 GND 0 NX8045GB-40.000M-STD-CSJ-1 XTAL (Optimised for Automotive, 8pF Load capacitance) DNP GND B B Automotive Microcontroller Applications East Kilbride, Scotland A A Freescale General Business Use Drawing Title: Calypso 176 QFP Daughter Card Page Title: 5 4 3 2 Clocks Size B Document Number Date: Friday, December 20, 2013 SCH-27898 Rev D PDF: SPF-27898 Sheet 1 6 of 8 5 4 3 2 1 High Speed Signal Termination D D Ethernet Termination 4 4 4 4 4 PG13 PG12 PH0 PH1 PH2 4 PG0 PG13 PG12 PH0 PH1 PH2 PG0 R5 R4 R6 R3 R2 50 50 50 50 50 R1 50 PG13-R PG12-R PH0-R PH1-R PH2-R PG0-R PG13-R PG12-R PH0-R PH1-R PH2-R 8 8 8 8 8 PG0-R 8 MLB_DAT MLB_SIG MLB_CLK 8 8 8 MLB_SN 8 MLB_SP 8 MLB_DN 8 MLB_DP 8 MLB_CN 8 MLB_CP 8 Place resistors as close as possible to MCU MLB Termination MLB_DAT MLB_SIG MLB_CLK C R34 100 DNP 4 PB14 4 PD15 4 PB13 4 PD14 4 PB15 5 PI8 R21 100 DNP C R25 100 DNP PB14 R31 0 MLB_SN PD15 R33 0 MLB_SP PB13 R26 0 MLB_DN PD14 R29 0 MLB_DP PB15 R22 0 MLB_CN PI8 R24 0 MLB_CP R32 105.0 1% (PD[15] Shared with MLB_DAT for 3-pin mode) R28 105.0 1% (PB[15] Shared with MLB_SIG for 3-pin mode) R23 100 1% (PI[8] Shared with MLB_CLK for 3-pin mode) Place resistors as close as possible to MCU From MCU B To Daughtercard Layout Note - Place resistors as shown with shared pad (as close to MCU as possible) B Remove R1 and fit R2 to enable 3-pin signals R1 Fitted by default for LVDS 6-pin signals Automotive Microcontroller Applications East Kilbride, Scotland A A Freescale General Business Use Drawing Title: Calypso 176 QFP Daughter Card Page Title: High Speed Signal Termination 5 4 3 2 Size B Document Number Date: Friday, December 20, 2013 SCH-27898 Rev D PDF: SPF-27898 Sheet 1 7 of 8 5 4 3 2 1 Daughter Card Connectors (Plugs) Notes: Connectors on Main board (Shown for reference) - there was no neat way to fit these connectors onto a B sized sheet so unfortunately the sheet size has been increased to C so will need to be printed on larger paper. - The Crystal Signals are NOT routed via the daughtercard connectors - The Specific MCU power pins are not routed via the daughter card however the jumpered MCU supply lines are brought up from the main board (see the top pins of the connector on the left) D - The connector schematic symbols have been horizontally mirrored so they match the main EVB connector. This has no bearing on the PCB placement or footprint. Pin1 on the recepticle mates with pin 1 on the plug. D P21 6 EXT-CLK 4 PB2 4 5 PE6 PI3 5 5 PI1 PI2 4 5 PC13 PI0 4 PC8 4 PC15 C 4 PG5 5 PI7 4 5 PE1 PI6 4 4 PE11 PG3 4 PE8 4 4 PG9 PA0 4 4 4 PG7 PG8 PC10 4 PB1 4 PF13 B 4 4 PF9 PA14 4 PA4 4 PA15 4 PB10 2 MCU_5V0_S 2 MCU_1V25_L P20 (GND) EXT-CLK (GND) PB2 (GND) (PP11) PE6 PI3 (PP10) (PP5) PI1 PI2 (PP9) PC13 PI0 (PK10) PC8 (PK13) (GND) (PP2) (PK15) PC15 (PP7) (GND) (PP6) (GND) (PO12) (PO7) (PO10) (PO4) (PO9) (GND) SH2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 SH4 SH1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 SH3 (GND) (GND) PH7 PH6 PB3 PH8 (PP8) (GND) (PP3) PE7 (PK9) (GND) PC12 (PK11) (GND) (PP4) (PK14) (PK12) PC9 (PL0) (GND) (PP1) (GND) PC14 PJ4 (GND) (PO11) (PO8) (GND) PH14 (PO13) (GND) (GND) PG5 (PO14) (PO0) PI7 (PP0) (GND) PE1 PI6 (PO5) PE11 PG3 (GND) PE8 (GND) PG9 PA0 (GND) PG7 PG8 PC10 (GND) (GND) PB1 (PK2) (GND) PF13 (PK4) (PK6) (PK8) (PN14) (GND) SH6 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 SH8 SH5 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 SH7 (GND) (PO1) PH13 PG4 PH15 (PO15) PE10 PE0 (PO6) (GND) PG2 PA2 PE9 PA1 MCU-RSTx (PN15) (PO3) (GND) PG6 PC11 (PO2) (GND) PB0 (PK1) PF12 (GND) (GND) (GND) (PK3) (PK5) PF11 (GND) (GND) PF9 PA14 (PN13) (GND) (PN11) (PJ11) (PJ10) (PK0) (PJ9) (PN9) (GND) (PJ13) PA4 (GND) (PN10) PA15 (PN3) (PN6) (GND) (PN0) PB10 (GND) (GND) (GND) (GND) SH10 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 SH12 SH9 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 SH11 (GND) (PK7) PC6 PF8 (GND) PC7 (PN12) (PJ12) (GND) (PJ15) (GND) (PN8) PF10 (PN7) (PJ14) (GND) (PN4) PA13 (GND) (PN5) PA12 (PN2) PF1 PF0 (GND) (GND) MCU_3V3_S MCU_5V0_S MCU_1V25_L (GND) PH7 PH6 PB3 PH8 4 4 4 4 PE7 4 PC12 4 PC9 4 PC14 PJ4 4 5 PH14 4 PH13 PG4 PH15 4 4 4 PE10 PE0 4 4 PG2 PA2 PE9 PA1 MCU-RSTx 4 4 4 4 4 PG6 PC11 4 4 PB0 4 PF12 4 PF11 4 PC6 PF8 4 4 PC7 4 4 4 4 PH10 PH4 PE5 5 PI5 4 PC5 4 4 4 PG14 PH12 PC4 4 4 PC2 PA6 4 4 4 PH11 PA5 PE14 4 PG15 4 4 PE12 PA11 4 4 4 4 7 7 4 PA7 PE13 PF15 PG1 PH1-R PH0-R PA3 4 PH3 4 4 5 4 PD13 PD12 PI11 PD10 7 7 7 MLB_DAT MLB_SIG MLB_CLK 7 7 MLB_SN MLB_SP 4 PD7 5 PJ0 4 4 4 4 5 PD5 PB5 PB11 PD1 PJ1 4 PD8 PF5 PB4 PJ2 PJ3 PF2 PF10 4 PA13 4 PA12 4 4 4 5 5 PF1 PF0 4 4 4 MCU_3V3_S 2 MCU_3V3_L MCU_5V0_L 2 2 TPV1 MCU_3V3_L MCU_5V0_L (GND) TPV3 TPV2 (GND) (PM11) PH10 PH4 PE5 (PM12) PI5 (PQ0) PC5 (GND) PG14 PH12 PC4 (GND) (PL9) PC2 PA6 (PL3) PH11 PA5 PE14 (PQ4) PG15 (PQ5) (PQ7) (PP15) (GND) (PL12) (PL11) (PL6) (PL7) (GND) SH2 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 SH4 SH1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 SH3 (GND) PC1 PE3 PH5 PC0 (PQ3) PC3 PE4 PH9 (PL10) PE15 PORSTx PE2 (PL4) PG11 (PQ1) (GND) PG10 (PQ2) (PL8) (PQ6) (GND) (PP13) (PP12) PI4 (PP14) (GND) (PL2) (PL5) (PL13) (PM0) (GND) (GND) (PL15) (PM1) (PM2) PE12 PA11 (GND) PA7 PE13 PF15 PG1 PH1-R PH0-R PA3 (GND) (PM8) PH3 (PM3) (PM6) (PM13) (PM14) (GND) PD13 PD12 PI11 PD10 (GND) MLB_DAT MLB_SIG MLB_CLK (GND) (GND) SH6 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109 111 113 115 117 119 SH8 SH5 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 SH7 (GND) (PL14) (PM9) (PM7) PA10 PA9 PA8 PF14 PG0-R PH2-R (GND) PG12-R PG13-R (GND) (GND) (PM10) (PM4) (PL1) (GND) (PM5) PI13 PB12 PD9 PI12 PB7 PI15 (GND) MLB_CN MLB_CP (GND) (GND) (GND) SH10 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 SH12 SH9 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 SH11 (GND) MLB_DN MLB_DP (GND) (GND) PI14 (PJ7) (PD11) (PJ6) PD6 PD2 PD3 (PJ8) (GND) PB6 PD0 (PI10) (GND) PD4 PF6 (PN1) (GND) PF4 PF7 PF3 (GND) (GND) DC_3V3_S (GND) MLB_SN MLB_SP (GND) (GND) PD7 (PJ5) PJ0 (GND) PD5 PB5 PB11 PD1 PJ1 (GND) PD8 (PI9) PF5 PB4 PJ2 PJ3 (GND) (GND) PF2 (PM15) (GND) (GND) DC_5V0_S DC_P12V DC_1V25_L PLUG 180 DC_3V3_L DC_5V0_L PC1 PE3 PH5 PC0 4 4 4 4 PC3 PE4 PH9 4 4 4 PE15 PORSTx PE2 4 4 4 PG11 4 PG10 4 PI4 5 PA10 PA9 PA8 PF14 PG0-R PH2-R 4 4 4 4 7 7 PG12-R PG13-R 7 7 PI13 PB12 PD9 PI12 PB7 PI15 5 4 4 5 4 5 MLB_CN MLB_CP 7 7 C B MLB_DN MLB_DP 7 7 PI14 5 PD6 PD2 PD3 4 4 4 PB6 PD0 4 4 PD4 PF6 4 4 PF4 PF7 PF3 4 4 4 TPV4 TPV5 TPV6 PLUG 180 A A Plug GND Plug GND GND Automotive Microcontroller Applications East Kilbride, Scotland GND Freescale General Business Use Drawing Title: Calypso 176 QFP Daughter Card Page Title: Daughter Card Connectors (Plugs) 5 4 3 2 Size C Document Number Date: Friday, December 20, 2013 SCH-27898 Sheet 1 Rev D PDF: SPF-27898 8 of 8