CYPRESS Serial Non-Volatile SRAM (Serial nvSRAM) P R O D UC T O VE RVI E W A BET TER MOUSETRAP – THE RIGHT WAY TO DO SERIAL NVRAM A D VA N TA G E S Serial nvSRAM is an SRAM that retains its written data when power is turned off or disconnected. It easily replaces EEPROM, FRAM, battery-backed serial SRAM, or other hybrid solutions used to satisfy the need for non-volatile serial memory in densities from 64 Kbit up to 1 Mbit. PERFORMS LIKE AN SRAM Cypress combines its world-leading CMOS technologies in SRAM and non-volatile (SONOS) EEPROM on a single monolithic IC to produce this remarkable solution. • Infinite read/write to SRAM In operation, the serial nvSRAM behaves just like a conventional serial (SPI/I C) memory. All pin locations, command codes, and write sequences follow industry standards. When a power disruption occurs, the intelligence in the chip detects the threat and automatically saves a copy of the SRAM data into non-volatile memory, where it can stay unchanged for over 20 years. On power-up RECALL, the IC returns the data copy back to the SRAM and system operation can continue precisely from where it left last. Clearly this is the right way to do serial nvSRAM. • Random access • Single or stream read/write •Up to 104 MHz SPI/3.4 MHz I2C •Works in SRAM/EEPROM emulation tools 2 The transfers between SRAM and non-volatile cells inside the IC are completely parallel (cell for cell) allowing the STORE operation to complete in 8 ms or less. The IC family also provides user controlled software STORE and RECALL initiation commands, as well as a user controlled hardware STORE initiation command in some versions. SAVES LIKE A NON-VOLATILE MEMORY •1,000,000 store cycles to non-volatile elements (on power disruptions only) •20-year data retention with reliability better than ten failures in time (FIT) •Automatic write protect •Full array store on power-down using zero system time NO BATTERIES; COMPLETELY GREEN • RoHS compliant • No mechanical battery contact issues NC 1 16 VCC VRTCbat 2 15 INT/SQW Xout 3 14 VCAP A2 Xin 4 12 SDA WP 5 CY14X101PA 13 Top View not to scale 12 6 11 SCL HOLD 7 10 A1 VSS 8 9 VCAP 1 8 CY14X101J2 7 Top View 6 not to scale NC 1 16 VCC VRTCbat 2 15 INT/SQW Xout 3 14 VCAP Xin 4 13 WP 5 NC VRTCcap A1 2 A2 3 VSS 4 CY14X101I Top View not to scale 5 • No end-of-life disposal problems • No data loss from electrical noise or signal input undershoot • No power monitoring required SI 6 11 SCK VRTCcap PACKAGE OPTIONS 7 10 CS VSS • 8 and 16 SOIC HSB 8 9 HSB VCC CS 1 WP 8 2 CY14X101Q2A 7 Top View 6 not to scale SO SCL VCAP 3 SDA VSS 4 Serial nvSRAM Pinouts www.cypress.com/go/nvsram SO • No replacement or recharge cycles 5 VCC HOLD SCK SI NO WEAR LEVELING ROUTINES NO FIRMWARE WAIT STATES AS FOUND IN OTHER NON-VOLATILE SOLUTIONS P R O D UC T O VE RVI E W APPLICATIONS • Smart meters • Handheld industrial devices • Handheld medical equipment • Automotive • Military • Portable equipment • Single-board computers • Gaming REAL-TIME CLOCK TECHNOLOGY Cypress’s serial nvSRAMs are also offered with on-chip Real-Time Clock (RTC) functions that combine the high-performance of a monolithic non-volatile memory with a full-featured clock. The entire family is RoHS-compliant. The RTC provides accurate time-keeping through a high-accuracy oscillator using an external crystal. RTC features include leap year tracking, alarm, and low-power operation. The alarm function is programmable for one-time alarms or periodic seconds, minutes, hours, or days. A programmable watchdog timer for process control is also included. SONOS NON -VOL ATILE TECHNOLOGY Cypress non-volatile technology requires very low erase and programming currents, allowing full array STOREs from SRAM to non-volatile in just 8 ms following each power stop or brownout. Over one million STORE cycles into our SONOS non-volatile cells can occur without damaging the structure. If power is disrupted five times each day, this would allow over 500 years of non-volatile STORE’s to your SRAM data. OPERATING MODES AutoSTORE performs STORE operations in the background during power-down, using zero system time. A small external capacitor guarantees sufficient energy to complete the STORE when the system power supply drops below the minimum specified operating range. When power returns to operating minimu, data is automatically RECALL’ed from the non-volatile elements into the SRAM once the supply reaches operating minimums. Software STORE and Software RECALL may be initiated by executing special instructions. These functions can be used to store new code and data or to perform software reset after the SRAM has been written. Hardware STORE may be initiated by asserting the HSB pin low. SERIAL n v SRA M PRODUCT PORTFOLIO Density Interface Real-Time Clock Cycle Time (MHz) Voltage (V) Process Package Status 1 Mb SPI/I2C Yes 40/3.4 2.5, 3, 5 130 nm 8, 16 SOIC In production 512 Kb SPI/I C Yes 40/3.4 2.5, 3, 5 130 nm 8, 16 SOIC In production 256 Kb SPI/I C Yes 40/3.4 2.5, 3, 5 130 nm 8, 16 SOIC In production 64 Kb SPI/I C Yes 40/3.4 2.5, 3, 5 130 nm 8, 16 SOIC In production 2 2 2 WORLDWIDE SALES AND DESIGN SUPPORT For more information on nvSRAM go to www.cypress.com/go/nvsram or email [email protected]. Cypress Semiconductor Corporation 198 Champion Court, San Jose CA 95134 phone +1 408.943.2600 © 2011 - 2012 Cypress Semiconductor Corporation. All rights reserved. All other trademarks are the property of their respective owners. 001-57013 *D