AN11065 UHF Transmitter OL2300 Rev. 1 — 18 July 2011 Application note Document information Info Content Keywords OL2300, transmitter, UHF Abstract Provides application related information for the UHF transmitter OL2300. It focuses on schematic and layout recommendations for an application board and methods for enhancing the quality of the RF output signal. AN11065 NXP Semiconductors UHF Transmitter OL2300 Revision history Rev Date Description 1 20110718 first issue Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 2 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 1. Introduction This application note provides application related information for the UHF transmitter OL2300. It focuses on schematic and layout recommendations for an application board and methods for enhancing the quality of the RF output signal. A note about the CKOUT signal is given in Section 6 on page 12. Power measurements which are dependent on the output impedance are provided in Section 7 on page 19. 2. Board design 2.1 Schematic The highly integrated design of the OL2300 requires only a few external components to build an RF transmitter. Figure 1 shows the OL2300 in a typical application. C3 VDD 47 nF C1 C2 220 nF 100 pF GND VDD IC 5 CKOUT 15 EN 2 SCK 1 SDIO 16 to microcontroller XTAL1 R1 1 MΩ R2 1 MΩ R3 1 MΩ XTAL2 X1 VREG 6 OL2300 GND VDD(PA) C9 12 TEST1/SDO 14 TEST2 13 10 4 3 9 8 GND VDDA 7 GND L2 RF-ANTENNA (1) C4 VDD GND VSSA L1 PAOUT C7 VSS(PA) C6 11 VSS C8 C5 GND GND GND GND GND GND 019aac601 (1) Exposed die pad. Fig 1. Typical application schematic The components used in this schematic are described in detail in Table 1. All parts marked with an asterisk are relevant to UHF performance and should be selected carefully. Special attention should be given to Self-Resonant Frequency (SRF) and quality factor Q. AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 3 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 Table 1. Typical application component descriptions Component Description R1, R2, R3 Pull resistors are required to avoid floating voltage levels at input ports EN, SCK, and SDIO. Undefined input ports leads to increased current consumption. External resistors must be applied if the connected SPI controller does not have internal ones. X1, C4, C5 These three components form the external crystal resonator. The values of C4 and C5 should be chosen according to the load capacitance of the crystal. Both capacitors must have identical values. C2[1], C3 C3 is used as a filter capacitor for the output of the on-chip voltage regulator. The value must be at least 47 nF. In addition, capacitor C2 with a value of 100 pF is inserted to inhibit output frequency feedback into the regulated voltage. C1 The main supply filter capacitor value of C1 must be at least twice the value of C3. L2[1], C9[1] Choke inductance L2 provides the DC supply to the power amplifier. L2 and C9 decouple the RF signal from the DC supply VDD. Value of L2 should be as high as possible, but in reality SRF and the quality factor limits the usable values of the coil. For an output frequency of 315 MHz it is recommended to select a value of 100 nH or 120 nH. The corresponding values are 82 nH for 434 MHz and 68 nH for 868 MHz. The inductor must be able to deliver up to 30 mA. For C9 a value of about 100 pF should be considered. L1[1], C6[1], C7[1], C8[1] Together with the RF-antenna, these elements form a low-pass Pi network that transforms the impedance of the antenna to the power amplifier input impedance. Capacitor C7 and C8 are connected in series, since the network output impedance is very sensitive to the capacitance provided by these components. L1 enables adjustment of antenna inductance and therefore the network quality factor. Capacitor C6 mainly sets the input impedance reactance. The OL2300 internal tuning capacitor is in parallel with C6. Test1/SDO, Test2 Both port lines are outputs. Pin Test1/SDO can be configured by register settings as SPI data output. If not used, both pins must be left unconnected. [1] Relevant to UHF performance, its value must be selected carefully. 2.2 Layout An example of a two-layer PCB layout is shown in Figure 2. AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 4 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 019aac602 Blue: bottom layer; Red: top layer; Green: vias. Fig 2. Two-layer PCB layout; HVQFN package Table 2 gives guidelines for designing an appropriate layout. AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 5 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 Table 2. Application PCB layout guidelines Item Guideline Ground plane A ground plane below the active RF-part and the crystal resonator is recommended for correct RF-power transmission and high frequency stability. In the given design, the ground plane is only discontinued by the connection VREG to VDDP. There must not be a ground plane below the antenna loop. Antenna matching components Antenna matching components must be placed with the shortest distance to the power amplifier output pin. Capacitor C6 is able to filter most harmonics. Therefore, C6 must be placed very close to PAOUT and VSSPA. L1 and L2 must be placed perpendicular to each other to avoid magnetic coupling. C7 and C8 must be placed close to each other. There must be a direct connection from C8 and C6 to VSSPA. Distance between the different components must be kept small. Also valid for VSSPA (GND) connection of C6, C8, and C9. Long ground connection lines on top must be shortened by placing vias to the bottom ground layer. This improves filtering and reduces spurious emissions. L2 and C9 The choke should be applied directly to PAOUT. C9 must be grounded by a via. Pad below the HVQFN package The middle pad of the OL2300 HVQFN package must be connected to ground to improve output signal behavior. The via at pin 11 (VSS) can alternatively be placed directly in the middle of the pad below the package. C2 C2 must be placed directly at VDDA and VSSA, to suppress the RF signal at the RF module supply. Crystal resonator The crystal and load capacitors must be placed close to XTAL1 and XTAL2 to minimize the influence of PCB parasitics. 3. Phase noise The OL2300 uses a fractional-N based PLL to synthesize the output frequency. Such a PLL consists of a programmable frequency divider stage. The frequency divider of the OL2300 is controlled by a 3-bit value which is used to divide the VCO-frequency by any integer value between 64 and 71. A non-integer (fractional) division of the VCO-frequency is feasible since the frequency divider control value changes with time. AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 6 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 For this reason the control value consists of a fixed part and a time-dependent value provided by a 2-bit-sigma delta-modulator as shown in the OL2300 data sheet. The fixed part is given by the 3 MSBits of frequency control register FC, the frequency control value of the PLL. The 2-bit time-dependent value is defined by the remaining 15 LSBits of FC. The sigma-delta-modulator converts the 15-bit input to a time-dependent 2-bit output so that the mean value of the output signal equals the input. The phase noise of the output frequency is slightly worse compared to an integer PLL due to the time-variant frequency divider. The FC value needs to be set carefully, as the variation in phase and amplitude of the output frequency of the OL2300 depends on this value. 3.1 Frequency modulation The period of the time-dependent frequency divider control value provided by the sigma-delta-modulator depends on its input value. A short period leads to an increased phase noise at offset frequencies higher than 100 kHz. The modulator outputs a short period, in particular, if the input value FC is a multiple of the exponential function with base 2: FC = N 2p The phase noise of the output frequency increases with the exponent p. 10 7 FC=N.2 12 FC=N.2 14 FC=N.2 0 Φn (dBm) -10 -20 -30 -40 -50 -60 -70 Fig 3. 0 2 4 6 8 10 fcarrier (MHz) 12 14 16 18 019aac603 Phase noise as a function of carrier frequency Figure 3 shows the output spectrum measured with different settings of FC. Factor N is an odd number of types: N = 2 k + 1 for k 0 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 7 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 The spectrum has been measured in peak detection mode with a span of twice the reference frequency starting at the carrier. Phase noise below an offset frequency of 100 kHz is constant and independent of the FC settings. For offsets greater than 100 kHz, the phase noise becomes an important parameter for applications with high data rates or FSK applications with a high modulation index. In such cases it is recommended to omit frequency control values (FC) in the range of 50 around: FC = N 29 for 0 N 320 3.2 Amplitude modulation Fractional-N based spurious emission appears in addition to reference spurs and harmonic emissions in the output spectrum of the transmitter. The distance (fD) to the carrier frequency depends on the reference frequency and the input value of the sigma-delta-modulator, the 15 least significant bits of FC. Furthermore there is a dependency on the 3rd MSB of FC that doubles the distance as given in Equation 1 and Equation 2. FC 14:0 + 0.5 f D = f REF ------------------------------------16 2 (1) for: 214 < FC[15:0] 3 214 FC 14:0 + 0.5 f D = f REF ------------------------------------15 2 (2) for the remaining values. The amplitude of the emission increases as the distance to the carrier decreases. Figure 4 shows the output spectrum, measured with FC set to 103304d = 19388h (Equation 1 applies and FC[14:0] = 5000d = 1388h). AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 8 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 Ref 10 dBm * Att 20 dB * RBW 3 kHz VBW 10 kHz 1 SWT 2.8 s 10 Delta 2 [T1 ] -42.69 680.000000000 Delta 3 [T1 ] -45.63 9.200000000 0 1 PK * AVG Marker 1 [T1 ] 10.67 dBm 313.000420000 MHz -10 dB kHz A dB MHz -20 2 -30 3 -40 SWP 10 of 10 -50 -60 -70 -80 -90 Center 313.00042 MHz 2.5 MHz/ Span 25 MHz 019aac604 Marker 2 = fractional spurious. Marker 3 = reference spurious emission. Fig 4. Output spectrum FC set to 103304d = 19388h To limit the amplitude of the fractional spurious emission to about 40 dBc it is recommended to avoid the following FC settings. A range of 8000 should be avoided around: FC = (2N + 1) 215 for 0 N 2 and a range of 2000 should be avoided around: FC = 2N 215 for 0 N 2. 3.3 Inappropriate FC settings Figure 5 shows the FC values that should be avoided according to the formulae above. • The black marked values belong to the AM fractional spurs and should be avoided for all applications • The blue values belong to the FM phase noise and should be avoided for applications using either a high data rate or a high FSK modulation index. Only the phase noise above an offset frequency of 100 kHz is affected by FM phase noise. AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 9 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 101 1∙212 0 2∙212 3∙212 4∙212 16001 1∙215 0 Fig 5. 2∙215 FC 4001 3∙215 4∙215 5∙215 019aac605 FC values to be avoided The upper part of the diagram magnifies the first section of the available data range to make the blue marked values more visible. The lower diagram is scaled to the usable data range of FC. For ASK, the FC value is constant and depends on the settings of the frequency control register FCxL, FCxH, and FCA. For FSK and Soft-FSK, the actual value of FC is time variable, according to the content of registers FCON and MRCON. The given inappropriate settings of FC should be avoided according to the application requirements. 4. Reset conditions Table 3 shows the reset condition of the special function register set. The device is reset and put in Power-down mode if pin EN is kept LOW for at least 216 reference clock cycles or bit PD is set in register TXCON. Table 3. Special function registers reset conditions Name Description Address Bit[1] 7 6 5 4 3 2 1 0 FC1H frequency configuration 1, high byte 00h X X X X X X X X FC1L frequency configuration 1, low byte 01h X X X X X X X X FC2H frequency configuration 2, high byte 02h X X X X X X X X FC2L frequency configuration 2, low byte 03h X X X X X X X X FC3H frequency configuration 3, high byte 04h X X X X X X X X FC3L frequency configuration 3, low byte 05h X X X X X X X X FC4H frequency configuration 4, high byte 06h X X X X X X X X FC4L frequency configuration 4, low byte 07h X X X X X X X X FCA MSB for all frequency configurations 08h X X X X X X X X FCON FSK modulation control 09h X X X X X X X X ACON0 ASK modulation control 0 0Ah X X X X X X X X ACON1 ASK modulation control 1 0Bh X X X X X X X X ACON2 ASK modulation control 2 0Ch X 0 X X X X X X MRCON modulation ramp control 0Dh X X X X X X X X AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 10 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 Table 3. Special function registers reset conditions …continued Name Description Address Bit[1] 7 6 5 4 3 2 1 0 X X X X X 0 TXCON transmitter control 0Eh 0 0[2] BDSEL baud rate selection 0Fh X X X X X X X X 0[2] 1[2] 1[2] 0[2] 0[2] SCSEL scaler selection 10h 1[2] X X X X 11h X X X X X X X X TEST1 test1 12h 0 0 0 0 0 0 0 0 TEST2 test2 13h 0 0 0 0 0 0 0 0 [1] X = no reset condition, content stays unchanged during power-down. [2] Only reset if SDIO = 0 otherwise X. 5. RF power trimming Some applications require a very low spread of output power, independent of supply voltage and temperature. It is mandatory for such applications to set bit CASC in register ACON2. A further reduction of the power dependency is achievable by adapting ACON according to changes in temperature and supply voltage. For this reason both parameters need be sensed. An adaptation of the output power leads to reduced current consumption over the lifetime of the system. Only the minimum required power is transmitted at any time. The lifetime of battery-supplied systems can be increased if the ACON value is reduced at low temperatures. Typically, a battery’s internal resistance increases over its lifetime. At low temperatures, the output voltage can reduce dramatically when the transmitter draws a high current from the battery. The OL2300 shows a negative dependency of the output power versus temperature. If the power is reduced to the minimum required value, the supply current is reduced too and thus the voltage drop over the battery. Hence the supply voltage is higher compared to unregulated use. The ACON value can be used to trim the output power in the end-of-line test. If the value of ACON = 12 is used as standard for nominal power, a deviation of 3 enables the actual output power in the range of 2 dB to be adapted for a final precision of 1 dB. Figure 6 shows the output power as a function of ACON for different power modes. AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 11 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 10 8 Pout 6 (dBm) 4 2 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 -22 -24 -26 -28 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Trimming Range 1 2 3 4 ACON 019aac606 Pout = f (ACON, PAM). VDD = 2.7 V, CASC = 1, load impedance = 180 . (1) PAM 3. (2) PAM 2. (3) PAM 1. (4) PAM 0. Fig 6. Output power as a function of ACON The colored areas in Figure 6 are addressable by ACON values 9d to 15d. Due to a logarithmic dependency of the output power versus ACON setting, the best accuracy can be achieved for high ACON values. If lower output power is needed, the power mode should be reduced instead of reducing the ACON value. 6. XO Supply options The OL2300 operationally supports the crystal oscillator with the regulated supply voltage VREG. In this mode the oscillator frequency shows virtually no dependency of the supply voltage. The regulated supply mode is activated if bit ENXR in register TXCON is set and the device is in the transmit state. It is possible to set bit ENXR during device initialization, but there will be no effect until the power amplifier is enabled by a transmit command. The oscillator supply automatically returns to unregulated mode if the transmit state is left. The regulated supply voltage on pin VREG is either derived from an internal reference (fixed mode) or by the VCO supply voltage (adaptive mode). In the second case the actual voltage level depends on the PLL frequency. This mode is the regulator adaptive mode and is selected by flag ENRAD in register ACON2. In the adaptive mode, the OL2300 analog circuitry is supplied with the lowest possible voltage. This mode is the most power effective. If the oscillator is operated in regulated supply mode and VREG is set to regulator adaptive mode, ENRAD must not be set before the power amplifier is activated. In unregulated mode, ENRAD can be set directly after PLL startup (after tacq). AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 12 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 Remark: Dropouts in clock output signal (CKOUT) might occur at the moment the oscillator supply switches from unregulated to regulated mode. It mainly occurs if the supply voltage is above 3.3 V. The behavior is caused by the internal time-constant of the clock-buffer reference. This reference is derived from the signal amplitude at pin XTAL1. The amplitude changes by switching to the regulated mode, and the clock-buffer reference voltage settles to a new value. While settling, the clock signal might be absent. 6.1 Sequence for fixed low mode Txxtal(set) EN t set ENXR, ENPLL TxCMD clr ENPLL SDIO transmit data t PLLEN t tacq PAON t unregulated regulated VDDXO t CKOUT ........ t clockgap Fig 7. 019aac607 Fixed low mode sequence How long the clock is missing (clock gap time) depends on supply voltage, crystal oscillator frequency, the value of the crystal load capacitors, temperature, and also on process parameters. The worst case was found for high crystal frequency, high temperature, and if the process shows high p-channel thresholds. A maximum gap time of 4 s appears under worst-case conditions at 3.6 V and 125 C. This value was measured and simulated using an 18.37 MHz crystal (Nx5032GA). The gap time needs to be considered if the external controller uses the clock signal. Remark: If the nominal crystal frequencies can only be reached by unsymmetrical load capacitances, the capacitor with the highest value should be applied to pin XTAL1. This reduces the amplitude at pin XTAL1 and thus the settling time of the clock-buffer reference voltage. Example: Crystal: Nx5032GA Nominal frequency: 18.37 MHz Load capacitance: 12 pF Pin XTAL2 18 pF Pin XTAL1 22 pF Without pin capacitance of pins XTAL1 and XTAL2 and PCB parasitic. AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 13 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 6.2 Sequence for adaptive mode To use the regulator adaptive mode in conjunction with the regulated supply mode of the oscillator (bit ENXR = logic 1, bit ENRAD = logic 1), the power amplifier should be activated first in fixed low mode and then the ENRAD bit can be set. Txxtal(set) EN t SDIO set ENXR, ENPLL, AMH[13:10]=0 Tx1set ENRAD Tx2 transmit data clr ENPLL clr ENRAD t PLLEN t tacq PAON t unregulated VDDXO fixed low adaptive t CKOUT ........ t clockgap Fig 8. 019aac608 Adaptive mode sequence Tx1: transmit command: bit B = logic 0, bit C = logic 0, bit D = logic 1: PA is switched on, no output power as AMH[13:10] = 0. Tx2: transmit command: bit B = logic 1, bit D = logic 0 actual output power depends on AMH[03:00]. After Tx1, pin EN goes LOW and the actual value on pin SDIO is latched (in this case pin SDIO needs to be LOW to have an unmodulated output signal) the PA is activated and the ACON1 setting is used (no output power). With the Tx2 command the data is transmitted at an output power according to ACON0. Remark: Bit ENRAD needs to be cleared before the PLL is enabled again; see Section 4 on page 10. 6.3 Application advice The device supports a second fixed mode, the fixed high mode. The regulator operation is similar to the fixed low mode; the regulator output is stabilized to a fixed value. In fixed high mode the regulated voltage is about 200 mV higher compared to fixed low mode. This mode is only available via test register TEST1. Fixed high mode is activated by writing 0x08 to TEST1 and is deactivated by writing 0x00. This mode can be used to reduce the voltage drop of the crystal oscillator supply in regulated supply mode. Using fixed high mode as shown in Figure 9 avoids gaps in the clock signal at pin CKOUT. AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 14 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 Txxtal(set) EN SDIO set ENRAD (adaptive) or TEST1=0X00 (fixed LOW) TEST1=0x08 set ENXR, ENPLL, AMH[13:10]=0 Tx1 t Tx2 transmit data clr ENPLL clr ENRAD t PLLEN t tacq PAON t fixed HIGH unregulated VDDXO fixed LOW or adaptive t CKOUT ........ t no clockgap VREG fixed LOW fixed HIGH fixed LOW or adaptive t 019aac609 Fig 9. Fixed high mode sequence Tx1: transmit command: B = 0, D = 1, PA is switched on, no output power as AMH[13:10] = 0. Tx2: transmit command: B = 1, D = 0, actual output power depends on AMH[03:00]. The PLL startup should be performed in fixed low mode. The fixed high mode is activated after tACQ. Tx1 (B = 0, D = 1) enables the power amplifier with no output power (after falling edge of pin EN while pin SDIO is LOW). An additional command activates the adaptive mode or fixed low mode. After selecting the supply condition, the data transmission can be started (Tx2 command). In Figure 9, the transparent mode is selected but synchronized data transmission is also possible. 6.4 Soft modulation schemes The OL2300 supports bandwidth-reducing modulation schemes for ASK and for FSK. In both cases the required bandwidth of the emitted RF signal is reduced by low-pass filtering of the baseband signal. The low-pass characteristic of the filter is flexible and can be adjusted according to the requirements of the application. Filtering is implemented by linear interpolation of intermediate steps in each transition. This transforms the rectangular shape of the baseband data signal to a trapezoid shape. The slope is adjustable by defining the transition time via special function register MRCON. AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 15 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 6.5 ASK 1 Tx Data t 0 AMH ASK t AML AMH Soft - ASK AML t tSA tM 019aac610 Fig 10. ASK soft modulation The number of intermediate steps for ASK is limited according to the driver stage of the power amplifier. A staircase replaces each transition. The actual number of steps depends on the settings of the ACON registers. n = AMH AML[3:0]. The slope time tSA is defined by the value of RMP[6:0] in register MRCON. RMP t SA = n ------------f REF (3) tM t SA ----2 (4) The slope time needs to be limited in relation to the modulation frequency. If the timing exceeds the limit, the modulation index will be scaled down. The ASK baseband filter function is a number of Dirac pulses. 1 S ASK t = --- n AN11065 Application note n–1 t – tSA --n- i (5) i=0 All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 16 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 t 0 tSA 019aac611 sASK(t), shown for n = 11. Fig 11. ASK baseband filter function The capability of the filter function to limit the bandwidth strongly depends on the number n. In general, the required bandwidth will decrease for high n and a long slope time. Equation 6 shows the power-related filter function in the frequency domain. 1 S ASK f = --- n n–1 e i 2 -j2f t SA --- n i=0 (6) 0 -5 Attenuation [dB] -10 -15 -20 -25 n=1 n=3 n=5 n = 10 n = 15 -30 -35 -40 0 1 2 3 4 5 f/fM 6 7 8 9 10 019aac612 ASK filter function SASK(f), shown for tSA = tM/2. Fig 12. ASK filter function in the frequency domain 6.6 FSK Due to the capability of the PLL, the number of intermediate steps is usually much higher and for FSK a smooth transition is achieved. AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 17 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 Tx Data 1 t 0 fC+∆f FSK t fC-∆f fC+∆f Soft - FSK t fC-∆f tSF 019aac613 tM Fig 13. FSK soft modulation For FSK, the slope time tSF is defined too by the value RMP in register MRCON. 2 FSK RMP t SF = 2 – FBSL ---------------------------------------f REF (7) tM t SF ----2 (8) The slope time needs to be limited in relation to the modulation frequency. If the timing exceeds the limit, the frequency deviation is reduced. The FSK value in register FCON sets the frequency deviation. The flag FBSL is part of the transmitter control register TXCON. According to the increased number of intermediate steps, the FSK baseband filter function can be assumed to be a rectangular pulse. 1, 0 t t SF 1 S FSK t = ------- 0, t0 t SF 0, t t SF (9) 1/tSF t 0 tSF 019aac614 FSK baseband filter function SFSK(t). Fig 14. AN11065 Application note FSK baseband filter function All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 18 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 Equation 10 shows the power-related filter function in the frequency domain. sin ft SF S FSK f = -----------------------ft SF 2 (10) 0 tSF/tM = 1/10 tSF/tM = 1/5 -5 tSF/tM = 1/3 Attenuation [dB] -10 tSF/tM = 1/2 -15 -20 -25 -30 -35 -40 0 1 2 3 4 5 f/fM 6 7 8 9 10 019aac615 SFSK(f) in relation to SASK(f) with n = 12 (dashed). Fig 15. Different FSK filter functions related to ASK filter function 7. Optimum output impedance Output power and supply current were measured at different output impedances. Two power setups were investigated at different output frequencies for the following parameters: Temperature T = [40, 25, 85] °C Supply voltage VDD = [2.1, 2.4, 2.7, 3.0, 3.3, 3.6] V Measurements were performed on one part. Depending on the output frequency, either a device variant VHN or NHN was chosen. As the investigations were limited to one part, only the typical performance of the OL2300 is shown here. Two consecutive measurements were applied for each frequency setup. AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 19 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 VDD choke tuner DC block OL2300 P2 P1 019aac616 Fig 16. Measurement setup In the first measurement, P1 and P2 were connected to a network analyzer to determine the impedance applied to the power amplifier and the power loss inside the tuner for specific tuner settings. At the same tuner settings the output power at P2 was measured in a second step. For this the network analyzer was removed from P1, P2 and then connected to a spectrum analyzer. In both measurements, the OL2300 was initialized output frequency dependent, with the parameters shown in Table 4. The PLL was always switched on. The power amplifier was enabled for the second measurement. Measurement point P1 corresponds to the position of capacitor C6 in the layout recommendations given in Section 2.2 on page 4. The following information is represented in Smith charts based on 50 in the sections below. • effective output power provided by the OL2300 and the corresponding supply current dependent on the applied impedance • dependency of temperature and supply voltage on output power and supply current Table 4. Frequency setup with corresponding parameter set Parameter Frequency 315 MHz 434 MHz 868 MHz 915 MHz fosc: 18.37036 MHz 13.28963 MHz 13.28963 MHz 13.28963 MHz Bit XOSL: 1b 0b 0b 0b Bit FBSL: 0b 0b 1b 1b ACON[23:0]: 15d 15d 15d 15d Bit ENXR: 1b 1b 1b 1b Table 5. Power setups Parameter Power setup PAM (power amplifier mode) 1 2 2 3 Bit CASC 1b 0b Bit ENRAD 1b 0b Power setup 1: PAM2 (power mode 2) AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 20 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 • High power • Low stability CASC1, ENRAD1 • Further stabilized and regulated output power • Slightly reduced power Power setup 2: PAM3 (power mode 3) • Maximum power • No stabilization 7.1 Optimum output impedance measured at 315 MHz 7.1.1 Power setup 1 +j1.0 +j5.0 +j0.2 0.2 0.0 dBm 12 10 8 6 4 2 0 -2 -4 -6 -8 -10 -12 -14 +j2.0 +j0.5 0.5 1.0 2.0 5.0 ∞ -j5.0 -j0.2 -j2.0 -j0.5 -j1.0 019aac617 POUT = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 17. Output power with applied impedance at 315 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 21 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V dB 2 max(∆ POUT) 1 0 -1 -2 min(∆ POUT) -3 -4 019aac618 Output power deviation: POUT = POUT (TR, VDDR) POUT at 25 C, 2.7 V. Fig 18. Output power deviation at 315 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 22 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 +j1.0 mA +j0.5 +j2.0 15 14 13 +j5.0 +j0.2 12 0.2 0.0 0.5 1.0 2.0 5.0 11 ∞ 10 9 -j5.0 -j0.2 8 7 6 -j2.0 -j0.5 -j1.0 019aac619 IS = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 19. Supply current with applied impedance at 315 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 23 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V mA 4 max(∆ IS) 3 2 1 0 -1 -2 min(∆ IS) -3 -4 019aac620 IS = IS (TR, VDDR) IS at 25 C, 2.7 V Fig 20. Supply current deviation at 315 MHz; power setup 1 This setup provides excellent performance for an output power of about 5 dBm. The output impedance should be chosen to be 250+j0 . At this point the output power at pin PAOUT is about 7 dBm; assuming a power loss of about 1 dB in the matching network provides an available power of 6 dBm. By trimming parameter ACON, an output power of 5 dBm can be reached. The overall stability of the output power is about ±1.5 dB at this matching point. With increased impedance, the temperature stability increases but the supply voltage stability decreases. The imaginary part of the impedance should be about 0 . For mass production it may be better to choose a small imaginary part of about +50 . Depending on the variation in values of the components comprising the matching network, the actual matching impedance can differ between devices. Adding a small imaginary part to the optimum output impedance ensures that all devices will have an imaginary part that is not less than 0 . The output power deviation figure shows a slightly worse temperature stability behavior in this area. The current supply is about 6.5 mA 1 mA at this point. AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 24 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 7.1.2 Power setup 2 +j1.0 +j2.0 +j0.5 +j5.0 +j0.2 0.2 0.0 dBm 12 10 8 6 4 2 0 -2 -4 -6 -8 -10 -12 -14 0.5 1.0 2.0 5.0 ∞ -j5.0 -j0.2 -j2.0 -j0.5 -j1.0 019aac621 POUT = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 21. Output power with applied impedance at 315 MHz; power setup 2 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 25 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V dB 2 max(∆ POUT) 1 0 -1 -2 min(∆ POUT) -3 -4 019aac622 Output power deviation: POUT = POUT (TR, VDDR) POUT at 25 C, 2.7 V. Fig 22. Output power deviation at 315 MHz; power setup 2 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 26 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 +j1.0 mA +j0.5 +j2.0 15 14 13 +j5.0 +j0.2 12 0.2 0.0 0.5 1.0 2.0 5.0 11 ∞ 10 9 -j5.0 -j0.2 8 7 6 -j2.0 -j0.5 -j1.0 019aac623 IS = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 23. Supply current with applied impedance at 315 MHz; power setup 2 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 27 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V mA 4 max(∆ IS) 3 2 1 0 -1 -2 min(∆ IS) -3 -4 019aac624 IS = IS (TR, VDDR) IS at 25 C, 2.7 V Fig 24. Supply current deviation at 315 MHz; power setup 2 Power setup 2 provides a maximum output power at pin PAOUT of 11 dBm at 25 C with a 2.7 V supply. This value is reached with an output impedance of 160 + j10 . The optimum impedance varies with supply voltage and temperature. The real part of the optimum impedance increases with an increase in supply voltage and decreases with an increase in temperature. At the given output impedance of 160 + j10 , the output power shows a deviation of +2 dB/3 dB with temperature and supply voltage. The output power is more unstable with changes in supply voltage than it is with changes in temperature. The current supply is about 12 mA 2.5 mA for optimum output impedance. AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 28 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 7.2 Optimum output impedance measured at 434 MHz 7.2.1 Power setup 1 +j1.0 +j2.0 +j0.5 +j5.0 +j0.2 0.2 0.0 dBm 12 10 8 6 4 2 0 -2 -4 -6 -8 -10 -12 -14 0.5 1.0 2.0 5.0 ∞ -j5.0 -j0.2 -j2.0 -j0.5 -j1.0 019aac625 POUT = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 25. Output power with applied impedance at 434 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 29 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V dB 2 max(∆ POUT) 1 0 -1 -2 min(∆ POUT) -3 -4 019aac626 Output power deviation: POUT = POUT (TR, VDDR) POUT at 25 C, 2.7 V. Fig 26. Output power deviation at 434 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 30 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 +j1.0 mA +j2.0 +j0.5 15 14 13 +j5.0 +j0.2 12 0.2 0.0 0.5 1.0 2.0 5.0 11 ∞ 10 9 -j5.0 -j0.2 8 7 6 -j2.0 -j0.5 -j1.0 019aac627 IS = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 27. Supply current with applied impedance at 434 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 31 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V mA 4 max(∆ IS) 3 2 1 0 -1 -2 min(∆ IS) -3 -4 019aac628 IS = IS (TR, VDDR) IS at 25 C, 2.7 V Fig 28. Supply current deviation at 434 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 32 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 7.2.2 Power setup 2 +j1.0 +j2.0 +j0.5 +j5.0 +j0.2 0.2 0.0 dBm 12 10 8 6 4 2 0 -2 -4 -6 -8 -10 -12 -14 0.5 1.0 2.0 5.0 ∞ -j5.0 -j0.2 -j2.0 -j0.5 -j1.0 019aac629 POUT = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 29. Output power with applied impedance at 434 MHz; power setup 2 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 33 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V dB 2 max(∆ POUT) 1 0 -1 -2 min(∆ POUT) -3 -4 019aac630 Output power deviation: POUT = POUT (TR, VDDR) POUT at 25 C, 2.7 V. Fig 30. Output power deviation at 434 MHz; power setup 2 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 34 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 +j1.0 mA +j2.0 +j0.5 15 14 13 +j5.0 +j0.2 12 0.2 0.0 0.5 1.0 2.0 5.0 11 ∞ 10 9 -j5.0 -j0.2 8 7 6 -j2.0 -j0.5 -j1.0 019aac631 IS = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 31. Supply current with applied impedance at 434 MHz; power setup 2 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 35 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V mA 4 max(∆ IS) 3 2 1 0 -1 -2 min(∆ IS) -3 -4 019aac632 IS = IS (TR, VDDR) IS at 25 C, 2.7 V Fig 32. Supply current deviation at 434 MHz; power setup 2 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 36 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 7.2.3 Optimum output impedance measured at 868 MHz 7.2.3.1 Power setup 1 +j1.0 +j5.0 +j0.2 0.2 0.0 dBm 12 10 8 6 4 2 0 -2 -4 -6 -8 -10 -12 -14 +j2.0 +j0.5 0.5 1.0 2.0 5.0 ∞ -j5.0 -j0.2 -j2.0 -j0.5 -j1.0 019aac633 POUT = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 33. Output power with applied impedance at 868 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 37 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V dB 2 max(∆ POUT) 1 0 -1 -2 min(∆ POUT) -3 -4 019aac634 Output power deviation: POUT = POUT (TR, VDDR) POUT at 25 C, 2.7 V. Fig 34. Output power deviation at 868 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 38 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 +j1.0 mA +j2.0 +j0.5 15 14 13 +j5.0 +j0.2 12 0.2 0.0 0.5 1.0 2.0 5.0 11 ∞ 10 9 -j5.0 -j0.2 8 7 6 -j2.0 -j0.5 -j1.0 019aac635 IS = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 35. Supply current with applied impedance at 868 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 39 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V mA 4 max(∆ IS) 3 2 1 0 -1 -2 min(∆ IS) -3 -4 019aac636 IS = IS (TR, VDDR) IS at 25 C, 2.7 V Fig 36. Supply current deviation at 868 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 40 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 7.2.3.2 Power setup 2 +j1.0 +j5.0 +j0.2 0.2 0.0 dBm 12 10 8 6 4 2 0 -2 -4 -6 -8 -10 -12 -14 +j2.0 +j0.5 0.5 1.0 2.0 5.0 ∞ -j5.0 -j0.2 -j2.0 -j0.5 -j1.0 019aac637 POUT = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 37. Output power with applied impedance at 868 MHz; power setup 2 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 41 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V dB 2 max(∆ POUT) 1 0 -1 -2 min(∆ POUT) -3 -4 019aac638 Output power deviation: POUT = POUT (TR, VDDR) POUT at 25 C, 2.7 V. Fig 38. Output power deviation at 868 MHz; power setup 2 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 42 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 +j1.0 mA +j2.0 +j0.5 15 14 13 +j5.0 +j0.2 12 0.2 0.0 0.5 1.0 2.0 5.0 11 ∞ 10 9 -j5.0 -j0.2 8 7 6 -j2.0 -j0.5 -j1.0 019aac639 IS = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 39. Supply current with applied impedance at 868 MHz; power setup 2 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 43 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V mA 4 max(∆ IS) 3 2 1 0 -1 -2 min(∆ IS) -3 -4 019aac640 IS = IS (TR, VDDR) IS at 25 C, 2.7 V Fig 40. Supply current deviation at 868 MHz; power setup 2 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 44 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 7.2.4 Optimum output impedance measured at 915 MHz 7.2.4.1 Power setup 1 +j1.0 +j5.0 +j0.2 0.2 0.0 dBm 12 10 8 6 4 2 0 -2 -4 -6 -8 -10 -12 -14 +j2.0 +j0.5 0.5 1.0 2.0 5.0 ∞ -j5.0 -j0.2 -j2.0 -j0.5 -j1.0 019aac641 POUT = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 41. Output power with applied impedance at 915 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 45 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V dB 2 max(∆ POUT) 1 0 -1 -2 min(∆ POUT) -3 -4 019aac642 Output power deviation: POUT = POUT (TR, VDDR) POUT at 25 C, 2.7 V. Fig 42. Output power deviation at 915 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 46 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 +j1.0 mA +j2.0 +j0.5 15 14 13 +j5.0 +j0.2 12 0.2 0.0 0.5 1.0 2.0 5.0 11 ∞ 10 9 -j5.0 -j0.2 8 7 6 -j2.0 -j0.5 -j1.0 019aac643 IS = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 43. Supply current with applied impedance at 915 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 47 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V mA 4 max(∆ IS) 3 2 1 0 -1 -2 min(∆ IS) -3 -4 019aac644 IS = IS (TR, VDDR) IS at 25 C, 2.7 V Fig 44. Supply current deviation at 915 MHz; power setup 1 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 48 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 7.2.4.2 Power setup 2 +j1.0 +j5.0 +j0.2 0.2 0.0 dBm 12 10 8 6 4 2 0 -2 -4 -6 -8 -10 -12 -14 +j2.0 +j0.5 0.5 1.0 2.0 5.0 ∞ -j5.0 -j0.2 -j2.0 -j0.5 -j1.0 019aac645 POUT = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 45. Output power with applied impedance at 915 MHz; power setup 2 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 49 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 TR VDDR[V] -40 to 85°C 2.1 to 3.6V 25°C 2.1 to 3.6V -40 to 85°C 2.7V dB 2 max(∆ POUT) 1 0 -1 -2 min(∆ POUT) -3 -4 019aac646 Output power deviation: POUT = POUT (TR, VDDR) POUT at 25 C, 2.7 V. Fig 46. Output power deviation at 915 MHz; power setup 2 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 50 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 +j1.0 mA +j2.0 +j0.5 15 14 13 +j5.0 +j0.2 12 0.2 0.0 0.5 1.0 2.0 5.0 11 ∞ 10 9 -j5.0 -j0.2 8 7 6 -j2.0 -j0.5 -j1.0 019aac647 IS = f(ZOUT). VDD = 2.7 V, T = 25 C. Fig 47. Supply current with applied impedance at 915 MHz; power setup 2 AN11065 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 51 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 -40 to 85°C 2.1 to 3.6V TR VDDR[V] 25°C 2.1 to 3.6V -40 to 85°C 2.7V mA 4 max(∆ IS) 3 2 1 0 -1 -2 min(∆ IS) -3 -4 019aac648 IS = IS (TR, VDDR) IS at 25 C, 2.7 V Fig 48. Supply current deviation at 915 MHz; power setup 2 8. Abbreviations Table 6. Abbreviations Acronym Description FSK Frequency-Shift Keying LSB Least Significant Bit MSB Most Significant Bit PLL Phase-Locked Loop SPI Serial Peripheral Interface VCO Voltage-Controlled Oscillator 9. References [1] AN11065 Application note OL2300 — Fractional-N PLL based transmitter data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 52 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 10. Legal information 10.1 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 10.2 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product AN11065 Application note design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Evaluation products — This product is provided on an “as is” and “with all faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates and their suppliers expressly disclaim all warranties, whether express, implied or statutory, including but not limited to the implied warranties of non-infringement, merchantability and fitness for a particular purpose. The entire risk as to the quality, or arising out of the use or performance, of this product remains with customer. In no event shall NXP Semiconductors, its affiliates or their suppliers be liable to customer for any special, indirect, consequential, punitive or incidental damages (including without limitation damages for loss of business, business interruption, loss of use, loss of data or information, and the like) arising out the use of or inability to use the product, whether or not based on tort (including negligence), strict liability, breach of contract, breach of warranty or any other theory, even if advised of the possibility of such damages. Notwithstanding any damages that customer might incur for any reason whatsoever (including without limitation, all damages referenced above and all direct or general damages), the entire liability of NXP Semiconductors, its affiliates and their suppliers and customer’s exclusive remedy for all of the foregoing shall be limited to actual damages incurred by customer based on reasonable reliance up to the greater of the amount actually paid by customer for the product or five dollars (US$5.00). The foregoing limitations, exclusions and disclaimers shall apply to the maximum extent permitted by applicable law, even if any remedy fails of its essential purpose. 10.3 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 1 — 18 July 2011 © NXP B.V. 2011. All rights reserved. 53 of 54 AN11065 NXP Semiconductors UHF Transmitter OL2300 11. Contents 1 2 2.1 2.2 3 3.1 3.2 3.3 4 5 6 6.1 6.2 6.3 6.4 6.5 6.6 7 7.1 7.1.1 7.1.2 7.2 7.2.1 7.2.2 7.2.3 7.2.3.1 7.2.3.2 7.2.4 7.2.4.1 7.2.4.2 8 9 10 10.1 10.2 10.3 11 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Board design . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Phase noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Frequency modulation . . . . . . . . . . . . . . . . . . . 7 Amplitude modulation . . . . . . . . . . . . . . . . . . . . 8 Inappropriate FC settings . . . . . . . . . . . . . . . . . 9 Reset conditions . . . . . . . . . . . . . . . . . . . . . . . 10 RF power trimming . . . . . . . . . . . . . . . . . . . . . 11 XO Supply options. . . . . . . . . . . . . . . . . . . . . . 12 Sequence for fixed low mode . . . . . . . . . . . . . 13 Sequence for adaptive mode . . . . . . . . . . . . . 14 Application advice. . . . . . . . . . . . . . . . . . . . . . 14 Soft modulation schemes . . . . . . . . . . . . . . . . 15 ASK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 FSK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Optimum output impedance . . . . . . . . . . . . . . 19 Optimum output impedance measured at 315 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Power setup 1. . . . . . . . . . . . . . . . . . . . . . . . . 21 Power setup 2. . . . . . . . . . . . . . . . . . . . . . . . . 25 Optimum output impedance measured at 434 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Power setup 1. . . . . . . . . . . . . . . . . . . . . . . . . 29 Power setup 2. . . . . . . . . . . . . . . . . . . . . . . . . 33 Optimum output impedance measured at 868 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Power setup 1. . . . . . . . . . . . . . . . . . . . . . . . . 37 Power setup 2. . . . . . . . . . . . . . . . . . . . . . . . . 41 Optimum output impedance measured at 915 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Power setup 1. . . . . . . . . . . . . . . . . . . . . . . . . 45 Power setup 2. . . . . . . . . . . . . . . . . . . . . . . . . 49 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 52 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 Legal information. . . . . . . . . . . . . . . . . . . . . . . 53 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 18 July 2011 Document identifier: AN11065