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APPENDIX C
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APPLICATION EXAMPLES
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C-1
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Application Examples
INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-3
TYPICAL SYSTEM TOPOLOGY. . . . . . . . . . . . . . . . . . . . . . C-3
TYPICAL AUDIO APPLICATION. . . . . . . . . . . . . . . . . . . . . . C-4
PROGRAM OVERLAY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-5
SINGLE DELAY LINE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-5
EARLY REFLECTION FILTER . . . . . . . . . . . . . . . . . . . . . . . C-6
TWO CHANNEL COMB FILTER . . . . . . . . . . . . . . . . . . . . . . C-7
3-TAP FIR FILTER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-10
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C.1
C.2
C.3
C.4
C.5
C.6
C.7
C.8
C-2
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Application Examples
C.1
INTRODUCTION
Several examples illustrating the use of the DSP in common audio applications are
presented in this section. The examples assume that the DSP is in the SRAM mode
and configured for 0 wait states, 24-bit words, and an 8-bit bus (12 clock
cycles-per-word transfer).
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C.2
TYPICAL SYSTEM TOPOLOGY
Figure C-1 shows the topology of a typical DSP audio application.
SRAM/
DRAM
Left front
Stereo D/A
MA17:0
Stereo A/D
Stereo A/D
I2S/SONY
I2S/SONY
MD7:0
Right front
TR0
I2S/SONY
REC0
Left rear
CONSUMER
AUDIO DSP
TR1
I2S/SONY
Stereo D/A
Right rear
REC1
TR2
GPIO
SHI
I2S/SONY
EXTAL
Left effects
Stereo D/A
Right effects
HOST
PROCESSOR
External Sinusoidal Clock Source
AA0259k
Figure C-1 Topology of DSP Typical Audio Application
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C-3
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Application Examples
C.3
TYPICAL AUDIO APPLICATION
Figure C-2 depicts a sample configuration using the DSP56009 for AC3 Surround or
DTS.
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Host
Microcontroller
Right
Stereo DAC
SHI
Left
SAI Tx
Center
DSP56009
ICE 958 Rx
SAI Rx
SAI Tx
Stereo DAC
Subwoofer
SAI Tx
Surround L
EMI
Stereo DAC
Surround R
EEPROM
Optional memory for soundfield
effects, DTS decoding, buffering, and booting
(not required for AC3 applications)
AA0444
SRAM
Figure C-2 Using the DSP56009 for Surround Sound
C-4
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Application Examples
C.4
PROGRAM OVERLAY
The following routine illustrates a program overlay by replacing N instruction words
in the internal program memory. The EMI operates in the linear SRAM mode (EAM
(3:0) = 0) with 0 wait states. It is also assumed that the external memory device
(EPROM/SRAM) receives its chip select from GPIO3.
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overlay
movep
movep
movep
movep
move
movep
bset
do
rep
nop
#OL_SRAM,x:ECSR
$000f07x,x:GPIOR
#>EXT_PROG_BUF,x:EBAR0
#0,x:EOR0
#>INT_PROG_BUF,r0
#0,x: EOR0
#ERTS,x:ECSR
#(N-2),end_OL
#1
;
;
;
;
;
;
;
;
RAM definition
assert GPIO3 - enable CS
start address of external buffer
drive 1st read trigger
start address of internal buffer
drive 2nd read trigger
set read triggers by reading EDDR
loop to drive more (N-2) triggers
movep
x:EDRR0,p:(r0)+
; move previous read data to PMEM and
; trigger next read cycle
#ERTS,x:ECSR
x:EDRR0,p:(r0)+
x: EDRR0,p:(r0)+
#GPIOR,x:GPIOR
;
;
;
;
end_OL
bclr
movep
movep
bset
C.5
turn off read triggers by EDRR read
move instruction #N-1 to PMEM
move instruction #N to PMEM
negate GPIO3 - disable CS
SINGLE DELAY LINE
The following routine is an example of a single delay line, as illustrated in
Figure C-3. This type of routine is typically used in surround sound or reverb
applications.
Delay_Line
movep
movep
movep
movep
movep
movep
nop
movep
#RAM,x:ECSR
y:Write_Off,x:EWOR
y:Delay Base,x:EBAR0
#(T_dly-1),x:EOR0
x:SAMPLE,x:EDWR0
x:EBAR0,y:Delay_Base
x:EDRR0,y0
MOTOROLA
;
;
;
;
;
;
;
;
use EINR = 1.
optional change of write offset
load base address
read trigger for delayed sample
write trigger for current sample
store updated base address
nop or other
read the delayed data
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Application Examples
x(n)
Current Sample
Delay T
x(n - T)
Delayed Sample
AA0447
Figure C-3 Single Delay Line
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C.6
EARLY REFLECTION FILTER
The following routine is an example of an N-taps Early Reflection filter to perform
the following computation:
y (n) = SUM [{i = 1...N} g(i) x(n-T (i))]
movep
move
move
movep
movep
clr a
#RAM,x:ECSR
#GAIN_Base,r4
#Off_Base,r0
y:FIR_Base,x:EBAR0
x:(r0)+,x:EOR0
x:(r0)+,x0 y:(r4)+,y0
do
movep
#(N-1),end_E
x0,x:EOR0
nop
nop
movep
mac
x:EDRR0,x1
x1,y0,a x:(r0)+,x0 y:(r4)+,y0
;
;
;
;
;
;
ECSR with EINW = 1
gain table base
offset table base
FIR base address
drive 1st read cycle
fetch 1st gain and 2nd delay
;
;
;
;
;
initiate next read
trigger
nop or other
nop or other
read current data
; sum, fetch next gain and offset
; nop or other
nop
end_E
movep
x:SAMPLE,x:EDWR0
nop
movep
macr
movep
move
x:EDRR0,x1
x1,y0,a
x:EBAR0,y:FIR_Base
a,x:FIR_output
C-6
;
;
;
;
;
;
;
write current sample to delay line.
EWOR = 0
nop or other
read last data
compute the output
store FIR base
store result in internal memory
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Application Examples
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C.7
TWO CHANNEL COMB FILTER
The following program implements a two channel (left and right) comb filter
structure in which gain and delays are not equal. This type of program is typically
used in surround sound and reverb applications. The filter structure is illustrated in
Figure C-4. This example makes extensive use of the dual channel capability and
pipeline mechanism of the EMI. The code is optimized for SRAM (0 wait-state) 24-bit
words and 8-bit bus (6 instruction cycles per access). In the event that another EMI
mode is being selected, NOP instructions might be added in the noted points (#1, #2,
and #3). The optimized code for Fast DRAM mode, 24-bit words and 8-bit bus (7 I cyc
per access and data available for read at last Icyc of the access) is achieved by adding
4 NOP instructions at point #3. This code assumes EWOR is already loaded with
offset zero.
; dual_comb
move
move
move
move
move
move
move
movep
#<Base_buff,r0
#<Off_buff,r1
#<Gain_buff,r2
#<SAMPLE,r4
#0,x0
#0,x1
#0,y1
#MODE,x:ECSR
;
;
;
;
do
#N,end_comb
move
movep
movep
movep
movep
add
x1,b
x:(r0),x:EBAR0
x:(r1),x:EOR0
y:(r0),x:EBAR1
y:(r1),x:EOR1
x0,b x:(r2),x0 y:(r4),a
movep
x:EBAR0,x:(r0)
base address values
offset (delay)values
gains values
left/right samples
;
;
;
;
;
load
base
read
base
read
right channel output
address of left channel
trigger of left channel
address of right channel
trigger of right channel
; get left sample and gain values
; update base address left
movep
macr
x:EDRR0,y0
x0,y0,a d,x1
movep
move
add
movep
a,x:EDWR0
y1,b
y0,b y;(r2)+,y0 x:(r4),a
x:EBAR1,y:(r0)+
MOTOROLA
to
to
to
to
; x1 accumulates right comb outputs
; x1 accumulates left comb outputs
; EINR = 1, ERTS = 0
; point (#1}
; point (#2}
pointer
pointer
pointer
pointer
;
;
;
;
;
;
;
;
;
insert “nop or other”
instructions if required
read data of left channel
compute input to delay buffer
(left) and store right channel output
insert input in delay buffer (left)
load left channel output
get right sample and gain values
update base address (right)
; insert “nop or other”
; instructions if required
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C-7
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Application Examples
movep
macr
x:EDRR1,x0
x0,y0,a b,y1
movep
a,x:EDWR1
; point (#3}
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nop
nop
end comb
move
add
move
C-8
x1,b
x0,b y1,y:out_left
b,x:out_right
;
;
;
;
read data of right channel
compute input to delay buffer (right) and
store left channel output
insert input in delay buffer (right)
;
;
;
;
insert “nop or other”
instructions if required
nop or other
nop or other
; store left output
; store right output
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Application Examples
+
Delay T1
G1
∑
•
•
•
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+
Delay TN
GN
Comb Filters for One Channel
X
Y
r0
Base
Buffers
(Left)
r0
Base
Buffers
(Right)
r1
Offset
Buffers
(Left)
r1
Offset
Buffers
(Right)
r2
Gain
Buffers
(Left)
r2
Gain
Buffers
(Right)
r4
Sample
(Left)
r4
Sample
(Right)
AA0448
Figure C-4 Two-Channel Comb Filter Structure
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C-9
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Application Examples
C.8
3-TAP FIR FILTER
The following program implements a 3-tap FIR filter. This type of program is
typically used in generating early reflection information for surround sound and
reverb applications. The filter structure is illustrated in Figure C-5. This code
segment assumes accesses of 16-bit words on an 8-bit bus, “fast” DRAM timing (26
instruction cycles), and 0-wait state SRAM timing (20 instruction cycles).
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Number of memory storage locations = T3(seconds) × fs (Hz).
For a 50 ms delay and 44.1 KHz sampling rate: 0.05 × 44100 = 2205 locations.
FIR Filter Assembler Code (EMI mode: increment EBAR on write operation):
movep
movep
movep
clr a
movep
movep
mac
movep
mac
movep
movep
mac
C-10
x:FIR_BASE,x:EBAR0
#T1_OFF,x:EOR0
; set FIR base address
; offset T1 and trigger mem. read
; wait 3 (DRAM) or 1 (SRAM) inst.
; cycles or do other tasks
#T2_OFF,x:EOR0
; offset T2 and trigger mem. read
x:G1,x0
; get G1,clear accumulator
x:EDRR0,y0
; get x(n-T1)
#T3_OFF,x:EOR0
; offset T3 and trigger r mem. read
x0,y0,a
x:G2,x0
; y(n) = G1 x(n-T1),get G2
; wait 2 (DRAM) or 0(SRAM)
; inst. cycles or do other tasks
x:EDRR0,y0
; get x(n-T2)
x0,y0,a x:G3,x0 y(n) = y(n)+G2 x(n-T2)
; get G3, wait 4 (DRAM)or 2 (SRAM) inst. cycles
; or do other tasks
x:EDRR0,y0
; get x(n-T3)
x:SAMPLE,x:EDWR0
; store x(n) in mem.
x0,y0,a
; calculate y(n) = y(n) + G3 x(n-T3)
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Application Examples
x(n-T1)
x(n)
Delay T1
Delay T2
Gain G1
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x(n-T2)
x(n-T3)
Delay T3
Gain G2
Gain G3
+
y(n) = G1 x (n - T1) + G2 x (n - T2) + G3 x (n - T3)
AA0449
Figure C-5 3 Tap FIR Filter
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C-11
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Application Examples
C-12
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MOTOROLA