AT93C46/56/57/66 Features • • • • • • • • Low Voltage and Standard Voltage Operation 5.0 (VCC = 4.5V to 5.5V) 2.7 (VCC = 2.7V to 5.5V) 2.5 (VCC = 2.5V to 5.5V) 1.8 (VCC = 1.8V to 5.5V) User Selectable Internal Organization 1K: 128 x 8 or 64 x 16 2K: 256 x 8 or 128 x 16 4K: 512 x 8 or 256 x 16 3-Wire Serial Interface 2 MHz Clock Rate (5V) Compatibility Self-Timed Write Cycle (10 ms max) High Reliability Endurance: 1 Million Cycles Data Retention: 100 Years Automotive Grade and Extended Temperature Devices Available 8-Pin PDIP, JEDEC SOIC, and EIAJ SOIC Packages 3-Wire Serial CMOS E2PROMs 1K (128 x 8 or 64 x 16) 2K (256 x 8 or 128 x 16) Description The AT93C46/56/57/66 provides 1024/2048/4096 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 64/128/256 words of 16 bits each, when the ORG Pin is connected to VCC and 128/256/512 words of 8 bits each when it is tied to ground. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT93C46/56/57/66 is available in space saving 8-pin PDIP and 8-pin JEDEC and EIAJ SOIC packages. (continued) 4K (512 x 8 or 256 x 16) Pin Configurations Pin Name Function CS Chip Select SK Serial Data Clock DI Serial Data Input DO Serial Data Output GND Ground VCC Power Supply ORG Internal Organization DC Don’t Connect 8-Pin SOIC 8-Pin PDIP AT93C46/56/57/66 8-Pin SOIC Rotated (R) (1K JEDEC Only) 0172J 2-63 Description (Continued) The AT93C46/56/57/66 is enabled through the Chip Select pin (CS), and accessed via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a READ instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO. The WRITE cycle is completely self-timed and no separate ERASE cycle is required be- fore WRITE. The WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. When CS is brought “high” following the initiation of a WRITE cycle, the DO pin outputs the READY/BUSY status of the part. The AT93C46/56/57/66 is available in 4.5V to 5.5V, 2.7V to 5.5V, 2.5V to 5.5V, and 1.8V to 5.5V versions. Absolute Maximum Ratings* Operating Temperature................... -55°C to +125°C Storage Temperature...................... -65°C to +150°C Voltage on Any Pin with Respect to Ground ..................... -1.0V to +7.0V *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum Operating Voltage ........................... 6.25V DC Output Current ......................................... 5.0 mA Block Diagram (1) Note: 2-64 1. When the ORG pin is connected to VCC , the x 16 organization is selected. When it is connected to ground, the x 8 organization is selected. If the ORG pin is left unconnected, then an internal pullup device (of approximately 1 MΩ) will select the x 16 organization. This feature is not available on 1.8V devices. AT93C46/56/57/66 AT93C46/56/57/66 Pin Capacitance (1) Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted). Test Conditions Max Units Conditions COUT Output Capacitance (DO) 5 pF VOUT = 0V CIN Input Capacitance (CS, SK, DI) 5 pF VIN = 0V Note: 1. This parameter is characterized and is not 100% tested. DC Characteristics Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V, TAC = 0°C to +70°C, VCC = +1.8V to +5.5V (unless otherwise noted). Symbol Parameter VCC1 Supply Voltage VCC2 Max Unit 1.8 5.5 V Supply Voltage 2.5 5.5 V VCC3 Supply Voltage 2.7 5.5 V VCC4 Supply Voltage 4.5 5.5 V Supply Current ICC Test Condition VCC = 5.0V Min Typ READ at 1.0 MHz 0.5 2.0 mA WRITE at 1.0 MHz 0.5 2.0 mA ISB1 Standby Current VCC = 1.8V CS = 0V 0 0.1 µA ISB2 Standby Current VCC = 2.5V CS = 0V 6.0 10.0 µA ISB3 Standby Current VCC = 2.7V CS = 0V 6.0 10.0 µA ISB4 Standby Current VCC = 5.0V CS = 0V 17 30 µA IIL Input Leakage VIN = 0V to VCC 0.1 1.0 µA IOL Output Leakage VIN = 0V to VCC 0.1 1.0 µA VIL1 (1) VIH1 (1) VIL2 (1) VIH2 (1) Input Low Voltage Input High Voltage 4.5V ≤ VCC ≤ 5.5V -0.1 2.0 0.8 VCC + 1 V Input Low Voltage Input High Voltage 1.8V ≤ VCC ≤ 2.7V 0.0 VCC x 0 .7 VCC x 0.3 VCC + 1 V VOL1 VOH1 Output Low Voltage Output High Voltage 4.5V ≤ VCC ≤ 5.5V IOL = 2.1 mA 0.4 V VOL2 VOH2 Output Low Voltage Output High Voltage 1.8V ≤ VCC ≤ 2.7V IOL = 0.15 mA Note: IOH = -0.4 mA IOH = -100 µA 2.4 V 0.2 VCC - 0.2 V V 1. VIL min and VIH max are reference only and are not tested. 2-65 AC Characteristics Applicable over recommended operating range from TA = -40°C to + 85°C, VCC = As Specified, CL = 1 TTL Gate and 100 pF (unless otherwise noted). Symbol Parameter Test Condition Min Typ Max Units 2 1 0.5 0.25 MHz SK Clock Frequency 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 0 0 0 0 SK High Time 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 250 250 500 1000 ns tSKL SK Low Time 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 250 250 500 1000 ns tCS Minimum CS Low Time 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 250 250 500 1000 ns fSK tSKH tCSS CS Setup Time Relative to SK 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 50 50 100 200 ns 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 100 100 200 400 ns 0 ns 100 100 200 400 ns tDIS DI Setup Time Relative to SK tCSH CS Hold Time Relative to SK tDIH tPD1 tPD0 DI Hold Time Output Delay to ‘1’ Output Delay to ‘0’ Relative to SK 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V AC Test 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 250 250 500 1000 ns AC Test 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 250 250 500 1000 ns ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 250 250 500 1000 ns ≤ 5.5V ≤ 5.5V ≤ 5.5V ≤ 5.5V 100 100 200 400 ns 10 ms tSV CS to Status Valid AC Test 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC tDF CS to DO in High Impedance AC Test CS = VIL 4.5V ≤ VCC 2.7V ≤ VCC 2.5V ≤ VCC 1.8V ≤ VCC tWP Write Cycle Time 2-66 AT93C46/56/57/66 0.1 4.5V ≤ VCC ≤ 5.5V 1 ms AT93C46/56/57/66 Instruction Set for the AT93C46 Address Data SB Op Code x8 x 16 READ 1 10 A6 - A0 A5 - A0 EWEN 1 00 11XXXXX 11XXXX Write enable must precede all programming modes. ERASE 1 11 A6 - A0 A5 - A0 Erase memory location An - A0. WRITE 1 01 A6 - A0 A5 - A0 ERAL 1 00 10XXXXX 10XXXX WRAL 1 00 01XXXXX 01XXXX EWDS 1 00 00XXXXX 00XXXX Instruction x8 x 16 Comments Reads data stored in memory, at specified address. D 7 - D0 D15 - D0 Writes memory location An - A0. Erases all memory locations. Valid only at VCC = 4.5V to 5.5V. D7 - D0 D15 - D0 Writes all memory locations. Valid only at VCC = 4.5V to 5.5V. Disables all programming instructions. Instruction Set for the AT93C57 Address Data SB Op Code x8 x 16 READ 1 10 A7 - A0 A6 - A0 EWEN 1 00 11XXXXXX 11XXXXX Write enable must precede all programming modes. ERASE 1 11 A7 - A0 A6 - A0 Erase memory location An - A0. WRITE 1 01 A7 - A0 A6 - A0 ERAL 1 00 10XXXXXX 10XXXXX WRAL 1 00 01XXXXXX 01XXXXX EWDS 1 00 00XXXXXX 00XXXXX Instruction x8 x 16 Comments Reads data stored in memory, at specified address. D 7 - D0 D15 - D0 Writes memory location An - A0. Erases all memory locations. Valid only at VCC = 4.5V to 5.5V. D7 - D0 D15 - D0 Writes all memory locations. Valid only at VCC = 4.5V to 5.5V. Disables all programming instructions. 2-67 Instruction Set for the AT93C56 and AT93C66 Address Data SB Op Code x8 x 16 READ 1 10 A8 - A0 A7 - A0 EWEN 1 00 11XXXXXXX 11XXXXXX ERASE 1 11 A8 - A0 A7 - A0 WRITE 1 01 A8 - A0 A7 - A0 ERAL 1 00 10XXXXXXX 10XXXXXX WRAL 1 00 01XXXXXXX 01XXXXXX EWDS 1 00 00XXXXXXX 00XXXXXX Instruction 2-68 AT93C46/56/57/66 x8 x 16 Comments Reads data stored in memory, at specified address. Write enable must precede all programming modes. Erases memory location An - A0. D7 - D0 D15 - D0 Writes memory location An - A0. Erases all memory locations. Valid only at VCC = 4.5V to 5.5V. D7 - D0 D15 - D0 Writes all memory locations. Valid when VCC = 5.0V ± 10% and Disable Register cleared. Disables all programming instructions. AT93C46/56/57/66 Functional Description The AT93C46/56/57/66 is accessed via a simple and versatile 3-wire serial communication interface. Device operation is controlled by seven instructions issued by the host processor. A valid instruction starts with a rising edge of CS and consists of a Start Bit (logic ‘1’) followed by the appropriate Op Code and the desired memory Address location. READ (READ): The Read (READ) instruction contains the Address code for the memory location to be read. After the instruction and address are decoded, data from the selected memory location is available at the serial output pin DO. Output data changes are synchronized with the rising edges of serial clock SK. It should be noted that a dummy bit (logic ‘0’) precedes the 8 or 16 bit data output string. ERASE/WRITE (EWEN): To assure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable (EWEN) instruction must be executed first before any programming instructions can be carried out. Please note that once in the Erase/Write Enable state, programming remains enabled until an Erase/Write Disable (EWDS) instruction is executed or VCC power is removed from the part. ERASE (ERASE): The Erase (ERASE) instruction programs all bits in the specified memory location to the logical ‘1’ state. The self-timed erase cycle starts once the ERASE instruction and address are decoded. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). A logic ‘1’ at pin DO indicates that the selected memory location has been erased, and the part is ready for another instruction. WRITE (WRITE): The Write (WRITE) instruction contains the 8 or 16 bits of data to be written into the specified memory location. The self-timed programming cycle starts after the last bit of data is received at serial data input pin DI. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). A logic ‘0’ at DO indicates that programming is still in progress. A logic ‘1’ indicates that the memory location at the specified address has been written with the data pattern contained in the instruction and the part is ready for further instructions. A READY/BUSY status cannot be obtained if the CS is brought high after the end of the self-timed programming cycle, tWP. ERASE ALL (ERAL): The Erase All (ERAL) instruction programs every bit in the memory array to the logic ‘1’ state and is primarily used for testing purposes. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). The ERAL instruction is valid only at VCC = 5.0V ± 10%. WRITE ALL (WRAL): The Write All (WRAL) instruction programs all memory locations with the data patterns specified in the instruction. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). The WRAL instruction is valid only at VCC = 5.0V ± 10%. ERASE/WRITE DISABLE (EWDS): To protect against accidental data disturb, the Erase/Write Disable (EWDS) instruction disables all programming modes and should be executed after all programming operations. The operation of the READ instruction is independent of both the EWEN and EWDS instructions and can be executed at any time. Timing Diagrams Synchronous Data Timing Note: 1. This is the minimum SK period. (continued) 2-69 Organization Key for Timing Diagrams AT93C46 (1K) I/O x8 x 16 AN A6 A5 DN D7 D15 Note: AT93C56 (2K) x8 A8 (1) D7 AT93C57 (2K) AT93C66 (4K) x 16 x8 x 16 x8 x 16 A7 A7 A6 A8 A7 D15 D7 D15 D7 D15 1. A8 is a DON’T CARE value, but the extra clock is required. Timing Diagrams (Continued) READ Timing EWEN Timing EWDS Timing (continued) 2-70 AT93C46/56/57/66 AT93C46/56/57/66 Timing Diagrams (Continued) WRITE Timing WRAL Timing (1) Note: 1. Valid only at VCC = 4.5V to 5.5V. ERASE Timing (continued) 2-71 Timing Diagrams (Continued) TERAL Timing (1) Note: 2-72 1. Valid only at VCC = 4.5V to 5.5V. AT93C46/56/57/66 AT93C46/56/57/66 Ordering Information tWP (max) ICC (max) ISB (max) fMAX (ms) (µA) (µA) (kHz) 10 2000 30.0 2000 AT93C46-10PC AT93C46-10SC AT93C46R-10SC AT93C46W-10SC 8P3 8S1 8S1 8S2 Commercial (0°C to 70°C) 10 800 10.0 1000 AT93C46-10PC-2.7 AT93C46-10SC-2.7 AT93C46R-10SC-2.7 AT93C46W-10SC-2.7 8P3 8S1 8S1 8S2 Commercial (0°C to 70°C) 10 600 10.0 500 AT93C46-10PC-2.5 AT93C46-10SC-2.5 AT93C46R-10SC-2.5 AT93C46W-10SC-2.5 8P3 8S1 8S1 8S2 Commercial (0°C to 70°C) 10 80 0.1 250 AT93C46-10PC-1.8 AT93C46-10SC-1.8 AT93C46R-10SC-1.8 AT93C46W-10SC-1.8 8P3 8S1 8S1 8S2 Commercial (0°C to 70°C) 10 2000 30.0 2000 AT93C46-10PI AT93C46-10SI AT93C46R-10SI AT93C46W-10SI 8P3 8S1 8S1 8S2 Industrial (-40°C to 85°C) 10 800 10.0 1000 AT93C46-10PI-2.7 AT93C46-10SI-2.7 AT93C46R-10SI-2.7 AT93C46W-10SI-2.7 8P3 8S1 8S1 8S2 Industrial (-40°C to 85°C) 10 600 10.0 500 AT93C46-10PI-2.5 AT93C46-10SI-2.5 AT93C46R-10SI-2.5 AT93C46W-10SI-2.5 8P3 8S1 8S1 8S2 Industrial (-40°C to 85°C) 10 80 0.1 250 AT93C46-10PI-1.8 AT93C46-10SI-1.8 AT93C46R-10SI-1.8 AT93C46W-10SI-1.8 8P3 8S1 8S1 8S2 Industrial (-40°C to 85°C) Ordering Code Package Operation Range 2-73 Ordering Information Package Type 8P3 8 Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8 Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8 Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) Options Blank Standard Device (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) -2.5 Low Voltage (2.5V to 5.5V) -1.8 Low Voltage (1.8V to 5.5V) R Rotated Pinout 2-74 AT93C46/56/57/66 AT93C46/56/57/66 Ordering Information tWP (max) ICC (max) ISB (max) fMAX (ms) (µA) (µA) (kHz) 10 2000 30.0 2000 10 800 10.0 10 600 10 Ordering Code Package Operation Range AT93C56-10PC AT93C56-10SC AT93C56W-10SC 8P3 8S1 8S2 Commercial (0°C to 70°C) 1000 AT93C56-10PC-2.7 AT93C56-10SC-2.7 AT93C56W-10SC-2.7 8P3 8S1 8S2 Commercial (0°C to 70°C) 10.0 500 AT93C56-10PC-2.5 AT93C56-10SC-2.5 AT93C56W-10SC-2.5 8P3 8S1 8S2 Commercial (0°C to 70°C) 80 0.1 250 AT93C56-10PC-1.8 AT93C56-10SC-1.8 AT93C56W-10SC-1.8 8P3 8S1 8S2 Commercial (0°C to 70°C) 10 2000 30.0 2000 AT93C56-10PI AT93C56-10SI AT93C56W-10SI 8P3 8S1 8S2 Industrial (-40°C to 85°C) 10 800 10.0 1000 AT93C56-10PI-2.7 AT93C56-10SI-2.7 AT93C56W-10SI-2.7 8P3 8S1 8S2 Industrial (-40°C to 85°C) 10 600 10.0 500 AT93C56-10PI-2.5 AT93C56-10SI-2.5 AT93C56W-10SI-2.5 8P3 8S1 8S2 Industrial (-40°C to 85°C) 10 80 0.1 250 AT93C56-10PI-1.8 AT93C56-10SI-1.8 AT93C56W-10SI-1.8 8P3 8S1 8S2 Industrial (-40°C to 85°C) Package Type 8P3 8 Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8 Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8 Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) Options Blank Standard Device (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) -2.5 Low Voltage (2.5V to 5.5V) -1.8 Low Voltage (1.8V to 5.5V) 2-75 Ordering Information tWP (max) ICC (max) ISB (max) fMAX (ms) (µA) (µA) (kHz) 10 2000 30.0 2000 AT93C57-10PC AT93C57-10SC AT93C57W-10SC 8P3 8S1 8S2 Commercial (0°C to 70°C) 10 800 10.0 1000 AT93C57-10PC-2.7 AT93C57-10SC-2.7 AT93C57W-10SC-2.7 8P3 8S1 8S2 Commercial (0°C to 70°C) 10 600 10.0 500 AT93C57-10PC-2.5 AT93C57-10SC-2.5 AT93C57W-10SC-2.5 8P3 8S1 8S2 Commercial (0°C to 70°C) 10 80 0.1 250 AT93C57-10PC-1.8 AT93C57-10SC-1.8 AT93C57W-10SC-1.8 8P3 8S1 8S2 Commercial (0°C to 70°C) 10 2000 30.0 2000 AT93C57-10PI AT93C57-10SI AT93C57W-10SI 8P3 8S1 8S2 Industrial (-40°C to 85°C) 10 800 10.0 1000 AT93C57-10PI-2.7 AT93C57-10SI-2.7 AT93C57W-10SI-2.7 8P3 8S1 8S2 Industrial (-40°C to 85°C) 10 600 10.0 500 AT93C57-10PI-2.5 AT93C57-10SI-2.5 AT93C57W-10SI-2.5 8P3 8S1 8S2 Industrial (-40°C to 85°C) 10 80 0.1 250 AT93C57-10PI-1.8 AT93C57-10SI-1.8 AT93C57W-10SI-1.8 8P3 8S1 8S2 Industrial (-40°C to 85°C) Ordering Code Package Type 8P3 8 Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8 Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8 Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) Options Blank Standard Device (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) -2.5 Low Voltage (2.5V to 5.5V) -1.8 Low Voltage (1.8V to 5.5V) 2-76 AT93C46/56/57/66 Package Operation Range AT93C46/56/57/66 Ordering Information tWP (max) ICC (max) ISB (max) fMAX (ms) (µA) (µA) (kHz) 10 2000 30.0 2000 AT93C66-10PC AT93C66-10SC AT93C66W-10SC 8P3 8S1 8S2 Commercial (0°C to 70°C) 10 800 10.0 1000 AT93C66-10PC-2.7 AT93C66-10SC-2.7 AT93C66W-10SC-2.7 8P3 8S1 8S2 Commercial (0°C to 70°C) 10 600 10.0 500 AT93C66-10PC-2.5 AT93C66-10SC-2.5 AT93C66W-10SC-2.5 8P3 8S1 8S2 Commercial (0°C to 70°C) 10 80 0.1 250 AT93C66-10PC-1.8 AT93C66-10SC-1.8 AT93C66W-10SC-1.8 8P3 8S1 8S2 Commercial (0°C to 70°C) 10 2000 30.0 2000 AT93C66-10PI AT93C66-10SI AT93C66W-10SI 8P3 8S1 8S2 Industrial (-40°C to 85°C) 10 800 10.0 1000 AT93C66-10PI-2.7 AT93C66-10SI-2.7 AT93C66W-10SI-2.7 8P3 8S1 8S2 Industrial (-40°C to 85°C) 10 600 10.0 500 AT93C66-10PI-2.5 AT93C66-10SI-2.5 AT93C66W-10SI-2.5 8P3 8S1 8S2 Industrial (-40°C to 85°C) 10 80 0.1 250 AT93C66-10PI-1.8 AT93C66-10SI-1.8 AT93C66W-10SI-1.8 8P3 8S1 8S2 Industrial (-40°C to 85°C) Ordering Code Package Operation Range Package Type 8P3 8 Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8 Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8S2 8 Lead, 0.200" Wide, Plastic Gull Wing Small Outline (EIAJ SOIC) Options Blank Standard Device (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) -2.5 Low Voltage (2.5V to 5.5V) -1.8 Low Voltage (1.8V to 5.5V) 2-77