Features • Medium-voltage and Standard-voltage Operation • • • • • • – 5.0 (VCC = 4.5V to 5.5V) – 2.7 (VCC = 2.7V to 5.5V) User-selectable Internal Organization – 1K: 128 x 8 or 64 x 16 – 2K: 256 x 8 or 128 x 16 – 4K: 512 x 8 or 256 x 16 3-wire Serial Interface 2 MHz Clock Rate (5V) Self-timed Write Cycle (10 ms max) High Reliability – Endurance: 1 Million Write Cycles – Data Retention: 100 Years 8-lead PDIP and 8-lead JEDEC SOIC Packages 3-wire Serial Automotive EEPROMs Description 1K (128 x 8 or 64 x 16) The AT93C46/56/66 provides 1024/2048/4096 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 64/128/256 words of 16 bits each, when the ORG pin is connected to VCC and 128/256/512 words of 8 bits each when it is tied to ground. The device is optimized for use in many automotive applications where low power and low voltage operations are essential. The AT93C46/56/66 is available in space-saving 8-lead PDIP and 8-lead JEDEC SOIC packages. Function CS Chip Select SK Serial Data Clock DI Serial Data Input DO Serial Data Output GND Ground VCC Power Supply ORG Internal Organization DC Don’t Connect 4K (512 x 8 or 256 x 16) AT93C46 AT93C56 AT93C66 Pin Configurations Pin Name 2K (256 x 8 or 128 x 16) 8-lead PDIP CS SK DI DO 1 2 3 4 8 7 6 5 VCC DC ORG GND 8-lead SOIC CS SK DI DO 1 2 3 4 8 7 6 5 VCC DC ORG GND Rev. 3264A–SEEPR–01/02 1 Description (Continued) The AT93C46/56/66 is enabled through the Chip Select pin (CS), and accessed via a 3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock (SK). Upon receiving a READ instruction at DI, the address is decoded and the data is clocked out serially on the data output pin DO. The WRITE cycle is completely selftimed and no separate ERASE cycle is required before WRITE. The WRITE cycle is only enabled when the part is in the ERASE/WRITE ENABLE state. When CS is brought “high” following the initiation of a WRITE cycle, the DO pin outputs the READY/BUSY status of the part. The AT93C46/56/66 is available in 4.5V to 5.5V and 2.7V to 5.5V versions. Absolute Maximum Ratings* Operating Temperature.................................. -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C Voltage on Any Pin with Respect to Ground .....................................-1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability DC Output Current........................................................ 5.0 mA Block Diagram Notes: 2 1. When the ORG pin is connected to VCC, the x 16 organization is selected. When it is connected to ground, the x 8 organization is selected. If the ORG pin is left unconnected and the application does not load the input beyond the capability of the internal 1 Meg ohm pullup, then the x 16 organization is selected. 2. For the AT93C46, if x 16 organization is the mode of choice and Pin 6 (ORG) is left unconnected, Atmel recommends using the AT93C46A device. For more details, see the AT93C46A datasheet. AT93C46/56/66 3264A–SEEPR–01/02 AT93C46/56/66 Pin Capacitance(1) Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted). Symbol Test Conditions COUT CIN Note: Max Units Conditions Output Capacitance (DO) 5 pF VOUT = 0V Input Capacitance (CS, SK, DI) 5 pF VIN = 0V 1. This parameter is characterized and is not 100% tested. DC Characteristics Applicable over recommended operating range from: TA = -40°C to +125°C, VCC = +2.7V to +5.5V (unless otherwise noted). Symbol Parameter VCC1 Supply Voltage VCC2 Supply Voltage ICC Supply Current ISB1 Standby Current ISB2 Test Condition Min Typ Max Unit 2.7 5.5 V 4.5 5.5 V READ at 1.0 MHz 0.5 2.0 mA WRITE at 1.0 MHz 0.5 2.0 mA VCC = 2.7V CS = 0V 6.0 10.0 µA Standby Current VCC = 5.0V CS = 0V 17 30 µA IIL Input Leakage VIN = 0V to VCC 0.1 1.0 µA IOL Output Leakage VIN = 0V to VCC 0.1 1.0 µA VIL1(1) VIH1(1) Input Low Voltage Input High Voltage 2.7V ≤ VCC ≤ 5.5V VCC x 0.3 VCC + 1 V VOL1 VOH1 Output Low Voltage Output High Voltage 4.5V ≤ VCC ≤ 5.5V 0.4 V VOL2 VOH2 Output Low Voltage Output High Voltage 1.8V ≤ VCC ≤ 2.7V Note: VCC = 5.0V -0.6 VCC x 0.7 IOL = 2.1 mA IOH = -0.4 mA 2.4 IOL = 0.15 mA IOH = -100 µA V 0.2 VCC - 0.2 V V 1. VIL min and VIH max are reference only and are not tested. 3 3264A–SEEPR–01/02 AC Characteristics Applicable over recommended operating range from TA = -40°C to + 125°C, VCC = As Specified, CL = 1 TTL Gate and 100 pF (unless otherwise noted). Symbol Parameter Test Condition fSK SK Clock Frequency 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 0 0 tSKH SK High Time 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 250 250 ns tSKL SK Low Time 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 250 250 ns tCS Minimum CS Low Time 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 250 250 ns tCSS CS Setup Time Relative to SK 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 50 50 ns tDIS DI Setup Time Relative to SK 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 100 100 ns tCSH CS Hold Time Relative to SK 0 ns tDIH DI Hold Time Relative to SK 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 100 100 ns tPD1 Output Delay to ‘1’ AC Test 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 250 500 ns tPD0 Output Delay to ‘0’ AC Test 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 250 500 ns tSV CS to Status Valid AC Test 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 250 250 ns tDF CS to DO in High Impedance AC Test CS = VIL 4.5V ≤ VCC ≤ 5.5V 2.7V ≤ VCC ≤ 5.5V 100 100 ns 10 ms tWP Write Cycle Time Endurance Note: 4 (1) Min 2.7V ≤ VCC ≤ 5.5V 5.0V, 25°C, Page Mode Typ 3 1M Max Units 2 1 MHz ms Write Cycles 1. This parameter is characterized and is not 100% tested. AT93C46/56/66 3264A–SEEPR–01/02 AT93C46/56/66 Instruction Set for the AT93C46 Address Data SB Op Code x8 x 16 READ 1 10 A6 - A0 A5 - A0 EWEN 1 00 11XXXXX 11XXXX Write enable must precede all programming modes. ERASE 1 11 A6 - A0 A5 - A0 Erase memory location A n - A0. WRITE 1 01 A6 - A0 A5 - A0 ERAL 1 00 10XXXXX 10XXXX WRAL 1 00 01XXXXX 01XXXX EWDS 1 00 00XXXXX 00XXXX Instruction Note: x8 x 16 Comments Reads data stored in memory, at specified address. D7 - D 0 D15 - D0 Writes memory location An - A0. Erases all memory locations. Valid only at VCC = 4.5V to 5.5V. D7 - D 0 D15 - D0 Writes all memory locations. Valid only at VCC = 4.5V to 5.5V. Disables all programming instructions. The X’s in the address field represent don’t care values and must be clocked. 5 3264A–SEEPR–01/02 Functional Description The AT93C46/56/66 is accessed via a simple and versatile 3-wire serial communication interface. Device operation is controlled by seven instructions issued by the host processor. A valid instruction starts with a rising edge of CS and consists of a Start Bit (logic “1”) followed by the appropriate Op Code and the desired memory Address location. READ (READ): The Read (READ) instruction contains the Address code for the memory location to be read. After the instruction and address are decoded, data from the selected memory location is available at the serial output pin DO. Output data changes are synchronized with the rising edges of serial clock SK. It should be noted that a dummy bit (logic “0”) precedes the 8- or 16-bit data output string. ERASE/WRITE (EWEN): To assure data integrity, the part automatically goes into the Erase/Write Disable (EWDS) state when power is first applied. An Erase/Write Enable (EWEN) instruction must be executed first before any programming instructions can be carried out. Please note that once in the Erase/Write Enable state, programming remains enabled until an Erase/Write Disable (EWDS) instruction is executed or VCC power is removed from the part. ERASE (ERASE): The Erase (ERASE) instruction programs all bits in the specified memory location to the logical “1” state. The self-timed erase cycle starts once the ERASE instruction and address are decoded. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). A logic “1” at pin DO indicates that the selected memory location has been erased, and the part is ready for another instruction. WRITE (WRITE): The Write (WRITE) instruction contains the 8 or 16 bits of data to be written into the specified memory location. The self-timed programming cycle, tWP, starts after the last bit of data is received at serial data input pin DI. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). A logic “0” at DO indicates that programming is still in progress. A logic “1” indicates that the memory location at the specified address has been written with the data pattern contained in the instruction and the part is ready for further instructions. A READY/BUSY status cannot be obtained if the CS is brought high after the end of the self-timed programming cycle, tWP. ERASE ALL (ERAL): The Erase All (ERAL) instruction programs every bit in the memory array to the logic “1” state and is primarily used for testing purposes. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). The ERAL instruction is valid only at VCC = 5.0V ± 10%. WRITE ALL (WRAL): The Write All (WRAL) instruction programs all memory locations with the data patterns specified in the instruction. The DO pin outputs the READY/BUSY status of the part if CS is brought high after being kept low for a minimum of 250 ns (tCS). The WRAL instruction is valid only at VCC = 5.0V ± 10%. ERASE/WRITE DISABLE (EWDS): To protect against accidental data disturb, the Erase/Write Disable (EWDS) instruction disables all programming modes and should be executed after all programming operations. The operation of the READ instruction is independent of both the EWEN and EWDS instructions and can be executed at any time. 6 AT93C46/56/66 3264A–SEEPR–01/02 AT93C46/56/66 Timing Diagrams Synchronous Data Timing Note: 1. This is the minimum SK period. Organization Key for Timing Diagrams AT93C46 (1K) I/O Notes: x8 AT93C56 (2K) x 16 AN A6 A5 DN D7 D15 x8 A8 (1) D7 AT93C66 (4K) x 16 x8 x 16 (2) A8 A7 D7 D15 A7 D15 1. A8 is a DON’T CARE value, but the extra clock is required. 2. A7 is a DON’T CARE value, but the extra clock is required. READ Timing 7 3264A–SEEPR–01/02 EWEN Timing tCS CS SK DI 1 0 0 1 ... 1 EWDS Timing tCS CS SK DI 1 0 0 0 ... 0 WRITE Timing tCS CS SK DI DO 1 0 1 AN ... A0 DN ... D0 HIGH IMPEDANCE BUSY READY tWP WRAL Timing(1) tCS CS SK DI DO 1 0 0 0 1 ... DN ... D0 BUSY HIGH IMPEDANCE READY tWP Note: 8 1. Valid only at VCC = 4.5V to 5.5V. AT93C46/56/66 3264A–SEEPR–01/02 AT93C46/56/66 ERASE Timing tCS CS STANDBY CHECK STATUS SK DI 1 1 1 AN AN-1 AN-2 ... A0 tDF tSV DO HIGH IMPEDANCE HIGH IMPEDANCE BUSY READY tWP ERAL Timing(1) tCS CS CHECK STATUS STANDBY tSV tDF SK DI DO 1 0 0 1 0 BUSY HIGH IMPEDANCE HIGH IMPEDANCE READY tWP Note: 1. Valid only at VCC = 4.5V to 5.5V. 9 3264A–SEEPR–01/02 AT93C46 Ordering Information tWP (max) (ms) ICC (max) (µA) ISB (max) (µA) fMAX (kHz) Ordering Code Package 10 2000 30.0 2000 AT93C46-10PA-5.0C AT93C46-10SA-5.0C 8P3 8S1 Automotive (-40°C to 125°C) 10 800 10.0 1000 AT93C46-10PA-2.7C AT93C46-10SA-2.7C 8P3 8S1 Automotive (-40°C to 125°C) Operation Range Package Type 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) Options -5.0 Standard Operation (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) 10 AT93C46/56/66 3264A–SEEPR–01/02 AT93C46/56/66 AT93C56 Ordering Information tWP (max) (ms) ICC (max) (µA) ISB (max) (µA) fMAX (kHz) Ordering Code Package 10 2000 30.0 2000 AT93C56-10PA-5.0C AT93C56-10SA-5.0C 8P3 8S1 Automotive (-40°C to 125°C) 10 800 10.0 1000 AT93C56-10PA-2.7C AT93C56-10SA-2.7C 8P3 8S1 Automotive (-40°C to 125°C) Operation Range Package Type 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) Options -5.0 Standard Operation (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) 11 3264A–SEEPR–01/02 AT93C66 Ordering Information tWP (max) (ms) ICC (max) (µA) ISB (max) (µA) fMAX (kHz) Ordering Code Package 10 2000 30.0 2000 AT93C66-10PA-5.0C AT93C66-10SA-5.0C 8P3 8S1 Automotive (-40°C to 125°C) 10 800 10.0 1000 AT93C66-10PA-2.7C AT93C66-10SA-2.7C 8P3 8S1 Automotive (-40°C to 125°C) Operation Range Package Type 8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) 8S1 8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) Options -5.0 Standard Operation (4.5V to 5.5V) -2.7 Low Voltage (2.7V to 5.5V) 12 AT93C46/56/66 3264A–SEEPR–01/02 AT93C46/56/66 Packaging Information 8P3 – PDIP D PIN 1 E1 A B1 SEATING PLANE A1 L B B2 e (4 PLACES) E COMMON DIMENSIONS (Unit of Measure = mm) C eC SYMBOL eB Notes: 1. This package conforms to JEDEC reference MS-001 BA. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). R NOM MAX A – – 4.318 A1 0.381 – – D 9.144 – 9.652 E 7.620 – 8.255 E1 6.096 – 6.604 B 0.406 – 0.508 B1 1.397 – 1.651 B2 0.762 – 1.143 L 3.175 – 3.429 C 0.203 – 0.356 eB – – 10.922 eC 0.000 – 1.524 e TITLE 2325 Orchard Parkway 8P3, 8-lead (0.300"/7.62 mm Wide) Plastic Dual San Jose, CA 95131 Inline Package (PDIP) MIN NOTE Note 2 Note 2 2.540 TYP 09/28/01 DRAWING NO. REV. 8P3 B 13 3264A–SEEPR–01/02 8S2 – JEDEC SOIC 3 2 1 H N Top View e B A D COMMON DIMENSIONS (Unit of Measure = mm) Side View A2 C L SYMBOL MIN NOM MAX A – – 1.75 B – – 0.51 C – – 0.25 D – – 5.00 E – – 4.00 e E End View NOTE 1.27 BSC H – – 6.20 L – – 1.27 Note: This drawing is for general information only. Refer to JEDEC Drawing MS-012 for proper dimensions, tolerances, datums, etc. 10/10/01 R 14 2325 Orchard Parkway San Jose, CA 95131 TITLE 8S1, 8-lead (0.150" Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) DRAWING NO. REV. 8S1 A AT93C46/56/66 3264A–SEEPR–01/02 Atmel Headquarters Atmel Operations Corporate Headquarters Memory 2325 Orchard Parkway San Jose, CA 95131 TEL 1(408) 441-0311 FAX 1(408) 487-2600 Europe Atmel SarL Route des Arsenaux 41 Casa Postale 80 CH-1705 Fribourg Switzerland TEL (41) 26-426-5555 FAX (41) 26-426-5500 Asia Atmel Asia, Ltd. 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