LX155x.pdf

LX1552/3/4/5
ULTRA-LOW START-UP CURRENT, CURRENT-MODE PWM
T
H E
I
N F I N I T E
P
O W E R
O F
I
P
N N O V A T I O N
R O D U C T I O N
D
A T A
H E E T
KEY FEATURES
DESCRIPTION
Additionally, the precise oscillator discharge
current gives the power supply designer
considerable flexibility in optimizing system duty
cycle consistency.
The current mode architecture demonstrates
improved load regulation, pulse by pulse current
limiting and inherent protection of the power
supply output switch. The LX155x includes a
bandgap reference trimmed to 1%, an error
amplifier, a current sense comparator internally
clamped to 1V, a high current totem pole output
stage for fast switching of power MOSFETs, and
an externally programmable oscillator to set
operating frequency and maximum duty cycle.
The under voltage lock-out circuitry is designed to
operate with as little as 250µA of supply current
permitting very efficient bootstrap designs.
„ Ultra-Low Start-up Current (150µA
Typical)
„ Trimmed Oscillator Discharge
NO
T R OB
EC SO
OM L
ME ET
ND E P
ED
R
FO OD
R
NE UC
W T
DE
SIG
NS
The LX155x family of ultra-low start-up current
(250µA max), current mode control ICs offer new
levels of energy efficiency for offline converter
applications.
They are ideally optimized for
personal computer and CRT power supplies
although they can be used in any number of off-line
applications where energy efficiency is critical.
Coupled with the fact that the LX155x series
requires a minimal set of external components, the
series offers an excellent value for cost conscious
consumer applications.
Optimizing energy efficiency, the LX155x series
demonstrates a significant power reduction as
compared with other similar off-line controllers.
Table 1 compares the SG384x, UC384xA and the
LX155x start-up resistor power dissipation. The
LX155x offers an overall 4X reduction in power
dissipation.
S
Current (±2% Typical)
„ Initial Oscillator Frequency Better
Than ±4%
„ Output Pulldown During UVLO
„ Precision 2.5V Reference (±2
maximum)
„ Current Sense Delay to Output
(150ns Typical)
„ Automatic Feed Forward
Compensation
„ Pulse-by-Pulse Current Limiting
„ Enhanced Load response
Characteristics
„ Under-Voltage Lockout with
Hysteresis
„ Double Pulse Suppression
„ High Current Totem Pole Output
IMPORTANT: For the most current data, consult MICROSEMI’s website: http://www.microsemi.com
(±1A Peak)
„ 500KHz Operation
PRODUCT HIGHLIGHT
APPLICATIONS
Typical Application of LX155x Using Its MicroPower Start-Up Feature
Design Using
Max. Start-up Current
Specification (IST)
Typical Start-up Resistor
Value (RST)
Max. Start-up Resistor
Power Dissipation (PR)
R ST
I ST
AC
INPUT
VCC
UC384xA
LX155x
1000µA
500µA
250µA
62KΩ
124KΩ
248KΩ
2.26W
1.13W
0.56W
Note: Calculation is done for universal AC input
specification of VACMIN = 90VRMS to VACMAX = 256VRMS using
the following equation: (resistor current is selected to be 2
* IST @ VACMIN)
LX1552
or
SG384x
LX1554
R ST =
VACMIN
2 • IST
, PR =
2VAC2MAX
„ Economy Off-Line Flyback or
Forward Converters
„ DC-DC Buck or Boost Converters
„ Low Cost DC Motor Control
Available Options Per part#
Part #
LX1552
LX1553
LX1554
LX1555
Start-Up
Max. Duty
Hysteresis
Voltage
Cycle
16V
6V
<100%
8.4V
0.8V
<100%
16V
6V
<50%
8.4V
0.8V
<50%
R ST
PACKAGE ORDER INFO
TA (°C)
M
Plastic DIP
8-Pin
RoHS Compliant / Pb-free
Transition DC: 0503
0 to 70
-40 to 85
-55 to 125
LX155xCM
LX155xIM
-
DM
Plastic SOIC
8-Pin
D
Plastic SOIC
14-Pin
RoHS Compliant / Pb-free
Transition DC: 0440
RoHS Compliant / Pb-free
Transition DC: 0440
LX155xCDM
LX155xIDM
-
LX155xCD
LX155xID
-
Ceramic DIP
8-Pin
Y
PW
Plastic TSSOP
20-Pin
RoHS Compliant / Pb-free
Transition DC: 0442
LX155xMY
LX155xCPW
-
Note: Available in Tape & Reel. Append the letters “TR” to the part number (i.e. LX1552CDM-TR).
Copyright © 1994
Rev. 1.0b,2005-03-01
LINFINITY MICROELECTRONICS INC.
11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841, 714-898-8121, FAX: 714-893-2570
1
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
A B S O L U T E M A X I M U M R AT I N G S
D
A T A
S
H E E T
PACKAGE PIN OUTS
(Note 1)
NO
T R OB
EC SO
OM L
ME ET
ND E P
ED
R
FO OD
R
NE UC
W T
DE
SIG
NS
Supply Voltage (Low Impedance Source) .................................................................. 30V
Supply Voltage (ICC < 30mA) ......................................................................... Self Limiting
Output Current ............................................................................................................. ±1A
Output Energy (Capacitive Load) ................................................................................ 5µJ
Analog Inputs (Pins 2, 3) ........................................................................... -0.3V to +6.3V
Error Amp Output Sink Current ............................................................................... 10mA
Power Dissipation at TA = 25°C (DIL-8) ...................................................................... 1W
Operating Junction Temperature
Ceramic (Y Package) ............................................................................................ 150°C
Plastic (M, DM, D, PW Packages) ........................................................................ 150°C
Storage Temperature Range .................................................................... -65°C to +150°C
Lead Temperature (Soldering, 10 Seconds) ............................................................ 300°C
COMP
VFB
ISENSE
RT/CT
T H E R M A L D ATA
M PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θ JA
DM PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θ JA
D PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θ JA
Y PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θ JA
PW PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θ JA
95°C/W
165°C/W
120°C/W
130°C/W
144°C/W
Junction Temperature Calculation: TJ = TA + (PD x θJA).
The θ JA numbers are guidelines for the thermal performance of the device/pc-board system.
All of the above assume no ambient airflow
8
2
7
3
6
4
5
VREF
VCC
OUTPUT
GND
M & Y PACKAGE
(Top View)
M Package RoHS / Pb-free 100% Matte Tin Lead Finish
COMP
VFB
ISENSE
RT/CT
Pb-free / RoHS Peak Package Solder Reflow Temp. (40 second max. exposure)................ 260°C (+0, -5)
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect
to Ground. Currents are positive into, negative out of the specified terminal. Pin
numbers refer to DIL packages only.
1
1
8
2
7
3
6
4
5
VREF
VCC
OUTPUT
GND
DM PACKAGE
(Top View)
RoHS / Pb-free 100% Matte Tin Lead Finish
COMP
N.C.
VFB
N.C.
ISENSE
N.C.
RT/CT
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VREF
N.C.
VCC
VC
OUTPUT
GND
PWR GND
D PACKAGE
(Top View)
RoHS / Pb-free 100% Matte Tin Lead Finish
N.C.
N.C.
COMP
VFB
N.C.
ISENSE
N.C.
RT/CT
N.C.
N.C.
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
N.C.
N.C.
VREF
N.C.
VCC
VC
OUTPUT
GND
PWR GND
N.C.
PW PACKAGE
(Top View)
RoHS / Pb-free 100% Matte Tin Lead Finish
2
Copyright © 1994
Rev. 1.0b
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
ELECTRICAL
D
A T A
S
H E E T
CHARACTERISTICS
Parameter
Reference Section
NO
T R OB
EC SO
OM L
ME ET
ND E P
ED
R
FO OD
R
NE UC
W T
DE
SIG
NS
(Unless otherwise specified, these specifications apply over the operating ambient temperatures for LX155xC with 0°C ≤ T A ≤ 70°C, LX155xI with -40°C ≤ TA ≤ 85°C, LX155xM
with -55°C ≤ T A ≤ 125°C; VCC=15V (Note 5); RT=10K; CT=3.3nF. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the
ambient temperature.)
Output Voltage
Line Regulation
Load Regulation
Temperature Stability (Note 2 & 7)
Total Output Variation
Output Noise Voltage (Note 2)
Long Term Stability (Note 2)
Output Short Circuit
Oscillator Section
Initial Accuracy (Note 6)
Voltage Stability
Temperature Stability (Note 2)
Amplitude (Note 2)
Discharge Current
Error Amp Section
Input Voltage
Input Bias Current
Open Loop Gain
Unity Gain Bandwidth (Note 2)
Power Supply Rejection Ratio (Note 3)
Output Sink Current
Output Source Current
Output Voltage High Level
Output Voltage Low Level
Current Sense Section
Gain (Note 3 & 4)
Maximum Input Signal (Note 3)
Power Supply Rejection Ratio (Note 3)
Input Bias Current
Delay to Output (Note 2)
Output Section
Output Voltage Low Level
Output Voltage High Level
Rise Time (Note 2)
Fall Time (Note 2)
UVLO Saturation
Symbol
V REF
VN
Test Conditions
TA = 25°C, IL = 1mA
12 ≤ VIN ≤ 25V
1 ≤ IO ≤ 20mA
4.95 5.00 5.05 4.95 5.00 5.05
6
20
6
20
6
25
6
25
0.2 0.4
0.2 0.4
4.9
5.1 4.9
5.1
50
50
5
25
5
25
-30 -100 -180 -30 -100 -180
V
mV
mV
mV/°C
V
µV
mV
mA
TA = 25°C
TA = 25°C, R T = 698Ω, CT = 22nF, LX1552/3 only
12 ≤ VCC ≤ 25V
TMIN ≤ TA ≤ TMAX
VPIN 4 peak to peak
TA = 25°C, VPIN 4 = 2V
VPIN 4 = 2V, TMIN ≤ TA ≤ TMAX
48.5 50.5 52.5 48.5 50.5 52.5
56
58
60
56
58
60
0.2
1
0.2
1
5
5
1.7
1.7
8.0 8.3 8.6 8.0 8.3 8.6
7.6
8.8 7.8
8.8
kHz
kHz
%
%
V
mA
mA
VPIN 1 = 2.5V
2.45 2.50 2.55 2.45 2.50 2.55
-0.1
-1
-0.1 -0.5
65
90
65
90
0.6
0.6
60
70
60
70
2
4
2
4
-0.5 -0.8
-0.5 -0.8
5
6.5
5
6.5
0.7 1.1
0.7 1.1
V
µA
dB
MHz
dB
mA
mA
V
V
Over Line, Load, and Temperature
10Hz ≤ f ≤ 10kHz, TA = 25°C
TA = 125°C, t = 1000hrs
ISC
ID
IB
AVOL
UGBW
PSRR
IOL
IOH
V OH
V OL
2 ≤ VO ≤ 4V
TA = 25°C
12 ≤ VCC ≤ 25V
VPIN 2 = 2.7V, VPIN 1 = 1.1V
VPIN 2 = 2.3V, VPIN 1 = 5V
VPIN 2 = 2.3V, RL = 15K to ground
VPIN 2 = 2.7V, RL = 15K to VREF
AVOL
PSRR
IB
TPD
V OL
V OH
TR
TF
VSAT
LX155xI/155xM
LX155xC
Units
Min. Typ. Max. Min. Typ. Max.
3.15 2.85
1.1 0.9
VPIN 3 = 0 to 2V
3
1
70
-2
150
ISINK = 20mA
ISINK = 200mA
ISOURCE = 20mA
ISOURCE = 200mA
TA = 25°C, CL = 1nF
TA = 25°C, CL = 1nF
VCC = 5V, ISINK = 10mA
0.1
1.5
13.5
13.5
50
50
0.7
0.4
2.2
VPIN 1 = 5V
12 ≤ VCC ≤ 25V
2.85
0.9
13
12
-10
300
100
100
1.2
13
12
3
1
70
-2
150
3.15
1.1
0.1
1.5
13.5
13.5
50
50
0.7
0.4
2.2
-5
300
100
100
1.2
V/V
V
dB
µA
ns
V
V
V
V
ns
ns
V
( E l e c tr i c a l Cha r a ct er i st i cs cont i nu e next pa g e.)
Copyright © 1994
Rev. 1.0b
3
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
D
R O D U C T I O N
A T A
S
H E E T
ELECTRICAL CHARACTERISTICS
Parameter
LX155xI/155xM
LX155xC
Units
Min. Typ. Max. Min. Typ. Max.
Test Conditions
NO
T R OB
EC SO
OM L
ME ET
ND E P
ED
R
FO OD
R
NE UC
W T
DE
SIG
NS
Symbol
(Con't.)
Under-Voltage Lockout Section
Start Threshold
VST
Min. Operation Voltage After Turn-On
PWM Section
Maximum Duty Cycle
1552/1554
1553/1555
1552/1554
1553/1555
15
7.8
9
7.0
16
8.4
10
7.6
1552/1553
1552/1553, RT = 698Ω, CT = 22nF
1554/1555
94
96
50
48
47
17
9.0
11
8.2
15
7.8
9
7.0
16
8.4
10
7.6
94
96
50
48
47
0
Minimum Duty Cycle
17
9.0
11
8.2
V
V
V
V
0
%
%
%
%
Power Consumption Section
Start-Up Current
Operating Supply Current
VCC Zener Voltage
IST
I CC
VZ
ICC = 25mA
30
Notes: 2. These parameters, although guaranteed, are not 100% tested in
production.
3. Parameter measured at trip point of latch with VFB = 0.
∆V
4. Gain defined as: A = ∆ V COMP ; 0 ≤ VISENSE ≤ 0.8V.
ISENSE
5. Adjust VCC above the start threshold before setting at 15V.
6. Output frequency equals oscillator frequency for the LX1552 and
LX1553. Output frequency is one half oscillator frequency for the
LX1554 and LX1555.
150
11
35
250
17
30
150
11
35
250
17
µA
mA
V
7. Temperature stability, sometimes referred to as average temperature
coefficient, is described by the equation:
Temp Stability =
V REF (max.) - VREF (min.)
TA (max.) - TA (min.)
V REF (max.) & V REF (min.) are the maximum & minimum reference
voltage measured over the appropriate temperature range. Note that the
extremes in voltage do not necessarily occur at the extremes in
temperature.
BLOCK DIAGRAM
VCC*
34V
UVLO
S/R
GROUND**
16V (1552/1554)
8.4V (1553/1555)
5V
REF
16V (1552/1554)
8.4V (1553/1555)
INTERNAL
BIAS
VREF
GOOD LOGIC
RT/CT
ERROR AMP
COMP
ISENSE
VC*
OSCILLATOR
T
***
VFB
VREF
OUTPUT
S
2R
R
R
1V
PWM
LATCH
POWER GROUND**
CURRENT SENSE
COMPARATOR
* - VCC and VC are internally connected for 8 pin packages.
** - POWER GROUND and GROUND are internally connected for 8 pin packages.
*** - Toggle flip flop used only in 1554 and 1555.
4
Copyright © 1994
Rev. 1.0b
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
D
A T A
S
GRAPH / CURVE INDEX
FIGURE INDEX
Theory of Operation Section
NO
T R OB
EC SO
OM L
ME ET
ND E P
ED
R
FO OD
R
NE UC
W T
DE
SIG
NS
Characteristic Curves
FIGURE #
H E E T
FIGURE #
1.
OSCILLATOR FREQUENCY vs. TIMING RESISTOR
23. TYPICAL APPLICATION OF START-UP CIRCUITRY
2.
MAXIMUM DUTY CYCLE vs. TIMING RESISTOR
24. REFERENCE VOLTAGE vs. TEMPERATURE
3.
OSCILLATOR DISCHARGE CURRENT vs. TEMPERATURE
25. SIMPLIFIED SCHEMATIC OF OSCILLATOR SECTION
4.
OSCILLATOR FREQUENCY vs. TEMPERATURE
26. DUTY CYCLE VARIATION vs. DISCHARGE CURRENT
5.
OUTPUT INITIAL ACCURACY vs. TEMPERATURE
27. OSCILLATOR FREQUENCY vs. TIMING RESISTOR
6.
OUTPUT DUTY CYCLE vs. TEMPERATURE
28. MAXIMUM DUTY CYCLE vs. TIMING RESISTOR
7.
REFERENCE VOLTAGE vs. TEMPERATURE
29. CURRENT SENSE THRESHOLD vs. ERROR AMPLIFIER OUTPUT
8.
REFERENCE SHORT CIRCUIT CURRENT vs. TEMPERATURE
9.
E.A. INPUT VOLTAGE vs. TEMPERATURE
Typical Applications Section
10. START-UP CURRENT vs. TEMPERATURE
FIGURE #
11. START-UP CURRENT vs. SUPPLY VOLTAGE
30. CURRENT SENSE SPIKE SUPPRESSION
12. START-UP CURRENT vs. SUPPLY VOLTAGE
31. MOSFET PARASITIC OSCILLATIONS
13. DYNAMIC SUPPLY CURRENT vs. OSCILLATOR FREQUENCY
14. CURRENT SENSE DELAY TO OUTPUT vs. TEMPERATURE
32. ADJUSTABLE BUFFERED REDUCTION OF CLAMP LEVEL
WITH SOFT-START
15. CURRENT SENSE THRESHOLD vs. ERROR AMPLIFIER OUTPUT
33. EXTERNAL DUTY CYCLE CLAMP AND MULTI-UNIT SYCHRONIZATION
16. START-UP THRESHOLD vs. TEMPERATURE
34. SLOPE COMPENSATION
17. START-UP THRESHOLD vs. TEMPERATURE
35. OPEN LOOP LABORATORY FIXTURE
18. MINIMUM OPERATING VOLTAGE vs. TEMPERATURE
36. OFF-LINE FLYBACK REGULATOR
19. MINIMUM OPERATING VOLTAGE vs. TEMPERATURE
20. LOW LEVEL OUTPUT SATURATION VOLTAGE DURING UNDERVOLTAGE LOCKOUT
21. OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT and
TEMPERATURE
22. OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT and
TEMPERATURE
Copyright © 1994
Rev. 1.0b
5
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
D
A T A
FIGURE 1. — OSCILLATOR FREQUENCY vs. TIMING RESISTOR
C U RV E S
FIGURE 2. — MAXIMUM DUTY CYCLE vs. TIMING RESISTOR
100
1000
CT = 1nF
90
CT = 3.3nF
80
100
CT = 6.8nF
10
CT = 22nF
Maximum Duty Cycle - (%)
Oscillator Frequency - (kHz)
H E E T
NO
T R OB
EC SO
OM L
ME ET
ND E P
ED
R
FO OD
R
NE UC
W T
DE
SIG
NS
CHARACTERISTIC
S
CT = 47nF
1
CT = 0.1µF
0.1
0.1
VCC = 15V
TA = 25°C
70
60
50
40
30
20
10
1
0
0.1
100
1
FIGURE 3. — OSCILLATOR DISCHARGE CURRENT vs.
TEMPERATURE
FIGURE 4. — OSCILLATOR FREQUENCY vs. TEMPERATURE
VCC = 15V
VPIN4 = 2V
8.40
8.30
8.20
8.10
8.00
7.90
7.80
VCC = 15V
RT = 10k
CT = 3.3nF
54
Oscillator Frequency - (KHz)
(Id) Oscillator Discharge Current - (mA)
100
55
8.50
53
52
51
50
49
48
47
46
-50
-25
0
25
50
75
100
(TA) Ambient Temperature - (°C)
6
10
(RT) Timing Resistor - (k )
(RT) Timing Resistor - (k )
7.70
-75
VCC = 15V
TA = 25°C
10
125
45
-75
-50
-25
0
25
50
75
100
125
(TA) Ambient Temperature - (°C)
Copyright © 1994
Rev. 1.0b
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
D
A T A
FIGURE 5. — OUTPUT INITIAL ACCURACY vs. TEMPERATURE
65.0
48
LX1552 and LX1553 only
62.0
60.5
59.0
57.5
56.0
54.5
53.0
VCC = 15V
RT = 698W
CT = 22nF
46
45
44
43
42
-50
-25
0
25
50
75
100
40
-75
125
(TA) Ambient Temperature - (°C)
VCC = 15V
IL = 1mA
(VREF) Reference Voltage - (V)
5.02
5.01
5.00
4.99
4.98
4.97
4.96
-50
-25
0
25
50
75
100
(TA) Ambient Temperature - (°C)
Copyright © 1994
Rev. 1.0b
-25
0
25
50
75
100
125
FIGURE 8. — REFERENCE SHORT CIRCUIT CURRENT vs.
TEMPERATURE
(ISC) Reference Short Circuit Current - (mA)
5.03
-50
(TA) Ambient Temperature - (°C)
FIGURE 7. — REFERENCE VOLTAGE vs. TEMPERATURE
4.95
-75
VCC = 15V
RT = 698W
CT = 22nF
47
41
51.5
50.0
-75
C U RV E S
FIGURE 6. — OUTPUT DUTY CYCLE vs. TEMPERATURE
Output Duty Cycle - (%)
Output Initial Accuracy - (kHz)
63.5
H E E T
NO
T R OB
EC SO
OM L
ME ET
ND E P
ED
R
FO OD
R
NE UC
W T
DE
SIG
NS
CHARACTERISTIC
S
125
180
165
150
135
120
105
90
75
60
45
30
-75
-50
-25
0
25
50
75
100
125
(TA) Ambient Temperature - (°C)
7
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
D
A T A
FIGURE 9. — E.A. INPUT VOLTAGE vs. TEMPERATURE
2.55
C U RV E S
FIGURE 10. — START-UP CURRENT vs. TEMPERATURE
250
VCC = 15V
2.54
225
(IST) Start-Up Current - (µA)
2.53
E.A. Input Voltage - (V)
H E E T
NO
T R OB
EC SO
OM L
ME ET
ND E P
ED
R
FO OD
R
NE UC
W T
DE
SIG
NS
CHARACTERISTIC
S
2.52
2.51
2.50
2.49
2.48
2.47
2.46
200
LX1552/LX1554
175
150
125
100
LX1553/LX1555
75
50
25
2.45
-75
-50
-25
0
25
50
75
100
0
-75
125
-50
(TA) Ambient Temperature - (°C)
50
75
100
125
FIGURE 12. — START-UP CURRENT vs. SUPPLY VOLTAGE
LX1553/LX1555
TA = 25°C
200
175
150
125
100
75
50
25
LX1552/LX1554
TA = 25°C
225
(IST) Start-Up Current - (µA)
(IST) Start-Up Current - (µA)
25
250
225
200
175
150
125
100
75
50
25
0
0
0
2
4
6
8
10
12
14
16
(VCC) Supply Voltage - (V)
8
0
(TA) Ambient Temperature - (°C)
FIGURE 11. — START-UP CURRENT vs. SUPPLY VOLTAGE
250
-25
18
20
0
1
2
3
4
5
6
7
8
9
10
(VCC) Supply Voltage - (V)
Copyright © 1994
Rev. 1.0b
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
D
A T A
FIGURE 13. — DYNAMIC SUPPLY CURRENT vs.
OSCILLATOR FREQUENCY
C U RV E S
FIGURE 14. — CURRENT SENSE DELAY TO OUTPUT vs.
TEMPERATURE
300
TA = 25°C
RT = 10k
CL = 1000pF
27
24
21
18
15
12
9
6
270
(Tpd) C.S. Delay to Output - (ns)
(ICC) Dynamic Supply Current - (mA)
30
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CHARACTERISTIC
S
VIN = 16V
VIN = 12V
VIN = 10V
240
210
180
150
120
90
60
30
3
0
10
0
-75
1000
100
FIGURE 15. — CURRENT SENSE THRESHOLD vs.
ERROR AMPLIFIER OUTPUT
-25
0
25
50
75
100
125
FIGURE 16. — START-UP THRESHOLD vs. TEMPERATURE
8.8
1.1
LX1553
LX1555
8.7
1.0
TA = 125°C
0.9
0.8
8.6
Start-Up Trheshold - (V)
Current Sense Threshold - (V)
-50
(TA) Ambient Temperature - (°C)
Oscillator Frequency - (kHz)
TA = 25°C
0.7
0.6
TA = -55°C
0.5
0.4
0.3
8.5
8.4
8.3
8.2
8.1
8.0
0.2
7.9
0.1
0
0
0.5
1.0
1.5
2.0
2.5
3.0 3.5
4.0
4.5
Error Amplifier Output Voltage - (V)
Copyright © 1994
Rev. 1.0b
VCC = 15V
VPIN3 = 0V to 2V
CL = 1nF
5.0
7.8
-75
-50
-25
0
25
50
75
100
125
(TA) Ambient Temperature - (°C)
9
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
D
A T A
FIGURE 17. — START-UP THRESHOLD vs. TEMPERATURE
17.0
FIGURE 18. — MINIMUM OPERATING VOLTAGE vs.
TEMPERATURE
16.4
16.2
16.0
15.8
15.6
15.4
10.6
10.4
10.2
10.0
9.8
9.6
9.4
9.2
15.2
-50
-25
0
25
50
75
100
9.0
-75
125
FIGURE 19. — MINIMUM OPERATING VOLTAGE vs.
TEMPERATURE
8.0
0
25
50
75
100
125
FIGURE 20. — LOW LEVEL OUTPUT SATURATION VOLTAGE
DURING UNDER-VOLTAGE LOCKOUT
LX1553
LX1555
7.8
7.7
7.6
7.5
7.4
7.3
7.2
7.1
-50
-25
0
25
50
75
100
(TA) Ambient Temperature - (°C)
(VSAT) Output Saturation Voltage - (V)
Minimum Operating Voltage - (V)
-25
1.20
7.9
10
-50
(TA) Ambient Temperature - (°C)
(TA) Ambient Temperature - (°C)
7.0
-75
LX1552
LX1554
10.8
Minimum Operating Voltage - (V)
16.6
Start-Up Trheshold - (V)
C U RV E S
11.0
LX1552
LX1554
16.8
15.0
-75
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CHARACTERISTIC
S
125
1.08
0.96
0.84
VCC = 5V
TA = -55°C
TA = 25°C
0.72
0.60
TA = 125°C
0.48
0.36
0.24
0.12
0.00
0.1
1
10
Output Sink Current - (mA)
Copyright © 1994
Rev. 1.0b
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
D
A T A
FIGURE 21. — OUTPUT SATURATION VOLTAGE vs.
OUTPUT CURRENT and TEMPERATURE
FIGURE 22. — OUTPUT SATURATION VOLTAGE vs.
OUTPUT CURRENT and TEMPERATURE
VCC = 5V
Sink Transistor
5.0
4.0
3.0
TA = -55°C
2.0
TA = 25°C
TA = 125°C
1.0
0.00
(VSAT) Output Saturation Voltage - (V)
(VSAT) Output Saturation Voltage - (V)
C U RV E S
6.00
6.0
VCC = 15V
Source Transistor
5.40
4.80
4.20
3.60
3.00
2.40
TA = 25°C
1.80
TA = -55°C
1.20
TA = 125°C
0.60
0.00
10
100
Output Sink Current - (mA)
Copyright © 1994
Rev. 1.0b
H E E T
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CHARACTERISTIC
S
1000
10
100
1000
Output Source Current - (mA)
11
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
D
A T A
S
H E E T
IC DESCRIPTION
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THEORY OF OPERATION
The LX1552/3/4/5 series of current mode PWM controller IC's are
designed to offer substantial improvements in the areas of startup current and oscillator accuracy when compared to the first
generation products, the UC184x series. While they can be used
in most DC-DC applications, they are optimized for single-ended
designs such as Flyback and Forward converters. The LX1552/
54 series are best suited for off-line applications, whereas the
1553/55 series are mostly used in power supplies with low input
voltages. The IC can be divided into six main sections as shown
in the Block Diagram (page 4): undervoltage lockout and startup circuit; voltage reference; oscillator; current sense comparator
and PWM latch; error amplifier; and the output stage. The
operation of each section is described in the following sections.
The differences between the members of this family are summarized in Table 1.
TABLE 1
UVLO
Start-up Voltage Hysterises Voltage
(VHYS)
(VST)
PART #
LX1552
LX1553
LX1554
LX1555
16V
8.4V
16V
8.4V
6V
0.8V
6V
0.8V
MAXIMUM
DUTY CYCLE
<100%
<100%
<50%
<50%
The start-up capacitor (C1) is charged by current through resistor
(R1) minus the start-up current. Resistor (R1) is designed such
that it provides more than 250µA of current (typically 2x IST(max) ).
Once this voltage reaches the start-up threshold, the IC turns on,
starting the switching cycle. This causes an increase in IC
operating current, resulting in discharging the start-up capacitor.
During this time, the auxiliary winding flyback voltage gets
rectified & filtered via (D1) and (C1) and provides sufficient
voltage to continue to operate the IC and support its required
supply current. The start-up capacitor must be large enough such
that during the discharge period, the bootsrap voltage exceeds
the shutdown threshold of the IC.
Table 2 below shows a comparison of start-up resistor power
dissipation vs. maximum start-up current for different devices.
TABLE 2
Design Using
SG384x
UC384xA
LX155x
Max. Start-up Current
Specification (IST )
1000µA
500µA
250µA
Typical Start-Up
Resistor Value (RST )
62KΩ
Ω
124KΩ
Ω
248KΩ
Ω
Max. Start-Up Resistor
Power Dissipation (PR)
2.26W
1.13W
0.56W
UNDERVOLTAGE LOCKOUT
The LX155x undervoltage lock-out is designed to maintain an
ultra low quiescent current of less than 250µA, while guaranteeing the IC is fully functional before the output stage is activated.
Comparing this to the SG384x series, a 4x reduction in start-up
current is achieved resulting in 75% less power dissipation in the
start-up resistor. This is especially important in off-line power
supplies which are designed to operate for universal input
voltages of 90 to 265V AC.
Figure 23 shows an efficient supply voltage using the ultra low
start-up current of the LX1554 in conjunction with a bootstrap
winding off of the power transformer. Circuit operation is as
follows.
DC BUS
I1 > 250µA
(Resistor R1 is designed such that it provides 2X maximum
start-up current under low line conditions. Maximum power
dissipation is calculated under maximum line conditions. Example assumes 90 to 265VAC universal input application.)
D1
1ST < 250µA
VIN
REF
C1
RT
LX1554
VO
RT/CT
CT
GND
RS
GND
FIGURE 23 — TYPICAL APPLICATION OF START-UP CIRCUITRY
12
Copyright © 1994
Rev. 1.0b
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
D
S
A T A
H E E T
VOLTAGE REFERENCE
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T H E O R Y O F O P E R AT I O N
REF
The voltage reference is a low drift bandgap design which
provides +5.0V to supply charging current to the oscillator timing
capacitor, as well as supporting internal circuitries. Initial
accuracy for all devices are specified at ±1% max., which is a 2x
improvement for the commercial product when compared to the
SG384x series. The reference is capable of providing in excess
of 20mA for powering any external control circuitries and has
built-in short circuit protection.
VP
VV
RT
2.8V
S2
1.1V
RT/CT
S1
5.03
5.01
5.00
2
CT
VCC = 15V
IL = 1mA
5.02
ID = 8.3mA
TO OUTPUT
STAGE
A1
1
OPEN
FIGURE 25 — SIMPLIFIED SCHEMATIC OF OSCILLATOR SECTION
4.99
4.98
4.97
4.96
4.95
-75
-50
-25
0
25
50
75
100
125
(TA) Ambient Temperature - (°C)
FIGURE 24 — REFERENCE VOLTAGE vs. TEMPERATURE
OSCILLATOR
The oscillator circuit is designed such that discharge current and
valley voltage are trimmed independently. This results in more
accurate initial oscillator frequency and maximum output duty
cycle, especially important in LX1552/53 applications. The
oscillator is programmed by the values selected for the timing
components (RT) and (CT). A simplified schematic of the oscillator
is shown in Figure 25. The operation is as follows; Capacitor (CT)
is charged from the 5V reference thru resistor (RT) to a peak
voltage of 2.7V nominally. Once the voltage reaches this
threshold, comparator (A1) changes state, causing (S1) to switch
to position (2) and (S2) to (VV) position. This will allow the
capacitor to discharge with a current equal to the difference
between a constant discharge current (ID) and current through
charging resistor (IR), until the voltage drops down to 1V
nominally and the comparator changes state again, repeating the
cycle. Oscillator charge time results in the output to be in a high
state (on time) and discharge time sets it to a low state (off time).
Since the oscillator period is the sum of the charge and discharge
time, any variations in either of them will ultimately affect stability
of the output frequency and the maximum duty cycle. In fact, this
Copyright © 1994
Rev. 1.0b
variation is more pronounced when maximum duty cycle has to
be limited to 50% or less. This is due to the fact that for longer
output off time, capacitor discharge current (ID - IR) must be
decreased by increasing IR. Consequently, this increases the
sensitivity of the frequency and duty cycle to any small variations
of the internal current source (ID), making this parameter more
critical under those conditions. Because this is a desired feature
in many applications, this parameter is trimmed to a nominal
current value of 8.3±0.3mA at room temperature, and guaranteed
to a maximum range of 7.8 to 8.8mA over the specified ambient
temperature range. Figure 26 shows variation of oscillator duty
cycle versus discharge current for LX155x and SG384x series
devices.
100
90
Oscillator Duty Cycle - (%)
(VREF) Reference Voltage - (V)
5V
IR
80
TA = 25°C
VP = 2.7V
V = 1V
VREF = 5V
Id = 9.3mA
Id = 8.6mA
70
60
SG384x Upper Limit
50
Id = 8.0mA
40
LX155x Limits
30
Id = 7.5mA
SG384x Lower Limit
20
600
700
800
900
1000
(RT) Timing Resistor - ( )
FIGURE 26 — DUTY CYCLE VARIATION vs. DISCHARGE CURRENT
13
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
D
A T A
S
H E E T
OSCILLATOR
(continued)
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THEORY OF OPERATION
The oscillator is designed such that many values of RT and CT will
give the same frequency, but only one combination will yield a
specific duty cycle at a given frequency. A set of charts as well
as the timing equations are given to determine approximate
values of timing components for a given frequency and duty
cycle.
1000
Given: frequency ≅ f; maximum duty-cycle ≅ Dm
Calculate:
1)
RT = 277
1
Dm
(1.74)
(1.74)
-1
1-Dm
Dm
(Ω), 0.3 ≤ Dm ≤ 0.95
-1
Oscillator Frequency - (kHz)
CT = 1nF
Note: RT must always be greater than 520Ω for proper
operation of oscillator circuit.
CT = 3.3nF
100
CT = 6.8nF
2)
10
for duty cycles above 95% use:
CT = 22nF
CT = 47nF
1
3)
f ≈ 1.81
R TC T
where RT ≥ 5kΩ
CT = 0.1µF
0.1
0.1
VCC = 15V
TA = 25°C
1
10
100
FIGURE 27 — OSCILLATOR FREQUENCY vs. TIMING RESISTOR
100
Given: f = 100kHz
Dm = 0.45
RT = 267
90
(1.74)
(1.74)
80
70
CT =
60
50
1
.45
.55
.45
-1
= 669Ω
-1
1.81 * 0.45
= .012 µf
100x10 3 * 669
b) LX1554/55
40
fOUT = ½ fOSC (due to internal flip flop)
fOSC = 200kHz
30
20
select CT = 1000pf
using Figure 27 or Equation 3: RT = 9.1k
VCC = 15V
TA = 25°C
10
0
0.1
Example: A flyback power supply design requires the duty cycle
to be limited to less than 45%. If the output switching frequency
is selected to be 100kHz, what are the values of RT and C T for the
a) LX1552/53, and the b) LX1554/55 ?
a) LX1552/53
(RT) Timing Resistor - (k )
Maximum Duty Cycle - (%)
CT = 1.81 * Dm (µf)
f * RT
1
10
100
(RT) Timing Resistor - (k )
FIGURE 28 — MAXIMUM DUTY CYCLE vs. TIMING RESISTOR
14
Copyright © 1994
Rev. 1.0b
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
D
A T A
S
H E E T
T H E O R Y O F O P E R AT I O N
ERROR AMPLIFIER
Switch current is sensed by an external sense resistor (or a current
transformer), monitored by the C.S. pin and compared internally
with voltage from error amplifier output. The comparator output
resets the PWM latch ensuring that a single pulse appears at the
output for any given oscillator cycle. The LX1554/55 series has
an additional flip flop stage that limits the output to less than 50%
duty cycle range as well as dividing its output frequency to half
of the oscillator frequency. The current sense comparator
threshold is internally clamped to 1V nominally which would
limit peak switch current to:
VZ
(1) ISP =
where:
ISP ≡ Peak switch current
RS
VZ ≡ internal zener
0.9V ≤ VZ ≤ 1.1V
The error amplifier has a PNP input differential stage with access
to the Inverting input and the output pin. The N.I. input is
internally biased to 2.5 volts and is not available for any external
connections. The maximum input bias current for the LX155XC
series is 0.5µA, while LX155XI/155XM devices are rated for 1µA
maximum over their specified range of ambient temperature.
Low value resistor dividers should be used in order to avoid
output voltage errors caused by the input bias current. The error
amplifier can source 0.5mA and sink 2mA of current. A minimum
feedback resistor (RF) value of is given by:
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CURRENT SENSE COMPARATOR AND PWM LATCH
Equation 1 is used to calculate the value of sense resistor during
the current limit condition where switch current reaches its
maximum level. In normal operation of the converter, the
relationship between peak switch current and error voltage
(voltage at pin 1) is given by:
VE - 2VF
(1) ISP =
VE ≡ Voltage at pin 1
VF ≡ Diode - Forward voltage
0.7V at TA = 25°C
where:
3 * RS
The above equation is plotted in Figure 29. Notice that the gain
becomes non-linear above current sense voltages greater than ≈
0.95 volts. It is therefore recommended to operate below this
range during normal operation. This would insure that the overall
closed loop gain of the system will not be affected by the change
in the gain of the current sense stage.
1.1
Current Sense Threshold - (V)
1.0
RFMIN =
3(1.1) + 1.8
≈ 10K
0.5mA
OUTPUT STAGE
The output section has been specifically designed for direct drive
of power MOSFETs. It has a totempole configuration which is
capable of high peak current for fast charging and discharging of
external MOSFET gate capacitance. This typically results in a rise
and fall time of 50ns for a 1000pf capacitive load. Each output
transistor (source and sink) is capable of supplying 200mA of
continuous current with typical saturation voltages versus temperature as shown in Figures 21 & 22 of the characteristic curve
section. All devices are designed to minimize the amount of
shoot-thru current which is a result of momentary overlap of
output transistors. This allows more efficient usage of the IC at
higher frequencies, as well as improving the noise susceptibility
of the device. Internal circuitry insures that the outputs are held
off during VCC ramp-up. Figure 20, in the characteristic curves
section, shows output sink saturation voltage vs. current at 5V.
TA = 125°C
0.9
0.8
TA = 25°C
0.7
0.6
TA = -55°C
0.5
0.4
0.3
0.2
0.1
0
0
0.5
1.0
1.5
2.0
2.5
3.0 3.5
4.0
4.5
5.0
Error Amplifier Output Voltage - (V)
FIGURE 29 — CURRENT SENSE THRESHOLD vs. ERROR AMPLIFIER OUTPUT
Copyright © 1994
Rev. 1.0b
15
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
D
A T A
S
H E E T
T Y P I C A L A P P L I C AT I O N C I R C U I T S
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Unless otherwise specified, pin numbers refer to 8-pin package.
FIGURE 30. — CURRENT SENSE SPIKE SUPPRESSION
VCC
FIGURE 31. — MOSFET PARASITIC OSCILLATIONS
VCC
DC BUS
7
7
Q1
LX155x
6
5
3
LX155x
IPK(MAX) =
RS
1.0V
RS
FIGURE 32. — ADJUSTABLE BUFFERED REDUCTION OF CLAMP
LEVEL WITH SOFT-START
VCC
A resistor (R1) in series with the MOSFET gate reduces overshoot &
ringing caused by the MOSFET input capacitance and any inductance
in series with the gate drive. (Note: It is very important to have a low
inductance ground path to insure correct operation of the I.C. This
can be done by making the ground paths as short and as wide as
possible.)
FIGURE 33. — EXTERNAL DUTY CYCLE CLAMP AND MULTI-UNIT
SYNCHRONIZATION
8
RA
Q1
2
LX155x
1
1N4148
RS
8
4
7
4
R2
6
3
MPSA63
R1
5
R1
V CS
Where: VCS = 1.67
RS
tSOFTSTART = -ln 1 -
6
VIN
7
IPK =
Q1
5
The RC low pass filter will eliminate the leading edge current spike
caused by parasitics of Power MOSFET.
8
R1
IPK
C
C
DC BUS
( R +R ) and V
1
VEAO - 1.3
5(
R1
R 1+R2
)
2
(
R1 R2
R1+R2
RB
6
IPK
VCS
2
RS
0.01
555
TIMER
5
= 1V (Typ.)
C.S.MAX
)C
f = (R 1.44
+ 2RB)C
A
3
LX155x
4
1
5
To other
LX155x devices
R
f = R + B2R
A
B
where; VEAO ≡ voltage at the Error Amp Output under
minimum line and maximum load conditions.
Soft start and adjustable peak current can be done with the external
circuitry shown above.
16
Precision duty cycle limiting as well as synchronizing several parts is
possible with the above circuitry.
Copyright © 1994
Rev. 1.0b
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
R O D U C T I O N
D
A T A
S
H E E T
(continued)
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T Y P I C A L A P P L I C AT I O N C I R C U I T S
FIGURE 34. — SLOPE COMPENSATION
VCC
LX155x
DC BUS
7(12)
VO
5V
8(14)
UVLO
S
R
RT
5V
REF
INTERNAL
BIAS
2.5V
2N222A
VREF
GOOD LOGIC
RSLOPE
4(7)
7(11)
OSCILLATOR
From VO
CT
Ri
Rd
2(3)
CF
RF
1(1)
6(10)
C.S.
COMP
2R
Q1
1V
ERROR
AMP
R
5(8)
PWM
LATCH
R
3(5)
5(9)
C
RS
Due to inherent instability of fixed frequency current mode converters running above 50% duty cycle, slope compensation should be
added to either the current sense pin or the error amplifier. Figure 34 shows a typical slope compensation technique. Pin numbers
inside parenthesis refer to 14-pin package.
FIGURE 35. — OPEN LOOP LABORATORY FIXTURE
RT
4.7K
100K
1K
ERROR AMP
ADJUST
4.7K
A
LX155x
2N2222
1
COMP
VREF
8
2
VFB
VCC
7
5K
ISENSE
ADJUST
3
ISENSE
OUTPUT
6
4
RTCT
GROUND
5
CT
0.1µF
0.1µF
VREF
VCC
1K
OUTPUT
GROUND
High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be
connected to pin 5 in a single point ground. The transistor and 5k potentiometer are used to sample the oscillator waveform and apply an
adjustable ramp to pin 3.
Copyright © 1994
Rev. 1.0b
17
PRODUCT DATABOOK 1996/1997
LX1552/3/4/5
U LTRA-LOW S TART-U P CURRENT, C URRENT-MODE PWM
P
D
R O D U C T I O N
A T A
S
H E E T
(continued)
NO
T R OB
EC SO
OM L
ME ET
ND E P
ED
R
FO OD
R
NE UC
W T
DE
SIG
NS
TYPICAL APPLICATION CIRCUITS
FIGURE 36. — OFF-LINE FLYBACK REGULATOR
TI
4.7Ω 1W
1N4004
220µF
250V
1N4004
4.7kΩ
2W
3600pF
400V
250kΩ
1/2W
AC
INPUT
1N4004
1N4004
MBR735
5V
2-5A
4700µF
10V
1N4935
1N4935
16V
150kΩ
3.6kΩ
100pF
10kΩ
0.01µF
SPECIFICATIONS
1
COMP
8
VREF
4
RT/CT
.0022µF
Input line voltage:
Input frequency:
Switching frequency:
Output power:
Output voltage:
Output current:
Line regulation:
Load regulation:
Efficiency @ 25 Watts,
VIN = 90VAC:
VIN = 130VAC:
Output short-circuit current:
18
VCC
VFB
10µF
20V
0.01µF
820pF
1N4935
2
7
27kΩ
OUT 6
CUR
3
SEN
GND
5
90VAC to 130VAC
50 or 60Hz
40KHz ±10%
25W maximum
5V +5%
2 to 5A
0.01%/V
8%/A*
2.5kΩ
IRF830
LX1554
20kΩ
1kΩ
470pF
0.85kΩ
ISOLATION
BOUNDARY
* This circuit uses a low-cost feedback scheme in which the DC
voltage developed from the primary-side control winding is
sensed by the LX1554 error amplifier. Load regulation is
therefore dependent on the coupling between secondary and
control windings, and on transformer leakage inductance.
70%
65%
2.5Amp average
Copyright © 1994
Rev. 1.0b