SG1842/SG1843 Series CURRENT MODE PWM CONTROLLER ® TM P R O D U C T I O N D DESCRIPTION The SG1842/43 family of control IC's provides all lockout, current limiting circuitry and start-up the necessary features to implement off-line fixed current of less than 1mA. The totem-pole output frequency, current-mode switching power supplies is optimized to drive the gate of a power with a minimum number of external components. MOSFET. The output is low in the off state to Current-mode architecture demonstrates improved provide direct interface to an N channel device. line regulation, improved load regulation, pulse- The SG1842/43 is specified for operation over by-pulse current limiting and inherent protection the full military ambient temperature range of of the power supply output switch. The bandgap 55°C to 125°C. The SG2842/43 is specified for reference is trimmed to ±1% over temperature. the industrial range of -25°C to 85°C, and the Oscillator discharge current is trimmed to less SG3842/43 is designed for the commercial range than ±10%. The SG1842/43 has under-voltage of 0°C to 70°C. RST IST H E E T OPTIMIZED FOR OFF-LINE CONTROL LOW START-UP CURRENT (<1mA) AUTOMATIC FEED FORWARD COMPENSATION TRIMMED OSCILLATOR DISCHARGE CURRENT PULSE-BY-PULSE CURRENT LIMITING ENHANCED LOAD RESPONSE CHARACTERISTICS UNDER-VOLTAGE LOCKOUT WITH 6V HYSTERESIS (SG1842 only) DOUBLE-PULSE SUPPRESSION HIGH-CURRENT TOTEM-POLE OUTPUT (1AMP PEAK) INTERNALLY TRIMMED BANDGAP REFERENCE 500KHZ OPERATION UNDERVOLTAGE LOCKOUT SG1842 - 16 volts SG1843 - 8.4 volts LOW SHOOT-THROUGH CURRENT <75mA OVER TEMPERATURE PRODUCT HIGHLIGHT S KEY FEATURES IMPORTANT: For the most current data, consult MICROSEMI’s website: http://www.microsemi.com AC INPUT A T A VCC HIGH RELIABILITY FEATURES SG3842 AVAILABLE TO MIL-STD-883B AND DSCC SCHEDULED FOR MIL-M38510 QPL LISTING RADIATION DATA AVAILABLE Microsemi LEVEL "S" PROCESSING AVAILABLE PACKAGE ORDER INFO TA (°C) Plastic DIP M 8-Pin N Plastic DIP 14-Pin RoHS / Pb-free Transition DC: 0503 0 to 70 -25 to 85 SG3842M SG3843M SG2842M SG2843M -55 to 125 MILSTD/883 DESC SG3842N SG3843N SG2842N SG2843N Plastic SOIC DM 8-Pin Plastic SOIC D 14-Pin Y Ceramic Dip 8-Pin J Ceramic DIP 14-Pin F Cer Flatpack 10-Pin L Ceramic LCC 20-Pin RoHS / Pb-free Transition DC:0440 SG3842DM SG3843DM SG2842DM SG2843DM SG3842D SG3843D SG2842D SG2843D SG3842Y SG3843Y SG2842Y SG2843Y SG1842Y SG1843Y SG1842Y/883B SG1843Y/883B SG1842Y/DESC SG1843Y/DESC SG3842J SG3842J SG2842J SG2843J SG1842J SG1843J SG1842J/883B SG1843J/883B SG1842J/DESC SG1843J/DESC SG1842F SG1843F SG1842F/883B SG1843F/883B SG1842F/DESC SG1843F/DESC SG1842L SG1842L SG1842L/883B SG1843L/883B SG1842L/DESC SG1843L/DESC Note: Available in Tape & Reel. Append the letters “TR” to the part number. (i.e. SG2843DM-TR) Plastic packages are RoHS compliant Copyright © 2000 Rev. 1.6b 2010-03-15 Microsemi Analog Mixed Signal Group 11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570 1 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CURRENT-MODE PWM CONTROLLER P R O D U C T I O N A B S O L U T E M A X I M U M R AT I N G S D A T A S H E E T PACKAGE PIN OUTS (Notes 1 & 2) Supply Voltage (ICC < 30mA) ............................................................... Self Limiting Supply Voltage (Low Impedance Source) ........................................................ 30V Output Current (Peak) ....................................................................................... ±1A Output Current (Continuous) ....................................................................... 350mA Output Energy (Capacitive Load) ....................................................................... 5µJ Analog Inputs (Pins 2, 3) ................................................................. -0.3V to +6.3V Error Amp Output Sink Current ..................................................................... 10mA Power Dissipation at TA = 25°C (DIL-8) ............................................................ 1W Operating Junction Temperature Hermetic (J, Y, F, L Packages) ................................................................... 150°C Plastic (N, M, D, DM Packages) ................................................................ 150°C Storage Temperature Range .......................................................... -65°C to +150°C Lead Temperature (Soldering, 10 Seconds) .................................................. 300°C COMP VFB ISENSE RT/CT 1 8 2 7 3 6 4 5 VREF VCC OUTPUT GND M & Y PACKAGE (Top View) M Package: Pb-free / RoHS 100% Matte Tin Lead Finish COMP VFB ISENSE RT/CT 1 8 2 7 3 6 4 5 VREF VCC OUTPUT GND DM PACKAGE (Top View) Pb-free / RoHS Peak Package Solder Reflow Temp. (40 second max. exposure)........ 260°C (+0, -5) Pb-free / RoHS 100% Matte Tin Lead Finish Note 1. Exceeding these ratings could cause damage to the device. Note 2. All voltages are with respect to Pin 5. All currents are positive into the specified terminal. COMP N.C. VFB N.C. ISENSE N.C. RT/CT T H E R M A L D ATA M PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA 95°C/W COMP N.C. VFB N.C. ISENSE N.C. RT/CT 165°C/W D PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA 120°C/W Y PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA 130°C/W THERMAL RESISTANCE-JUNCTION TO CASE, θ JC 12 4 11 5 10 6 9 7 8 1 14 2 13 3 12 4 11 5 10 6 9 7 8 VREF N.C. VCC VC OUTPUT GROUND POWER GND N Package: Pb-free / RoHS 100% Matte Tin Lead Finish 80°C/W F PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA 3 VREF N.C. VCC VC OUTPUT GND PWR GND J & N PACKAGE (Top View) J PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA 13 Pb-free / RoHS 100% Matte Tin Lead Finish 65°C/W DM PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA 14 2 D PACKAGE (Top View) N PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA 1 80°C/W 145°C/W 1. COMP 2. VFB 3. ISENSE 4. RT/CT 5. POWER GND 1 2 3 4 5 10.VREF 9. VCC 8. VC 7. OUTPUT 6. GND 10 9 8 7 6 L PACKAGE: THERMAL RESISTANCE-JUNCTION TO CASE, θ JC THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA F PACKAGE (Top View) 35°C/W 120°C/W Junction Temperature Calculation: TJ = TA + (PD x θJA). The θJA numbers are guidelines for the thermal performance of the device/pc-board system. All of the above assume no ambient airflow. 3 2 1 20 19 4 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1. N.C. 2. COMP 3. N.C. 4. N.C. 5. VFB 6. N.C. 7. ISENSE 8. N.C. 9. N.C. 10. RT/CT 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. N.C. GROUND N.C. N.C. OUTPUT N.C. VCC N.C. N.C. VREF L PACKAGE (Top View) 2 Copyright © 2000 Rev. 1.6a 10/04 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CURRENT-MODE PWM CONTROLLER P D R O D U C T I O N A T A S H E E T R E C O M M E N D E D O P E R AT I N G C O N D I T I O N S Parameter Recommended Operating Conditions Min. Typ. Max. Symbol Supply Voltage Range Output Current (Peak) Output Current (Continuous) Analog Inputs (Pin 2, Pin 3) Error Amp Output Sink Current Oscillator Frequency Range Oscillator Timing Resistor Oscillator Timing Capacitor Operating Ambient Temperature Range: SG1842/43 SG2842/43 SG3842/43 Note 3. Range over which the device is functional. (Note 3) Units 30 ±1 200 0.1 0.52 0.001 500 150 1.0 V A mA V mA kHz KΩ µF -55 -25 0 125 85 70 °C °C °C 0 2.6 5 RT CT ELECTRICAL CHARACTERISTICS (Unless otherwise specified, these specifications apply over the operating ambient temperatures for SG1842/SG1843 with -55°C ≤ TA ≤ 125°C, SG2842/ SG2843 with -25°C ≤ TA ≤ 85°C, SG3842/SG3843 with 0°C ≤ TA ≤ 70°C, VCC = 15V (Note 7), RT = 10kΩ, and CT = 3.3nF. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.) Parameter Symbol Test Conditions SG1842/43 SG2842/43 SG3842/43 Units Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Reference Section Output Voltage Line Regulation Load Regulation Temperature Stability (Note 4) Total Output Variation (Note 4) Output Noise Voltage (Note 4) Long Term Stability (Note 4) Output Short Circuit TJ = 25°C, IO = 1mA 12 ≤ VIN ≤ 25V 1 ≤ IO ≤ 20mA VN Line, Load, Temp. 10Hz ≤ f ≤ 10kHz, TJ = 25°C TA = 125°C, 1000hrs 4.95 5.00 5.05 4.95 5.00 5.05 4.90 5.00 5.10 6 20 6 20 6 20 6 25 6 25 6 25 0.2 0.4 0.2 0.4 0.2 0.4 4.90 5.10 4.90 5.10 4.82 5.18 50 50 50 5 25 5 25 5 25 -30 -100 -180 -30 -100 -180 -30 -100 -180 V mV mV mV/°C V µV mV mA Oscillator Section Initial Accuracy Voltage Stability Temperature Stability (Note 4) Amplitude Discharge Current TJ = 25°C 12 ≤ VCC ≤ 25V TMIN ≤ TA ≤ TMAX VRT/CT (Peak to Peak) TJ = 25°C TMIN ≤ TA ≤ TMAX 47 9.3 9.5 kHz % % V mA mA 2.45 2.50 2.55 2.45 2.50 2.55 2.42 2.50 2.58 -0.3 -1 -0.3 1 -0.3 -2 65 90 65 90 65 90 0.7 1 0.7 1 0.7 1 60 70 60 70 60 70 2 6 2 6 2 6 -0.5 -0.8 -0.5 -0.8 -0.5 -0.8 5 6 5 6 5 6 0.7 1.1 0.7 1.1 0.7 1.1 V µA dB MHz dB mA mA V V 7.8 7.0 52 0.2 5 1.7 8.3 57 1 47 8.8 9.0 7.5 7.2 52 0.2 5 1.7 8.4 57 1 47 9.3 9.5 7.5 7.2 52 0.2 5 1.7 8.4 57 1 Error Amp Section Input Voltage Input Bias Current Open Loop Gain Unity Gain Bandwidth (Note 4) Power Supply Rejection Ratio Output Sink Current Output Source Current VOUT High VOUT Low VCOMP = 2.5V AVOL PSRR 2 ≤ VO ≤ 4V TJ = 25°C 12 ≤ VCC ≤ 25V VVFB = 2.7V, VCOMP = 1.1V VVFB = 2.3V, VCOMP = 5V VVFB = 2.3V, RL = 15K to gnd VVFB = 2.7V, RL = 15K to VREF (Electrical Characteristics continue next page.) Copyright © 2000 Rev. 1.6a 10/04 3 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CURRENT-MODE PWM CONTROLLER P R O D U C T I O N D A T A S H E E T ELECTRICAL CHARACTERISTICS Parameter Symbol Test Conditions (Cont'd.) SG1842/43 SG2842/43 SG3842/43 Units Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Current Sense Section Gain (Notes 5 & 6) Maximum Input Signal (Note 5) Power Supply Rejection Ratio (Note 5) PSRR Input Bias Current Delay to Output (Note 4) VCOMP = 5V 12 ≤ VCC ≤ 25V 2.85 0.9 3 1 70 -2 150 3.15 2.85 1.1 0.9 0.1 1.5 13.5 13.5 50 50 0.4 2.2 150 150 -10 300 3 1 70 -2 150 3.15 2.85 1.1 0.9 0.1 1.5 13.5 13.5 50 50 0.4 2.2 150 150 -10 300 3 1 70 -2 150 3.15 1.1 0.1 1.5 13.5 13.5 50 50 0.4 2.2 150 150 V V V V ns ns -10 300 V/V V dB µA ns Output Section Output Low Level Output High Level Rise Time Fall Time ISINK = 20mA ISINK = 200mA ISOURCE = 20mA ISOURCE = 200mA TJ = 25°C, CL = 1nF TJ = 25°C, CL = 1nF 13 12 1842 1843 1842 1843 15 7.8 9 7.0 16 8.4 10 7.6 17 9.0 11 8.3 15 7.8 9 7.0 16 8.4 10 7.6 17 9.0 11 8.2 14.5 7.8 8.5 7.0 16 8.4 10 7.6 17.5 9.0 11.5 8.2 V V V V 93 95 100 0 90 95 100 0 90 95 100 0 % % 0.5 11 34 1 17 13 12 13 12 Under-Voltage Lockout Section Start Threshold Min. Operation Voltage After Turn-On PWM Section Maximum Duty Cycle Minimum Duty Cycle Power Consumption Section Start-Up Current Operating Supply Current VCC Zener Voltage VFB = VISENSE = 0V ICC = 25mA Notes: 4. These parameters, although guaranteed, are not 100% tested in production. 5. Parameter measured at trip point of latch with VVFB = 0. 4 0.5 1 0.5 1 mA 11 17 11 17 mA 34 34 V ∆ VCOMP 6. Gain defined as: A = ∆ V ; 0 ≤ VISENSE ≤ 0.8V. ISENSE 7. Adjust VCC above the start threshold before setting at 15V. Copyright © 2000 Rev. 1.6a 10/04 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CURRENT-MODE PWM CONTROLLER P D R O D U C T I O N A T A S H E E T BLOCK DIAGRAM VCC* 34V UVLO S/R GROUND** 16V (1842) 8.4V (1843) 6V (1842) 0.8V (1843) VREF 5.0V 50mA 5V REF INTERNAL BIAS 2.5V VREF GOOD LOGIC RT/CT VC* OSCILLATOR OUTPUT ERROR AMP VFB COMP CURRENT SENSE S 2R R R 1V PWM LATCH POWER GROUND** CURRENT SENSE COMPARATOR * - VCC and VC are internally connected for 8 pin packages. ** - POWER GROUND and GROUND are internally connected for 8 pin packages. Copyright © 2000 Rev. 1.6a 10/04 5 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CURRENT-MODE PWM CONTROLLER P R O D U C T I O N D A T A S GRAPH / CURVE INDEX H E E T FIGURE INDEX Characteristic Curves Application Information FIGURE # FIGURE # 1. DROPOUT VOLTAGE vs. TEMPERATURE 13. OSCILLATOR TIMING CIRCUIT 2. OSCILLATOR TEMPERATURE STABILITY 14. OSCILLATOR FREQUENCY vs. RT FOR VARIOUS CT 3. CURRENT SENSE TO OUTPUT DELAY vs. TEMPERATURE 4. OUTPUT DUTY CYCLE vs. TEMPERATURE 5. START-UP CURRENT vs. TEMPERATURE FIGURE # 6. REFERENCE VOLTAGE vs. TEMPERATURE 15. CURRENT SENSE SPIKE SUPPRESSION 7. START-UP VOLTAGE THRESHOLD vs. TEMPERATURE 16. MOSFET PARASITIC OSCILLATIONS 8. START-UP VOLTAGE THRESHOLD vs. TEMPERATURE 17. BIPOLAR TRANSISTOR DRIVE 9. OSCILLATOR DISCHARGE CURRENT vs. TEMPERATURE 18. ISOLATED MOSFET DRIVE Typical Applications Section 10. OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT AND TEMPERATURE (SINK TRANSISTOR) 19. ADJUSTABLE BUFFERED REDUCTION OF CLAMP LEVEL WITH SOFTSTART 11. CURRENT SENSE THRESHOLD vs. ERROR AMPLIFIER OUTPUT 20. EXTERNAL DUTY CYCLE CLAMP AND MULTI-UNIT SYNCHRONIZATION 12. OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT AND TEMPERATURE (SOURCE TRANSISTOR) 21. OSCILLATOR CONNECTION 22. ERROR AMPLIFIER CONNECTION 23. SLOPE COMPENSATION 24. OPEN LOOP LABORATORY FIXTURE 25. OFF-LINE FLYBACK REGULATOR 6 Copyright © 2000 Rev. 1.6a 10/04 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CURRENT-MODE PWM CONTROLLER P R O D U C T I O N D A T A S H E E T CHARACTERISTIC CURVES FIGURE 1. — DROPOUT VOLTAGE vs. TEMPERATURE FIGURE 2. — OSCILLATOR TEMPERATURE STABILITY VIN = 15V Duty Cycle = 50% 0 10.0 SG1842 Frequency Drift - (%) Minimum Operating Voltage - (V) 2 9.6 9.2 8.8 8.4 8.0 -75 -25 0 -4 -6 -8 -10 SG1843 -50 -2 25 50 75 100 -75 125 -50 -25 0 25 50 75 100 125 Junction Temperature - (°C) Junction Temperature - (°C) FIGURE 3. — CURRENT SENSE TO OUTPUT DELAY vs. TEMPERATURE FIGURE 4. — OUTPUT DUTY CYCLE vs. TEMPERATURE 200kHz 50 Output Duty Cycle - (%) Current Sense Delay - (nS) 220 200 180 VPIN3 = 1.1V 160 140 120 -75 100kHz 50kHz 50kHz 48 47 100kHz 46 200kHz 45 44 -50 -25 0 25 50 75 Junction Temperature - (°C) Copyright © 2000 Rev. 1.6a 10/04 49 100 125 -75 -50 -25 0 25 50 75 100 125 Junction Temperature - (°C) 7 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CURRENT-MODE PWM CONTROLLER P R O D U C T I O N D A T A S H E E T CHARACTERISTIC CURVES FIGURE 5. — START-UP CURRENT vs. TEMPERATURE FIGURE 6. — REFERENCE VOLTAGE vs. TEMPERATURE 5.02 0.7 5.01 Reference Voltage - (V) Start-Up Current - (mA) SG1842 0.6 0.5 0.4 0.3 SG1843 VCC = 15V 5.00 4.99 4.98 0.2 -75 -50 -25 0 25 50 75 100 -75 125 -50 -25 0 25 50 75 100 125 Junction Temperature - (°C) Junction Temperature - (°C) FIGURE 7. — START-UP VOLTAGE THRESHOLD vs. TEMPERATURE FIGURE 8. — START-UP VOLTAGE THRESHOLD vs. TEMPERATURE 16.08 8.32 16.06 Start Up Voltage - (V) Reference Voltage - (V) SG1843 8.30 8.28 8.26 8.24 8.22 SG1842 16.04 16.02 16.00 8.20 8.18 -75 15.98 -50 -25 0 25 50 75 Junction Temperature - (°C) 8 100 125 -75 -50 -25 0 25 50 75 100 125 Junction Temperature - (°C) Copyright © 2000 Rev. 1.6a 10/04 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CURRENT-MODE PWM CONTROLLER P R O D U C T I O N D A T A S H E E T CHARACTERISTIC CURVES FIGURE 10. — OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT & TEMPERATURE 8.2 2.5 8.0 2.0 Saturation Voltage - (V) Oscillator Discharge Current - (mA) FIGURE 9. — OSCILLATOR DISCHARGE CURRENT vs. TEMPERATURE 7.8 7.6 7.4 °C +25 1.5 5°C +12 1.0 VIN = 15V Duty Cycle < 5% 0.5 7.2 -75 C -55° 0 -50 -25 0 25 50 75 100 100 125 Junction Temperature - (°C) 200 300 400 500 Output Current - (mA) FIGURE 11. — CURRENT SENSE THRESHOLD vs. ERROR AMPLIFIER OUTPUT FIGURE 12. — OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT & TEMPERATURE 1.0 0.8 VIN = 15V Duty Cycle < 5% Saturation Voltage - (V) 4.0 12 5°C 25 °C -55 °C Current Sense Threshold - (V) 0.9 0.7 0.6 0.5 0.4 0.3 0.2 3.0 °C 25 +1 5°C +2 °C -55 °C +25 2.0 5°C +12 1.0 0.1 0 0 1.0 2.0 3.0 4.0 Error Amp Output Voltage - (V) Copyright © 2000 Rev. 1.6a 10/04 5.0 100 200 300 400 500 Output Current - (mA) 9 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CURRENT-MODE PWM CONTROLLER P D R O D U C T I O N A T A S H E E T A P P L I C AT I O N I N F O R M AT I O N OSCILLATOR The oscillator of the 1842/43 family of PWM's is designed such that many values of RT and CT will give the same oscillator frequency, but only one combination will yield a specific duty cycle at a given frequency. A set of formulas are given to determine the values of RT and CT for a given frequency and maximum duty cycle. (Note: These formulas are less accurate for smaller duty cycles or higher frequencies. This will require trimming of RT or CT to correct for this error.) Given: Frequency ≡ f Maximum Duty Cycle ≡ Dm Example: A Flyback power supply requires a maximum of 45% duty cycle at a switching frequency of 50kHz. What are the values of RT and CT? (1.76)1/Dm -1 Calculate: RT = 267 (Ω) (1-Dm)/Dm - 1 (1.76) Given: (1.76)1/.045 -1 Calculate: RT = 267 (1.76).55/.45 - 1 = 674Ω where .3 < Dm < .95 CT = 1.86 * Dm f * RT f = 50kHz Dm = 0.45 (µF) CT = 1.86 * 0.45 = .025µF 50000 * 674 1000 For Duty-Cycles above 95% use: VREF RT = 680 RT = 2k RT = 5k RT = 10k RT = 20k RT = 30k RT = 50k RT = 7 RT = 0k 100 k RT RT/CT CT f - (kHz) 100 10 GND 1.86 F≈ RT CT where RT ≥ 5kΩ FIGURE 13 — OSCILLATOR TIMING CIRCUIT 10 1 .001 .002 .005 .01 .02 .05 0.1 CT Value - (µF) FIGURE 14 — OSCILLATOR FREQUENCY vs. RT FOR VARIOUS CT Copyright © 2000 Rev. 1.6a 10/04 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CURRENT-MODE PWM CONTROLLER P R O D U C T I O N D A T A S H E E T T Y P I C A L A P P L I C AT I O N C I R C U I T S Pin numbers referenced are for 8-pin package and pin numbers in parenthesis are for 14-pin package. VCC VIN VIN 7 (12) 7 (12) 7 (11) SG1842/43 VCC 7 (11) Q1 Q1 R1 6 (10) SG1842/43 6 (10) IPK 5 (8) R IPK(MAX) = 1.0V RS 3 (5) RS C 5 (8) RS 3 (5) FIGURE 16. — MOSFET PARASITIC OSCILLATIONS FIGURE 15. — CURRENT-SENSE SPIKE SUPPRESSION The RC low pass filter will eliminate the leading edge current spike caused by parasitics of Power MOSFET. A resistor (R1) in series with the MOSFET gate reduce overshoot and ringing caused by the MOSFET input capacitance and any inductance in series with the gate drive. (Note: It is very important to have a low inductance ground path to insure correct operation of the I.C. This can be done by making the ground paths as short and as wide as possible.) VCC IB VC + R2 VIN VIN Isolation Boundary 7 (12) VC1 R1|| R2 _ 7 (11) VC VC1 6 (10) Waveforms 7 (11) R2 SG1842/43 Q1 6 (10) SG1842/43 C1 R1 + 0 _ 50% DC 5 (8) Q1 + R 0 _ 3 (5) C 5 (8) 3 (5) RS FIGURE 17. — BIPOLAR TRANSISTOR DRIVE The 1842/43 output stage can provide negative base current to remove base charge of power transistor (Q1) for faster turn off. This is accomplished by adding a capacitor (C1) in parallel with a resistor (R1). The resistor (R1) is to limit the base current during turn on. Copyright © 2000 Rev. 1.6a 10/04 RS IPK = V (PIN 1) - 1.4 3RS NP NS NS NP 25% DC FIGURE 18. — ISOLATED MOSFET DRIVE Current transformers can be used where isolation is required between PWM and Primary ground. A drive transformer is then necessary to interface the PWM output with the MOSFET. 11 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CURRENT-MODE PWM CONTROLLER P R O D U C T I O N D A T A S H E E T T Y P I C A L A P P L I C AT I O N C I R C U I T S VCC (continued) VIN 8 (14) 7 (12) 6 (10) SG1842/43 1N4148 1 (1) R1 SG1842/43 Q1 2 (3) C 4 6 7 (11) 4 (7) R2 8 RA 8 (14) I 555 TIMER RB 3 4 (7) 5 (8) MPSA63 2 VCS 3 (5) 1 RS 5 (9) 5 (9) To other SGX842/43 VCS R1 Where: VCS = 1.67 and VC.S.MAX = 1V (Typ.) RS R1+R2 V - 1.3 R1 R2 tSOFTSTART = -ln 1 - EAO R R +R C 5 1 1 2 IPK = R1+R 2 f= 1.44 (RA + 2RB)C f= RB RA + 2RB where; VEAO ≡ voltage at the Error Amp Output under minimum line and maximum load conditions. FIGURE 19. — ADJUSTABLE BUFFERED REDUCTION OF CLAMP LEVEL WITH SOFTSTART Softstart and adjustable peak current can be done with the external circuitry shown above. 2.8V 5V FIGURE 20. — EXTERNAL DUTY CYCLE CLAMP AND MULTI-UNIT SYNCHRONIZATION Precision duty cycle limiting as well as synchronizing several 1842/ 1843's is possible with the above circuitry. 8 (14) 1.1V 2.5V RT SG1842/43 0.5mA 4 (7) 2 (3) CT SG1842/43 Discharge Current Ri RF Id = 8.2mA FIGURE 21. — OSCILLATOR CONNECTION The oscillator is programmed by the values selected for the timing components RT and CT. Refer to application information for calculation of the component values. 12 1 (1) RF 10K FIGURE 22. — ERROR AMPLIFIER CONNECTION Error amplifier is capable of sourcing and sinking current up to 0.5mA. Copyright © 2000 Rev. 1.6a 10/04 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CURRENT-MODE PWM CONTROLLER P D R O D U C T I O N A T A S H E E T T Y P I C A L A P P L I C AT I O N C I R C U I T S (continued) VCC SG1842/43 VIN 7(12) VO 5V 8(14) 5V UVLO S 5V REF R RT INTERNAL BIAS 2.5V 2N222A VREF GOOD LOGIC RSLOPE 7(11) 4(7) Q1 OSCILLATOR From VO CT Ri Rd 2(3) CF 1V ERROR AMP RF 6(10) C.S. COMP 2R R 5(8) PWM LATCH R 3(5) 1(1) 5(9) C RS FIGURE 23. — SLOPE COMPENSATION Due to inherent instability of current mode converters running above 50% duty cycle, a slope compensation should be added to either current sense pin or the error amplifier. Figure 23 shows a typical slope compensation technique. VREF RT 2N2222 4.7K 100K 1K ERROR AMP ADJUST 4.7K 5K ISENSE ADJUST VCC A SG1842/43 1 COMP VREF 8 2 VFB VCC 7 3 ISENSE OUTPUT 6 4 RTCT GROUND 5 0.1µF 0.1µF CT 1K OUTPUT GROUND FIGURE 24. — OPEN LOOP LABORATORY FIXTURE High-peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected to pin 5 in a single point ground. The transistor and 5k potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to pin 3. Copyright © 2000 Rev. 1.6a 10/04 13 PRODUCT DATABOOK 1996/1997 SG1842/SG1843 Series CURRENT-MODE PWM CONTROLLER P R O D U C T I O N D A T A S H E E T T Y P I C A L A P P L I C AT I O N C I R C U I T S (continued) TI 4.7 1W 220µF 250V 673-3 USD735 0.01pF 400V 56k 1W 5V 2-5A 4700µF 10V 1N3613 AC INPUT 1N3613 16V SG1842 150k 3.6k COMP 0.01µF 27 OUT 20k 100pF VREF 10k RT/CT 0.01µF 820pF 1N3613 VCC VFB 10µF 20V UFN432 20k CUR SEN GND 2.5k T1: Coilcraft E - 4140 - b Primary - 97 turns single AWG 24 Secondary - 4 turns 4 parallel AWG 22 Control - 9 turns 3 parallel AWG 28 1k 470pF 0.85 .0047µF ISOLATION BOUNDARY FIGURE 25. — OFF-LINE FLYBACK REGULATOR SPECIFICATIONS Input line voltage: Input frequency: Switching frequency: Output power: Output voltage: Output current: Line regulation: Load regulation: Efficiency @ 25 Watts, VIN = 90VAC: VIN = 130VAC: Output short-circuit current: 14 90VAC to 130VAC 50 or 60Hz 40KHz ±10% 25W maximum 5V +5% 2 to 5A 0.01%/V 8%/A* * This circuit uses a low-cost feedback scheme in which the DC voltage developed from the primary-side control winding is sensed by the SG1842 error amplifier. Load regulation is therefore dependent on the coupling between secondary and control windings, and on transformer leakage inductance. 70% 65% 2.5Amp average Copyright © 2000 Rev. 1.6a 10/04