LX1664.pdf

Not Recommended For New Design
LX1664 / 64A, LX1665 / 65A
DUAL OUTPUT PWM CONTROLLER WITH 5-BIT DAC
T
H E
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N F I N I T E
P
O W E R
O F
I
P
N N O V A T I O N
R O D U C T I O N
D
A T A
H E E T
KEY FEATURES
DESCRIPTION
„ 5-bit Programmable Output For
a DIP switch on the motherboard, or
hardwired into the processor’s package (as
in the case of Pentium® Pro and Pentium II
processors). The 5-bit code adjusts the
output voltage between 1.30 and 2.05V in
50mV increments and between 2.0 and 3.5V
in 100mV increments, conforming to the
Intel Corporation specification. The device
can drive dual MOSFET’s resulting in
typical efficiencies of 85 - 90% even with
loads in excess of 10 amperes. For cost
sensitive applications, the bottom MOSFET
can be replaced with a Schottky diode (nonsynchronous operation).
Linear Regulator Driver. The LX1664/ 65
family of devices have a secondary regulator
output. This can drive a MOSFET or bipolar
transistor as a pass element to construct a
low-cost adjustable linear regulator suitable
for powering a 1.5V GTL+ bus or 2.5V
clock supply.
CPU Core Supply
„ Adjustable Linear Regulator
Driver Output
„ No Sense Resistor Required For
Short-Circuit Current Limiting
„ Designed To Drive Either
Synchronous Or NonSynchronous Output Stages
„ Soft-Start Capability
„ Modulated, Constant Off-Time
Architecture For Fast Transient
Response And Simple System
Design
„ Available Over-Voltage
Protection (OVP) Crowbar Driver
And Power Good Flag (LX1665
only)
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The LX1664/64A and LX1665/65A are
monolithic switching regulator controller
IC’s designed to provide a low cost, high
performance adjustable power supply for
advanced microprocessors and other
applications requiring a very fast transient
response and a high degree of accuracy.
Short-circuit Current Limiting without
Expensive Current Sense Resistors.
Current-sensing mechanism can use PCB
trace resistance or the parasitic resistance of
the main inductor. The LX1664A and
LX1665A have reduced current sense
comparator threshold for optimum
performance using a sense resistor. For
applications requiring a high degree of
accuracy, a conventional sense resistor can be
used to sense current.
Programmable Synchronous Rectifier
Driver for CPU Core. The main output is
adjustable from 1.3V to 3.5V using a 5-bit
code. The IC can read a VID signal set by
S
APPLICATIONS
„ Socket 7 (Pentium Class)
Microprocessor Supplies
(including Intel Pentium
Processor, AMD-K6TM And
Cyrix® 6x86TM, Gx86TM and
M2TM Processors)
„ Pentium II and Deschutes
Processor & L2-Cache Supplies
„ Voltage Regulator Modules
IMPORTANT: For the most current data, consult MICROSEMI’s website: http://www.microsemi.com
PRODUCT HIGHLIGHT
LX1665 in a Pentium II Single-Chip Power Supply Solution
F1 20A
12V
C3
0.1µF
2
3
O
VID0
VID1
VID2
VID3
VID4
TA (°C)
0 to 70
N
C5
1µF
U1
LX1665
1
Plastic DIP
16-Pin
4
5
6
7
8
9
SS
VC1
INV
TDRV
VCC_CORE
GND
VID0
BDRV
VID1
VCC
VID2
CT
VID3
OV
VID4
LDRV
LFB
PWRGD
18-pin
Wide-Body SOIC
N
5V
6.3V
1500µF x3
C2
Q1
18
IRL3102
17
16
Q2
15
L1
R1
0.0025
2.5µH
C8
680pF
11
10
Q4
IRLZ44
R5
OV
PWRGD
** Three capacitors for Pentium
Four capacitors for Pentium II
Supply Voltage
For I/O Chipset or GTL+ Bus
C7
330µF
R6
PACKAGE ORDER INFO
Plastic DIP
Plastic SOIC
D 16-Pin
18-Pin
LX1665CN
LX1665ACN
VOUT
6.3V, 1500µF x 3**
C9
330µF
13
12
Supply Voltage
for CPU Core
C1
IRL3303
14
RoHS Compliant / Pb-free
Transition DC: 0503
LX1664CN
LX1664ACN
L2
1µH
DW
Plastic SOIC Wide
18-Pin
RoHS Compliant / Pb-free
Transition DC: 0440
RoHS Compliant / Pb-free
Transition DC: 0516
LX1664CD
LX1664ACD
LX1665CDW
LX1665ACDW
Note: Available in Tape & Reel. Append the letters ‘TR’ to the part number. (i.e. LX1664CD-TR)
Copyright © 1999
Rev. 1.3a,2005-03-17
LINFINITY MICROELECTRONICS INC.
11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841, 714-898-8121, FAX: 714-893-2570
1
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
A T A
WITH
S
5-B IT DAC
H E E T
D E S C R I P T I O N (con't.)
sient response for a given inductor, reducing output capacitor requirements, and reducing the total regulator system cost.
Over-Voltage Protection and Power
Good Flag. The OVP output in the LX1665
& LX1665A can be used to drive an SCR
crowbar circuit to protect the load in the
event of a short-circuit of the main MOSFET.
The LX1665 & LX1665A also have a logiclevel Power Good Flag to signal when the
output voltage is out of specified limits.
DEVICE SELECTION GUIDE
DEVICE
LX1664
LX1664A
LX1665
LX1665A
SS
INV
1
16
2
15
VCC_CORE
VID0
VID1
VID2
VID3
VID4
3
14
4
13
5
12
6
11
7
10
8
9
VC1
TDRV
GND
BDRV
VCC
CT
LDRV
LFB
N PACKAGE — 16-Pin
LX1664/1664A (Top View)
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Smallest Package Size. The LX1664 is
available in a narrow body 16-pin surface
mount IC package for space sensitive applications. The LX1665 provides the additional
functions of Over Voltage Protection (OVP)
and Power Good (PWRGD) output drives
for applications requiring output voltage
monitoring and protection functions.
Ultra-Fast Transient Response reduces system cost. The modulated offtime architecture results in the fastest tran-
PACKAGE PIN OUTS
Packages
16-pin SOIC
& DIP
18-pin SOIC
& DIP
OVP and
Power Good
Current-Sense
Comp. Thresh. (mV)
No
Yes
100
60
100
60
Optimal Load
Pentium-class (<10A)
Pentium II (> 10A)
Pentium-class (<10A)
Pentium II (> 10A)
A B S O L U T E M A X I M U M R AT I N G S (Note 1)
Supply Voltage (VC1) .................................................................................................... 25V
Supply Voltage (VCC) .................................................................................................... 15V
Output Drive Peak Current Source (500ns) ............................................................... 1.5A
Output Drive Peak Current Sink (500ns) ................................................................... 1.5A
Input Voltage (SS, INV, VCC_CORE, CT, VID0-VID4) ........................................... -0.3V to 6V
Operating Junction Temperature
Plastic (N, D & DW Packages) ............................................................................. 150°C
Storage Temperature Range .................................................................... -65°C to +150°C
Lead Temperature (Soldering, 10 Seconds) ............................................................. 300°C
SS
INV
1
18
2
17
VCC_CORE
VID0
VID1
VID2
VID3
VID4
LFB
3
16
4
15
5
14
6
13
7
12
8
11
9
10
VC1
TDRV
GND
BDRV
VCC
CT
OV
LDRV
PWRGD
N PACKAGE — 18-Pin
LX1665/1665A (Top View)
SS
INV
1
VCC_CORE
VID0
VID1
VID2
VID3
VID4
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VC1
TDRV
GND
BDRV
VCC
CT
LDRV
LFB
D PACKAGE — 16-Pin
LX1664/1664A (Top View)
Peak Package Solder Reflow Temp (40 second max. exposure)............................................260°C(+0, -5)
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with respect
to Ground. Currents are positive into, negative out of the specified terminal. Pin
numbers refer to DIL packages only.
O
T H E R M A L D ATA
N (16-PIN DIP) PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
65°C/W
N (18-PIN DIP) PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
60°C/W
D PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
SS
INV
1
18
2
17
VCC_CORE
VID0
VID1
VID2
VID3
VID4
LFB
3
16
4
15
5
14
6
13
7
12
8
11
9
10
VC1
TDRV
GND
BDRV
VCC
CT
OV
LDRV
PWRGD
DW PACKAGE — 18-Pin
LX1665/1665A (Top View)
RoHS / Pb-free 100% Matte Tin Lead Finish
120°C/W
DW PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
90°C/W
Junction Temperature Calculation: TJ = TA + (PD x θJA).
The θJA numbers are guidelines for the thermal performance of the device/pc-board system.
All of the above assume no ambient airflow
2
Copyright © 1999
Rev. 1.3a 11/04
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
A T A
WITH
S
5-B IT DAC
H E E T
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, 10.8 < VCC < 13.2, 0°C ≤ TA ≤ 70°C. Test conditions: VCC = 12V, T = 25°C. Use Application Circuit.)
Parameter
Reference & DAC Section
Symbol
Test Conditions
(See Table 1 - Next Page)
(Less 40mV output adaptive positioning), VCC = 12V, ILOAD = 6A
Regulation Accuracy (See Table 1)
Regulation Accuracy
1.8V ≤ VOUT ≤ 2.8V
LX1664/1665 (A)
Min. Typ.
Max.
-30
-1
30
1
Units
mV
%
Timing Section
OT
VCC_CORE = 1.3V, CT = 390pF
VCC_CORE = 3.5V, CT = 390pF
VCC_CORE = 1.3V to 3.5V
VCC_CORE = 1.3V, VCT = 1.5V
2
1
40
210
2
1
0.42
100
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Off Time Initial
Off Time Temp Stability
Discharging Current
Ramp Peak
Ramp Peak-Valley
IDIS
VP
VRPP
Ramp Valley Delay to Output
VCC_CORE = 1.3V
VCC_CORE = 3.5V
10% Overdrive
180
0.9
0.37
240
1.1
0.47
µs
µs
ppm
µA
V
V
V
ns
Error Comparator Section
Input Bias Current
Input Offset Voltage
EC Delay to Output
IB
VIO
1.3V < VSS = VINV < 3.5V
36
0.8
41
200
2
46
µA
mV
ns
85
50
27
100
60
200
35
115
70
µA
mV
mV
ns
10% Overdrive
Current Sense Section
Input Bias Current (VCC_CORE Pin)
Pulse By Pulse CL
LX1664/1665
LX1664A/1665A
CS Delay to Output
IB
VCLP
1.3V < VINV = VCC_CORE < 3.5V
Initial Accuracy
Initial Accuracy
10% Overdrive
Drive Rise Time
Drive Fall Time
Drive High
TR
TF
VDH
Drive Low
VDL
VC1 = VCC = 12V, CL = 3000pF
VC1 = VCC = 12V, CL = 3000pF
VCC = VCC = 12V, ISOURCE = 20mA
VCC = VCC = 12V, ISINK = 200mA
VCC = VCC = 12V, ISOURCE = 20mA
VCC = VCC = 12V, ISINK = 200mA
VCC = VC = 0, IPULL UP = 2mA
Output Drivers Section
Output Pull Down
VPD
70
70
11
10
0.06
0.8
0.8
0.1
1.2
1.4
ns
ns
V
V
V
V
V
UVLO and S.S. Section
O
Start-Up Threshold
Hysteresis
SS Sink Current
SS Sat Voltage
VST
VHYST
ISD
VOL
9.9
VC1 = 10.1V
VC1 = 9V, ISD = 200µA
2
10.1
0.31
5.5
0.15
10.4
0.6
V
V
mA
V
27
mA
92
%
%
V
%
mA
Supply Current Section
Dynamic Operating Current
ICD
VCC = VC1 = 12V, Out Freq = 200kHz, CL = 0
Power Good / Over-Voltage Protection Section (LX1665 Only)
Lower Threshold
Hysteresis
Power Good Voltage Low
Over-Voltage Threshold
OVP Sourcing Current
(VCC_CORE / DACOUT)
88
IPWRGD = 5mA
(VCC_CORE / VDAC)
VOV = 5V
110
30
Set by external resistors
IL = 0.5A using 0.5% resistors
1.5
-1.5
90
1
0.5
117
45
0.7
125
Linear Regulator Section
Output Voltage
Setpoint Accuracy
Output Temperature Drift
Load Regulation
Cummulative Accuracy
Op-Amp Output Current
Copyright © 1999
Rev. 1.3a 11/04
3.6
1.5
40
1.5
3
Open Loop
50
70
V
%
ppm
%
%
mA
3
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
WITH
S
A T A
5-B IT DAC
H E E T
ELECTRICAL CHARACTERISTICS
Table 1 - Adaptive Transient Voltage Output
Processor Pins
Output Voltage (VCC_CORE)
0 = Ground, 1 = Open (Floating)
VID4
VID3
VID2
VID1
1
1
1
1
1
1
1
1
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
0
0
0
0
0
0
0
0
DAC setpoint voltage
VID0
0.0A
Nominal Output*
1
1
1.34V
1.30V
1
0
1.39V
1.35V
0
1
1.44V
1.40V
0
0
1.49V
1.45V
1
1
1.54V
1.50V
1
0
1.59V
1.55V
0
1
1.64V
1.60V
0
0
1.69V
1.65V
1
1
1.74V
1.70V
1
0
1.79V
1.75V
0
1
1.84V
1.80V
0
0
1.89V
1.85V
1
1
1.94V
1.90V
1
0
1.99V
1.95V
0
1
2.04V
2.00V
0
0
2.09V
2.05V
1
1
2.04V
2.00V
1
0
2.14V
2.10V
0
1
2.24V
2.20V
0
0
2.34V
2.30V
1
1
2.44V
2.40V
1
0
2.54V
2.50V
0
1
2.64V
2.60V
0
0
2.74V
2.70V
1
1
2.84V
2.80V
1
0
2.94V
2.90V
0
1
3.04V
3.00V
0
0
3.14V
3.10V
1
1
3.24V
3.20V
1
0
3.34V
3.30V
0
1
3.44V
3.40V
0
0
3.54V
3.50V
with no adaptive output voltage positioning.
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0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
* Nominal =
(Output Voltage Setpoint — Typical)
0 to 14A
Output Voltage
0A
5A/Div.
2.8V
100mV/Div.
O
In order to improve transient response a 40mV
offset is built into the Current Sense comparator.
At high currents, the peak output voltage will be
lower than the nominal set point, as shown in
Figure 1. The actual output voltage will be a
function of the sense resistor, the output current
and output ripple.
Output Load
Note:
Adaptive Transient Voltage Output
Time - 100µs/Div.
FIGURE 1 — Output Transient Response
(using 5mΩ sense resistor and 5µH output inductor)
4
Copyright © 1999
Rev. 1.3a 11/04
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
WITH
S
A T A
5-B IT DAC
H E E T
CHARACTERISTICS CURVES
95
100
95
EFFICIENCY (%)__
90
85
80
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EFFICIENCY (%)__
90
80
Output Set Point
Output Set Point
EFFICIENCY AT 3.1V
EFFICIENCY AT 2.8V
EFFICIENCY AT 1.8V
75
70
85
EFFICIENCY AT 3.1V
EFFICIENCY AT 2.8V
75
EFFICIENCY AT 1.8V
70
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
4
5
6
7
IOUT (A)
8
9
10
11
12
13
14
IOUT (A)
FIGURE 3 — Efficiency Test Results:
Synchronous Operation, VIN = 5V
FIGURE 2 — Efficiency Test Results:
Non-Synchronous Operation, VIN = 5V
90
85
80
O
75
70
Output Set Point
1.8V EFFICIENCY
65
2.8V EFFICIENCY
3.3V EFFICIENCY
60
1
2
3
4
5
6
7
8
9
10
11
12
13
14
IOUT (A)
FIGURE 4 — Efficiency Test Results: Synchronous Operation, VIN = 12V.
Note: Non-synchronous operation not recommended for 12V operation, due to power loss in Schottky diode.
Copyright © 1999
Rev. 1.3a 11/04
5
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
WITH
A T A
S
5-B IT DAC
H E E T
BLOCK DIAGRAM
VCC
SS 1
2V Out
UVLO
10.6/10.1
2V REF
CT 13
Q
R DOM
R
Q
16 GND
VREG
Break
Before
Make
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VCC_CORE 3
S
17 TDRV
Internal
VCC
40mV
INV 2
18 VC1
PWM Latch
Trimmed
Error Comp
15 BDRV
0.7V
Off-Time
Controller
SYNC EN
Comp
14 VCC
100mV **
OV Comp
CS Comp
UV Comp
12 OV*
10 PWRGD*
10k
DAC OUT
LX1665/1665A ONLY
1.5V
DAC
5
6
7
8
VID0
VID1
VID2
VID3
VID4
O
4
6
Linear Op Amp
11 LDRV
9 LFB
Note: Pin numbers are correct for LX1665/1665A, 18-pin package.
* Not connected on LX1664/1664A.
** 60mV in LX1664A/1665A.
FIGURE 5 — LX1664/1665 Block Diagram
Copyright © 1999
Rev. 1.3a 11/04
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
WITH
A T A
S
5-B IT DAC
H E E T
FUNCTIONAL PIN DESCRIPTION
Pin
Name
LX1664
Pin #
LX1665
Pin #
SS
1
1
Soft-Start pin, internally connected to the non-inverting input of the error comparator.
INV
2
2
Inverting input of the error comparator.
VCC_CORE
3
3
Output voltage. Connected to non-inverting input of the current-sense comparator.
VID0
4
4
Voltage Identification pin (LSB) input used to set output voltage.
VID1
5
5
Voltage Identification pin (2nd SB) input.
6
6
Voltage Identification pin (3rd SB) input.
7
7
Voltage Identification pin (4th SB) input.
8
8
Voltage Identification pin (MSB) input. This pin is also the range select pin — when low
(CLOSED), output voltage is set to between 1.30 and 2.05V in 0.05V increments. When high
(OPEN), output is adjusted from 2.0 to 3.5V in 0.1V increments.
9
9
Linear regulator feedback pin. 1.5V reference is connected to a resistor divider to set desired
output voltage.
N.C.
10
Open collector output pulls low when the output voltage is out of limits.
10
11
Linear regulator drive pin. Connect to gate of MOSFET for linear regulator function.
N.C.
12
SCR driver goes high when the processor's supply is over specified voltage limits.
11
13
The off-time is programmed by connecting a timing capacitor to this pin.
12
14
This is the (12V) supply to the IC, as well as gate drive to the bottom FET.
13
15
This is the gate drive to the bottom FET. Leave open in non-synchronous operation (when bottom
FET is replaced by a Schottky diode).
14
16
Both power and signal ground of the device.
15
17
Gate drive for top MOSFET.
16
18
This pin is a separate power supply input for the top drive. Can be connected to a charge pump
when only 12V is available.
VID3
VID4
LFB
PWRGD
LDRV
OV
CT
VCC
BDRV
GND
TDRV
O
VC1
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VID2
Description
Copyright © 1999
Rev. 1.3a 11/04
7
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
A T A
WITH
S
5-B IT DAC
H E E T
T H E O RY O F O P E R AT I O N
PROGRAMMING THE OUTPUT VOLTAGE
Referring to the block diagram and typical application circuit, the
output turns ON the top MOSFET, allowing the inductor current to
increase. At the error comparator threshold, the PWM latch is reset,
the top MOSFET turns OFF and the synchronous MOSFET turns ON.
The OFF-time capacitor CT is now allowed to discharge. At the
valley voltage, the synchronous MOSFET turns OFF and the top
MOSFET turns on. A special break-before-make circuit prevents
simultaneous conduction of the two MOSFETS.
The VCC_CORE pin is offset by +40mV to enhance transient
response. The INV pin is connected to the positive side of the
current sense resistor, so the controller regulates the positive side
of the sense resistor. At light loads, the output voltage will be
regulated above the nominal setpoint voltage. At heavy loads, the
output voltage will drop below the nominal setpoint voltage. To
minimize frequency variation with varying output voltage, the OFFtime is modulated as a function of the voltage at the VCC_CORE pin.
The output voltage is set by means of a 5-bit digital Voltage
Identification (VID) word (See Table 1). The VID code may be hardwired into the package of the processor which do not have a VID
code, the output voltage can be set by means of a DIP switch or
jumpers. For a low or '0' signal, connect the VID pin to ground (DIP
switch ON); for a high or '1' signal, leave the VID pin open (DIP
switch OFF).
The five VID pins on the LX166x series are designed to interface
directly with a Pentium Pro or Pentium II processor. Therefore, all
inputs are expected to be either ground or floating. Any floating
input will be pulled high by internal connections. If using a Socket
7 processor, or other load, the VID code can be set directly by
connecting jumpers or DIP switches to the VID[0:4] pins.
The VID pins are not designed to take TTL inputs, and
should not be connected high. Unpredictable output voltages
may result. If the LX166x devices are to be connected to a logic
circuit, such as BIOS, for programming of output voltage, they
should be buffered using a CMOS gate with open-drain, such as a
74HC125 or 74C906.
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IC OPERATION
ERROR VOLTAGE COMPARATOR
The error voltage comparator compares the voltage at the positive
side of the sense resistor to the set voltage plus 40mV. An external
filter is recommended for high-frequency noise.
CURRENT LIMIT
Current limiting is done by sensing the inductor current. Exceeding
the current sense threshold turns the output drive OFF and latches
it OFF until the PWM latch Set input goes high again. See Current
Limit Section in "Using The LX1664/65 Devices" later in this data
sheet.
OFF-TIME CONTROL TIMING
O
The timing capacitor CT allows programming of the OFF-time. The
timing capacitor is quickly charged during the ON time of the top
MOSFET and allowed to discharge when the top MOSFET is OFF.
In order to minimize frequency variations while providing different
supply voltages, the discharge current is modulated by the voltage
at the VCC_CORE pin. The OFF-time is inversely proportional to the
VCC_CORE voltage.
UNDER VOLTAGE LOCKOUT
The purpose of the UVLO is to keep the output drive off until the
input voltage reaches the start-up threshold. At voltages below the
start-up voltage, the UVLO comparator disables the internal biasing,
and turns off the output drives. The SS (Soft-Start) pin is pulled low.
SYNCHRONOUS CONTROL
POWER GOOD SIGNAL (LX1665 only)
An open collector output is provided which presents high impedance when the output voltage is between 90% and 117% of the
programmed VID voltage, measured at the SS pin. Outside this
window the output presents a low impedance path to ground. The
Power Good function also toggles low during OVP operation.
OVER-VOLTAGE PROTECTION
The controller is inherently protected from an over-voltage condition due to its constant OFF-time architecture. However, should a
failure occur at the power switch, an over-voltage drive pin is
provided (on the LX1665 only) which can drive an external SCR
crowbar (Q3), and so blow a fuse (F1). the fault condition must be
removed and power recycled for the LX1665 to resume normal
operation (See Figure 9).
LINEAR REGULATOR
The product highlight application shows an application schematic
using a MOSFET as the pass element for a linear regulator. this
output is suitable for converting the 5V system supply to 3.3V for
processor I/O buffers, memory, chipset and other components. The
output can be adjusted to any voltage between 1.5V and 3.6V in
order to supply other (lower) power requirements on a motherboard. See section "Using the LX1664/1665 Devices" at the end of
this data sheet.
The synchronous control section incorporates a unique breakbefore-make function to ensure that the primary switch and the
synchronous switch are not turned on at the same time. Approximately 100 nanoseconds of deadtime is provided by the breakbefore-make circuitry to protect the MOSFET switches.
8
Copyright © 1999
Rev. 1.3a 11/04
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
WITH
A T A
S
5-B IT DAC
H E E T
A P P L I C AT I O N I N F O R M AT I O N
12V
C3
0.1µF
C2
16
VC1
Q1
15
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2
SS
6.3V
1500µF x3
C5
1µF
U1
LX1664
1
5V
3
4
VID0
5
VID1
6
VID2
7
VID3
8
VID4
INV
TDRV
VCC_CORE
GND
VID0
BDRV
VID1
VCC
VID2
CT
VID3
LDRV
VID4
LFB
L1, 2.5µH
13
10
9
Supply Voltage
for CPU Core
VOUT
Q2
12
11
R1
2.5m9
IRL3102
14
IRL3303
C1
C8
680pF
6.3V, 1500µF x 3**
** Three capacitors for Pentium
Four capacitors for Pentium II
C9
330µF
16-pin
Narrow Body SOIC
Q4
IRLZ44
R5
Supply Voltage
For I/O Chipset or GTL+ Bus
C7
330µF
R6
FIGURE 6 — LX1664 In A Pentium / Socket 7 Single-Chip Power Supply Controller Solution (Synchronous)
12V
C3
0.1µF
U1
LX1664
1
O
2
SS
3
VID0
VID1
VID2
VID3
VID4
4
5
6
7
8
VC1
INV
TDRV
VCC_CORE
GND
VID0
BDRV
VID1
VCC
VID2
CT
VID3
LDRV
VID4
LFB
16-pin
Narrow Body SOIC
16
5V
6.3V
1500µF x3
C5
1µF
C2
15
14
13
Q1
IRL3102
D1
12
10
C8
680pF
Supply Voltage
for CPU Core
C1
11
9
R1
0.005
L1, 5µH
Q4
IRLZ44
R5
VOUT
6.3V, 1500µF x 3**
C9
330µF
** Three capacitors for Pentium
Four capacitors for Pentium II
Supply Voltage
For I/O Chipset or GTL+ Bus
C7
330µF
R6
FIGURE 7 — LX1664 In A Non-Synchronous / Socket 7 Power Supply Application
Copyright © 1999
Rev. 1.3a 11/04
9
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
D
R O D U C T I O N
WITH
A T A
S
5-B IT DAC
H E E T
A P P L I C AT I O N I N F O R M AT I O N
C3
0.1µF
1
SS
VC1
INV
TDRV
VCC_CORE
GND
VID0
BDRV
VID1
VCC
RS
C2
6.3V
1500µF x3
Q1
18
5V
IRL3102
17
Supply Voltage
for CPU Core
L1
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2
L2
1µH
C5
1µF
U1
LX1665
CS
F1 15A
12V
3
4
VID0
5
VID1
6
VID2
7
VID3
8
VID4
9
VID2
CT
VID3
OV
VID4
LDRV
LFB
PWRGD
16
5V or 3.3V
Supply
IRL3303
14
13
12
Q4
IRLZ44
R5
OV
PWRGD
** Three capacitors for Pentium
Four capacitors for Pentium II
C9
330µF
10
18-pin
Wide Body SOIC
C1
6.3V, 1500µF x 3
C8
680pF
11
VOUT
2.5µH
Q2
15
1.5V for
GTL+ Bus Supply
C7
330µF
R6
FIGURE 8 — VRM 8.2 (Pentium II / Deschutes) Reference Design With Loss-Less Current Sensing
1
2
INV
VID0
VID1
VID2
VID3
VID4
4
5
6
7
8
9
VC1
TDRV
VCC_CORE
GND
VID0
BDRV
VID1
VCC
O
3
SS
1µF
U1
LX1665
VID2
CT
VID3
OV
VID4
LDRV
LFB
PWRGD
18-pin
Wide-Body SOIC
C5
18
F1 20A
C10
0.1µF
R7
10
12V
5V
6.3V
1500µF x3
C2
Q1
IRL3303
17
R1
0.0025
L1 2.5µH
16
IRL3102
14
13
12
11
VOUT
Q2
15
C8
1500µF
Supply Voltage
for CPU Core
C9
330µF
Q3
SCR
2N6504
D4
1N5817
10
Q4
IRLZ44
R2, 10k
PWRGD
R5
C1
6.3V, 1500µF x 3**
C3
0.1µF
D3
1N4148
** Three capacitors for Pentium
Four capacitors for Pentium II
D2
1N4148
Supply Voltage
For I/O Chipset or GTL+ Bus
C7
330µF
R6
FIGURE 9 — Full-Featured Pentium II Processor Supply With 12V Power Input
10
Copyright © 1999
Rev. 1.3a 11/04
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
A T A
WITH
S
5-B IT DAC
H E E T
B I L L O F M AT E R I A L S
LX1665 Bill of Materials (Refer to Product Highlight)
Part Number / Manufacturer
Description
C1
C2
C7, C9
C3
C4
C8
C5
L1
L2
Q1
Q2
Q3
R5, R6
R1
U1
1500µF, 6.3V capacitor
1500µF, 6.3V capacitor
330µF, Electrolytic
0.1µF
390pF
680pF
1µF, 16V
2.5µH Inductor
1µH Inductor
MOSFET
MOSFET
MOSFET
Resistor (See Table 6 for values)
2.5mΩ Sense Resistor
Controller IC
MV-GX Sanyo
MV-GX Sanyo
MV-GX Sanyo
SMD Cap
SMD Cap
SMD Cap
SMD Ceramic
HM0096832 BI or equivalent
Qty.
4
2
2
1
1
1
1
1
1
1
1
1
2
1
1
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Ref
IRL3102 International Rectifier or equivalent
IRL3303 International Rectifier or equivalent
IRLZ44 International Rectifier or equivalent
SMD Resistor
IRC OARS-1 or PCB trace
LX1665CDW Linfinity
Total
21
USING THE LX1664/65 DEVICES
The LX1664/65 devices are very easy to design with, requiring
only a few simple calculations to implement a given design. The
following procedures and considerations should provide effective operation for virtually all applications. Refer to the Application Information section for component reference designators.
TIMING CAPACITOR SELECTION
O
The frequency of operation of the LX166x is a function of duty
cycle and OFF-time. The OFF-time is proportional to the timing
capacitor (which is shown as C8 in all application schematics in
this data sheet), and is modulated to minimize frequency
variations with duty cycle. The frequency is constant, during
steady-state operation, due to the modulation of the OFF-time.
The timing capacitor (CT) should be selected using the
following equation:
(1 - VOUT /VIN ) * IDIS
CT =
fS (1.52 - 0.29 * VOUT )
Where IDIS is fixed at 200µA and fS is the switching frequency
(recommended to be around 200kHz for optimal operation and
component selection).
Copyright © 1999
Rev. 1.3a 11/04
When using a 5V input voltage, the switching frequency (fS)
can be approximated as follows:
IDIS
CT = 0.621 *
f
S
Choosing a 680pF capacitor will result in an operating
frequency of 183kHz at VOUT = 2.8V. When a 12V power input
is used, he capacitor value must be changed (the optimal timing
capacitor for 12V input will be in the range of 1000-1500pF).
L1 OUTPUT INDUCTOR SELECTION
The inductance value chosen determines the ripple current
present at the output of the power supply. Size the inductance
to allow a nominal ±10% swing above and below the nominal DC
load current, using the equation L = VL * ∆T/∆I, where ∆T is the
OFF-time, VL is the voltage across the inductor during the OFFtime, and ∆I is peak-to-peak ripple current in the inductor. Be
sure to select a high-frequency core material which can handle
the DC current, such as 3C8, which is sized for the correct power
level. Typical inductance values can range from 2 to 10µH.
Note that ripple current will increase with a smaller inductor.
Exceeding the ripple current rating of the capacitors could cause
reliability problems.
11
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
A T A
WITH
S
5-B IT DAC
H E E T
USING THE LX1664/65 DEVICES
C1 FILTER CAPACITOR SELECTION (continued)
In order to cope with faster transient load changes, a smaller
output inductor is needed. However, reducing the size of the
output inductor will result in a higher ripple voltage on the input
supply. This noise on the 5V rail can affect other loads, such as
graphics cards. It is recommended that a smaller input inductor,
L2 (1 - 1.5µH), is used on the 5V rail to filter out the ripple. Ensure
that this inductor has the same current rating as the output
inductor.
aluminum electrolytic, and have demonstrated reliability. The
Oscon series from Sanyo generally provides the very best
performance in terms of long term ESR stability and general
reliability, but at a substantial cost penalty. The MV-GX series
provides excellent ESR performance, meeting all Intel transient
specifications, at a reasonable cost. Beware of off-brand, very-low
cost filter capacitors, which have been shown to degrade in both
ESR and general electrolyte characteristics over time.
C1 FILTER CAPACITOR SELECTION
CURRENT LIMIT
The capacitors on the output of the PWM section are used to filter
the output current ripple, as well as help during transient load
conditions, and the capacitor bank should be sized to meet ripple
and transient performance specifications.
When a transient (step) load current change occurs, the output
voltage will have a step which equals the product of the Effective
Series Resistance (ESR) of the capacitor and the current step (∆I).
when current increases from low (in sleep mode) to high, the
output voltage will drop below its steady state value. In the
advanced microprocessor power supply, the capacitor should
usually be selected on the basis of its ESR value, rather than the
capacitance or RMS current capability. Capacitors that satisfy the
ESR requirement usually have a larger capacitance and current
capability than needed for the application. The allowable ESR can
be found by:
Current limiting occurs when a sensed voltage, proportional to
load current, exceeds the current-sense comparator threshold
value. The current can be sensed either by using a fixed sense
resistor in series with the inductor to cause a voltage drop
proportional to current, or by using a resistor and capacitor in
parallel with the inductor to sense the voltage drop across the
parasitic resistance of the inductor.
The LX166x family offers two different comparator thresholds.
The LX1664 & 1665 have a threshold of 100mV, while the LX1664A
and LX1665A have a threshold of 60mV. The 60mV threshold is
better suited to higher current loads, such as a Pentium II or
Deschutes processor.
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INPUT INDUCTOR SELECTION
Sense Resistor
The current sense resistor, R1, is selected according to the formula:
ESR * (IRIPPLE + ∆I) < VEX
O
Where VEX is the allowable output voltage excursion in the
transient and IRIPPLE is the inductor ripple current. Regulators such
as the LX166x series, have adaptive output voltage positioning,
which adds 40mV to the DC set-point voltage — VEX is therefore
the difference between the low load voltage and the minimum
dynamic voltage allowed for the microprocessor.
Ripple current is a function of the output inductor value (LOUT),
and can be approximated as follows:
VIN - VOUT
VOUT
IRIPPLE =
*
fS * LOUT
VIN
Where fS is the switching frequency.
Electrolytic capacitors can be used for the output filter capacitor bank, but are less stable with age than tantalum capacitors. As
they age, their ESR degrades, reducing the system performance
and increasing the risk of failure. It is recommended that multiple
parallel capacitors are used so that, as ESR increases with age,
overall performance will still meet the processor's requirements.
There is frequently strong pressure to use the least expensive
components possible, however, this could lead to degraded longterm reliability, especially in the case of filter capacitors. Linfinity's
demo boards use Sanyo MV-GX filter capacitors, which are
12
R1 = VTRIP / ITRIP
Where VTRIP is the current sense comparator threshold (100mV
for LX1664/65 and 60mV for LX1664A/65A) and ITRIP is the desired
current limit. Typical choices are shown below.
TABLE 2 - Current Sense Resistor Selection Guide
Load
Pentium-Class Processor (<10A)
Pentium II Class (>10A)
Sense Resistor
Value
Recommended
Controller
5mΩ
2.5mΩ
LX1664 or LX1665
LX1664A or LX1665A
A smaller sense resistor will result in lower heat dissipation (I²R)
and also a smaller output voltage droop at higher currents.
There are several alternative types of sense resistor. The
surface-mount metal “staple” form of resistor has the advantage of
exposure to free air to dissipate heat and its value can be
controlled very tightly. Its main drawback, however, is cost. An
alternative is to construct the sense resistor using a copper PCB
trace. Although the resistance cannot be controlled as tightly, the
PCB trace is very low cost.
Copyright © 1999
Rev. 1.3a 11/04
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
A T A
WITH
S
5-B IT DAC
H E E T
USING THE LX1664/65 DEVICES
CURRENT LIMIT (continued)
CURRENT LIMIT (continued)
PCB Sense Resistor
A PCB sense resistor should be constructed as shown in Figure
10. By attaching directly to the large pads for the capacitor and
inductor, heat is dissipated efficiently by the larger copper masses.
Connect the current sense lines as shown to avoid any errors.
The current flowing through the inductor is a triangle wave. If the
sensor components are selected such that:
2.5m9
Sense Resistor
The voltage across the capacitor will be equal to the current
flowing through the resistor, i.e.
VCS = ILRL
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100mil Wide, 850mil Long
2.5mm x 22mm (2 oz/ft2 copper)
L/RL = RS * CS
Inductor
Since VCS reflects the inductor current, by selecting the
appropriate RS and CS, VCS can be made to reach the comparator
voltage (60mV for LX166xA or 100mV for the LX166x) at the
desired trip current.
Design Example
(Pentium II circuit, with a maximum static current of 14.2A)
The gain of the sensor can be characterized as:
Output
Capacitor Pad
|T(j M )|
Sense Lines
FIGURE 10 — Sense Resistor Construction Diagram
Recommended sense resistor sizes are given in the following
table:
RL
L/RSCS
TABLE 3 - PCB Sense Resistor Selection Guide
Copper
Weight
2 oz/ft2
Copper Desired Resistor
Thickness
Value
68µm
Dimensions (w x l)
mm
inches
2.5mΩ
2.5 x 22
0.1 x 0.85
5mΩ
2.5 x 43
0.1 x 1.7
O
Loss-Less Current Sensing Using Resistance of Inductor
Any inductor has a parasitic resistance, RL, which causes a DC
voltage drop when current flows through the inductor. Figure 11
shows a sensor circuit comprising of a surface mount resistor, RS,
and capacitor, CS, in parallel with the inductor, eliminating the
current sense resistor.
L
RS
Current
Sense
Comparator
VCS
RL
Load
CS
RS2
FIGURE 11 — Current Sense Circuit
Copyright © 1999
Rev. 1.3a 11/04
1/RSCS
RL/L
M
FIGURE 12 — Sensor Gain
The dc/static tripping current Itrip,S satisfies:
Vtrip
Itrip,S =
RL
Select L/RSCS ≤ RL to have higher dynamic tripping current
than the static one. The dynamic tripping current Itrip,d satisfies:
Vtrip
Itrip,d =
L/(RSCS)
General Guidelines for Selecting RS , CS , and RL
Vtrip
RL = I
Select: RS ≤ 10 kΩ
trip,S
Ln
and CS according to:
CS n = R R
L S
The above equation has taken into account the current-dependency of the inductance.
The test circuit (Figure 6) used the following parameters:
RL = 3mΩ, RS = 9kΩ, CS = 0.1µF, and L is 2.5µH at 0A current.
13
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
A T A
WITH
S
5-B IT DAC
H E E T
USING THE LX1664/65 DEVICES
CURRENT LIMIT (continued)
FET SELECTION (continued)
In cases where RL is so large that the trip point current would
be lower than the desired short-circuit current limit, a resistor (RS2)
can be put in parallel with CS, as shown in Figure 11. The selection
of components is as follows:
RL (Required)
RS2
=
RL (Actual)
RS2 + RS
For the IRL3102 (13mΩ RDS(ON)), converting 5V to 2.8V at 14A
will result in typical heat dissipation of 1.48W.
L
RL (Actual) *
RS + RS2
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L
Synchronous Rectification – Lower MOSFET
The lower pass element can be either a MOSFET or a Schottky
diode. The use of a MOSFET (synchronous rectification) will result
in higher efficiency, but at higher cost than using a Schottky diode
(non-synchronous).
Power dissipated in the bottom MOSFET will be:
CS =
RL (Actual) * (RS2 // RS)
=
RS2 * RS
PD = I2 * RDS(ON) * [1 - Duty Cycle] = 2.24W
[IRL3303 or 1.12W for the IRL3102]
Again, select (RS2//RS) < 10kΩ.
FET SELECTION
To insure reliable operation, the operating junction temperature
of the FET switches must be kept below certain limits. The Intel
specification states that 115°C maximum junction temperature
should be maintained with an ambient of 50°C. This is achieved
by properly derating the part, and by adequate heat sinking. One
of the most critical parameters for FET selection is the RDS ON
resistance. This parameter directly contributes to the power
dissipation of the FET devices, and thus impacts heat sink design,
mechanical layout, and reliability. In general, the larger the
current handling capability of the FET, the lower the RDS ON will
be, since more die area is available.
TABLE 4 - FET Selection Guide
This table gives selection of suitable FETs from International Rectifier.
RDS(ON) @
Ω)
10V (mΩ
ID @
TC = 100°C
Max. Breakdown Voltage
IRL3803
IRL22203N
IRL3103
IRL3102
IRL3303
IRL2703
6
7
14
13
26
40
83
71
40
56
24
17
30
30
30
20
30
30
O
Device
All devices in TO-220 package. For surface mount devices (TO-263 /
D2-Pak), add 'S' to part number, e.g. IRL3103S.
The recommended solution is to use IRL3102 for the high side
and IRL3303 for the low side FET, for the best combination of cost
and performance. Alternative FET’s from any manufacturer could
be used, provided they meet the same criteria for RDS(ON).
Heat Dissipated In Upper MOSFET
The heat dissipated in the top MOSFET will be:
PD = (I2 * RDS(ON) * Duty Cycle) + (0.51 * VIN * tSW * fS )
Catch Diode – Lower MOSFET
A low-power Schottky diode, such as a 1N5817, is recommended
to be connected between the gate and source of the lower
MOSFET when operating from a 12V-power supply (see Figure 9).
This will help protect the controller IC against latch-up due to the
inductor voltage going negative. Although latch-up is unlikely, the
use of such a catch diode will improve reliability and is highly
recommended.
Non-Synchronous Operation - Schottky Diode
A typical Schottky diode, with a forward drop of 0.6V will dissipate
0.6 * 14 * [1 – 2.8/5] = 3.7W (compared to the 1.1 to 2.2W dissipated
by a MOSFET under the same conditions). This power loss
becomes much more significant at lower duty cycles – synchronous rectification is recommended especially when a 12V-power
input is used. The use of a dual Schottky diode in a single TO-220
package (e.g. the MBR2535) helps improve thermal dissipation.
MOSFET GATE BIAS
The power MOSFETs can be biased by one of two methods:
charge pump or 12V supply connected to VC1.
1) Charge Pump (Bootstrap)
When 12V is supplied to the drain of the MOSFET, as in
Figure 9, the gate drive needs to be higher than 12V in order
to turn the MOSFET on. Capacitor C10 and diodes D2 & D3
are used as a charge pump voltage doubling circuit to raise
the voltage of VC1 so that the TDRV pin always provides a
high enough voltage to turn on Q1. The 12V supply must
always be connected to VCC to provide power for the IC
itself, as well as gate drive for the bottom MOSFET.
2) 12V Supply
When 5V is supplied to the drain of Q1, a 12V supply should
be connected to both VCC and VC1.
Where tSW is switching transition line for body diode (~100ns)
and fS is the switching frequency.
14
Copyright © 1999
Rev. 1.3a 11/04
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
WITH
A T A
S
5-B IT DAC
H E E T
USING THE LX1664/65 DEVICES
LINEAR REGULATOR
LINEAR REGULATOR (continued)
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Referring to the front page Product Highlight, a schematic is
presented which uses a MOSFET as a series pass element for a
linear regulator. The MOSFET is driven by the LX1664 controller,
and down-converts a +5V or +3.3V supply to the desired VOUT
level, between 1.5 & 3.5V, as determined by the feedback
resistors.
The current available from the Linear regulator is dictated by
the supply capability, as well as the MOSFET ratings, and will
typically lie in the 3-5 ampere range. This output is well suited
for I/O buffers, memory, chipset and other components. Using
3.3V supply to convert to 1.5V for GTL+ Bus will significantly
reduce heat dissipation in the MOSFET.
MOSFET Comments
Heatsinking the MOSFET becomes important, since the linear
stage output current could approach 5 amperes in some applications. Since there are no switching losses, power dissipation in
the MOSFET is simply defined by PD = (VIN - VOUT) * I output
current. This means that a +5VIN to +3.3VOUT at 5A will require that
the MOSFET dissipate (5-3.3) * 5 = 8.5 watts. This amount of
power in a MOSFET calls for a heatsink, which will be the same
physical size as that required for a monolithic LDO, such as the
LX8384 device.
The dropout voltage for the linear regulator stage is the product
of RDS ON * IOUT. Using a 2SK1388 device at 5A, the dropout
voltage will be (worst case) 37 milliohms x 5A = 185mV.
Note that the RDS ON of the (linear regulator) MOSFET does not
affect heat dissipation, only dropout voltage. For reasons of
economy, a FET with a higher resistance can be chosen for the
linear regulator, e.g. 2SK1388 or IRLZ44.
TABLE 5 - Linear Regulator MOSFET Selection Guide
RDS(ON) @
Ω)
10V (mΩ
ID @
TC = 100°C
Max. Breakdown Voltage
IRFZ24N
IRL2703
IRLZ44N
70
40
22
12
17
29
55
30
55
O
Device
Avoiding Crosstalk
To avoid a load transient on the switching output affecting the
linear regulator, follow these guidelines:
FIGURE 13 — Typical Transient Response
Channel 2 = Linear Regulator Output.
Set point = 3.3V @ 2A (20mV/div.)
Channel 4 = Switching Regulator Output.
VCC_CORE set point = 2.8V
Channel 3 = Switching Regulator Load Current
Transient 0 - 13A
Output Voltage Setting
As shown in Application Information Figures 6-9, two resistors (R5
& R6) set the linear regulator stage output voltage:
VOUT = 1.5 * (R5 + R6) / R6
As an example, to set resistor magnitudes, assume a desired
VOUT of 3.3 volts:
1.5 * (12.1k + 10k) / 10k = 3.3 volts (approximately)
In general, the divider resistor values should be in the vicinity
of 10-12k ohm for optimal noise performance. Please refer to
Table 6.
1) Separate 5V supply traces to switching & linear FETs as
much as possible.
2) Place capacitor C9 as close to drain of Q4 as possible.
Typical transient response is shown in Figure 13.
Copyright © 1999
Rev. 1.3a 11/04
15
PRODUCT DATABOOK 1996/1997
LX1664/64A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
A T A
WITH
S
5-B IT DAC
H E E T
USING THE LX1664/65 DEVICES
LINEAR REGULATOR (continued)
LAYOUT GUIDELINES - THERMAL DESIGN
TABLE 6 Resistors Settings for Linear Regulator Output Voltage
Ω)
R5 (kΩ
Ω)
R6 (kΩ
VOUT (V)
3.3
3.2
3.1
3.0
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
12
11.3
11.3
11
10.3
10
10
10
9.76
8.87
8.87
8.87
8.87
8.87
8.87
7.15
7.15
7.15
7.15
10
10
10.7
11
11
11.5
12.4
13.7
14.7
14.7
16.5
18.7
22.1
26.7
21
35.7
53.6
100
∞
3.30
3.20
3.08
3.00
2.90
2.80
2.71
2.59
2.50
2.41
2.31
2.21
2.10
2.00
2.13
1.80
1.70
1.61
1.50
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Nominal
Set Point (V)
A great deal of time and effort were spent optimizing the thermal
design of the demo boards. Any user who intends to implement
an embedded motherboard would be well advised to carefully
read and follow these guidelines. If the FET switches have been
carefully selected, external heatsinking is generally not required.
However, this means that copper trace on the PC board must now
be used. This is a potential trouble spot; as much copper area as
possible must be dedicated to heatsinking the FET switches, and
the diode as well if a non-synchronous solution is used.
In our VRM module, heatsink area was taken from internal
ground and VCC planes which were actually split and connected
with VIAS to the power device tabs. The TO-220 and TO-263
cases are well suited for this application, and are the preferred
packages. Remember to remove any conformal coating from all
exposed PC traces which are involved in heatsinking.
Capacitor Selection
Referring to the Product Highlight schematic on the front page, the
standard value to use as the linear regulator stage output capacitor
is on the order of 330µF. This provides sufficient hold-up for all
expected transient load events in memory and I/O circuitry.
Disabling Linear Output
Linear regulator output can be disabled by pulling feedback pin
(LFB) up to 5V as shown in Figure 14.
TABLE 7 - Linear Enable (LIN EN) Function Table
LIN EN
LIN OUTPUT
H
L
Disabled
Enabled
O
5V
General Notes
As always, be sure to provide local capacitive decoupling close to
the chip. Be sure use ground plane construction for all highfrequency work. Use low ESR capacitors where justified, but be
alert for damping and ringing problems. High-frequency designs
demand careful routing and layout, and may require several
iterations to achieve desired performance levels.
Power Traces
To reduce power losses due to ohmic resistance, careful consideration should be given to the layout of traces that carry high
currents. The main paths to consider are:
■ Input power from 5V supply to drain of top MOSFET.
■ Trace between top MOSFET and lower MOSFET or Schottky
diode.
■ Trace between lower MOSFET or Schottky diode and
ground.
■ Trace between source of top MOSFET and inductor, sense
resistor and load.
Input
5V or 12V
LX1664
LDRV
LFB
10
C10
0.1µF
9
R5
10k
10k
C9
330µF
Q4
IRLZ44
Supply Voltage
For I/O Chipset
C7
330µF
LX166x
Output
R6
LIN EN
2N2222
FIGURE 14 — Enabling Linear Regulator
16
FIGURE 15 — Power Traces
Copyright © 1999
Rev. 1.3a 11/04
PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
D UAL O UTPUT PWM C ONTROLLERS
P
R O D U C T I O N
D
A T A
WITH
S
5-B IT DAC
H E E T
USING THE LX1664/65 DEVICES
LAYOUT GUIDELINES - THERMAL DESIGN (continued)
All of these traces should be made as wide and thick as
possible, in order to minimize resistance and hence power losses.
It is also recommended that, whenever possible, the ground, input
and output power signals should be on separate planes (PCB
layers). See Figure 15 – bold traces are power traces.
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C5 Input Decoupling (VCC) Capacitor
Ensure that this 1µF capacitor is placed as close to the IC as
possible to minimize the effects of noise on the device.
Layout Assistance
Please contact Linfinity’s Applications Engineers for assistance
with any layout or component selection issues. A Gerber file
with layout for the most popular devices is available upon request.
Evaluation boards are also available upon request. Please
check Linfinity's web site for further application notes.
R E L AT E D D E V I C E S
O
LX1662/1663 - Single Output PWM Controllers
LX1553 - PWM Controller for 5V - 3.3V Conversion
LX1668 - Triple Output PWM Controller
Pentium is a registered trademark of Intel Corporation.
Cyrix is a registered trademark and 6x86 and Gx86 are trademarks of Cyrix Corporation. K6 is a trademark of AMD.
Power PC is a trademark of International Business Machines Corporation. Alpha is a trademark of Digital Equipment Corporation.
PRODUCTION DATA - Information contained in this document is proprietary to LinFinity, and is current as of publication date. This document
may not be modified in any way without the express written consent of LinFinity. Product processing does not necessarily include testing of
all parameters. Linfinity reserves the right to change the configuration and performance of the product and to discontinue product at any time.
Copyright © 1999
Rev. 1.3a 11/04
17