IRF IRFIZ24V

PD - 94102
IRFIZ24V
Advanced Process Technology
Ultra Low On-Resistance
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
l Fully Avalanche Rated
l Optimized for SMPS Applications
Description
l
HEXFET® Power MOSFET
l
D
VDSS = 60V
RDS(on) = 0.060Ω
G
Advanced HEXFET ® Power MOSFETs from
International Rectifier utilize advanced processing
techniques to achieve extremely low on-resistance
per silicon area. This benefit, combined with the fast
switching speed and ruggedized device design that
HEXFET power MOSFETs are well known for, provides
the designer with an extremely efficient and reliable
device for use in a wide variety of applications.
ID = 14A
S
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial
applications. The moulding compound used provides
a high isolation capability and a low thermal resistance
between the tab and external heatsink. This isolation
is equivalent to using a 100 micron mica barrier with
standard TO-220 product. The Fullpak is mounted to
a heatsink using a single clip or by a single screw
fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current 
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ƒ
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
Max.
Units
14
10
68
26
0.18
± 20
17
4.4
4.2
-55 to + 175
A
W
W/°C
V
A
mJ
V/ns
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
RθJC
RθJA
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Junction-to-Case
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
5.7
62
°C/W
1
03/12/01
IRFIZ24V
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance
Qg
Q gs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min.
60
–––
–––
2.0
7.8
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.06
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
7.6
46
21
24
IDSS
Drain-to-Source Leakage Current
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
EAS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Single Pulse Avalanche Energy ‚
–––
–––
–––
–––
590
140
23
140…
V(BR)DSS
∆V(BR)DSS/∆TJ
IGSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = 250µA
––– V/°C Reference to 25°C, ID = 1mA
60
mΩ VGS = 10V, ID = 10A „
4.0
V
VDS = VGS, ID = 250µA
–––
S
VDS = 25V, ID = 10A„
25
VDS = 60V, VGS = 0V
µA
250
VDS = 48V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
23
ID = 17A ‡
7.7
nC
VDS = 48V
6.2
VGS = 10V, See Fig. 6 and 13
–––
VDD = 30V
–––
ID = 17A ‡
ns
–––
RG = 18Ω
–––
VGS = 10V, See Fig. 10 „
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
–––
VGS = 0V
–––
VDS = 25V
–––
pF
ƒ = 1.0MHz, See Fig. 5
43†
mJ IAS = 17A ‡, L = 300µH
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
14
––– –––
showing the
A
G
integral reverse
68
––– –––
S
p-n junction diode.
––– ––– 1.3
V
TJ = 25°C, IS = 17A ‡, VGS = 0V „
–––
53
79
ns
TJ = 25°C, IF = 17A ‡
––– 90 130
nC di/dt = 100A/µs „
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
‚ Starting TJ = 25°C, L = 300µH
RG = 25Ω, IAS = 14A. (See Figure 12)
ƒ ISD ≤ 14A, di/dt ≤ 240A/µs, VDD ≤ V(BR)DSS,
„ Pulse width ≤ 400µs; duty cycle ≤ 2%.
… This is a typical value at device destruction and represents
operation outside rated limits.
† This is a calculated value limited to TJ = 175°C .
‡ ID = 17A is copied from TO-220 device.
TJ ≤ 175°C
2
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IRFIZ24V
100
100
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
10
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
4.5V
1
20µs PULSE WIDTH
TJ = 25 °C
0.1
0.1
1
10
10
4.5V
100
Fig 1. Typical Output Characteristics
TJ = 25 ° C
RDS(on) , Drain-to-Source On Resistance
(Normalized)
I D , Drain-to-Source Current (A)
3.0
TJ = 175 ° C
10
V DS = 25V
20µs PULSE WIDTH
6
8
10
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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10
100
Fig 2. Typical Output Characteristics
100
4
1
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
1
20µs PULSE WIDTH
TJ = 175 °C
1
0.1
12
ID = 17A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 10V
0
20 40 60 80 100 120 140 160 180
TJ , Junction Temperature ( °C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFIZ24V
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
C, Capacitance(pF)
800
Coss = Cds + Cgd
Ciss
600
Coss
400
200
Crss
VGS , Gate-to-Source Voltage (V)
20
1000
0
ID = 17A
VDS = 48V
VDS = 30V
VDS = 12V
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
1
10
100
0
12
16
20
24
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
100
1000
OPERATION IN THIS AREA
LIMITED BY R DS (on)
TJ = 175 ° C
ID, Drain-to-Source Current (A)
ISD , Reverse Drain Current (A)
8
Q G , Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
100
10
1
TJ = 25 ° C
0.1
0.2
V GS = 0 V
0.6
1.0
1.4
VSD ,Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
4
1.8
10
100µsec
1msec
1
10msec
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1
10
100
1000
VDS , Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFIZ24V
15
RD
VDS
VGS
ID , Drain Current (A)
12
D.U.T.
RG
+
-VDD
9
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
6
Fig 10a. Switching Time Test Circuit
3
VDS
90%
0
25
50
75
100
125
150
175
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
10
D = 0.50
0.20
1
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
PDM
0.1
t1
t2
0.01
0.00001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x ZthJC + TC
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFIZ24V
80
L
VD S
D R IV E R
D .U .T
RG
+
- VD D
IA S
20V
0 .01 Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V (B R )D SS
tp
A
EAS , Single Pulse Avalanche Energy (mJ)
1 5V
ID
6.9A
12A
17A
TOP
BOTTOM
60
40
20
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature ( °C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
VGS
QGS
D.U.T.
QGD
+
V
- DS
VGS
VG
3mA
IG
Charge
Fig 13a. Basic Gate Charge Waveform
6
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFIZ24V
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T*
ƒ
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
‚
-
-
„
+

• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
RG
VGS
*
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
D=
P.W.
Period
[VGS=10V ] ***
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
[VDD]
Forward Drop
Inductor Curent
Ripple ≤ 5%
[ ISD ]
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For N-channel HEXFET® power MOSFETs
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7
IRFIZ24V
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
1 0 .6 0 (.4 1 7 )
1 0 .4 0 (.4 0 9 )
ø
3 .4 0 (.1 3 3 )
3 .1 0 (.1 2 3 )
4 .8 0 ( .1 89 )
4 .6 0 ( .1 81 )
-A 3 .7 0 (.14 5 )
3 .2 0 (.12 6 )
1 6 .0 0 (.6 3 0 )
1 5 .8 0 (.6 2 2 )
2 .80 (.1 10 )
2 .60 (.1 02 )
L E A D A S S IG N M E N T S
1 - G A TE
2 - D R A IN
3 - S O U RC E
7 .1 0 (.2 8 0 )
6 .7 0 (.2 6 3 )
1 .1 5 (.0 4 5)
M IN.
NO T E S :
1 D IME N S IO N ING & T O L E R A N C ING
P E R A N S I Y 1 4 .5 M , 1 9 8 2
1
2
3
2 C O N TR O L L ING D IM E N S IO N: IN C H .
3.3 0 (.13 0 )
3.1 0 (.12 2 )
-B -
1 3 .7 0 (.5 4 0 )
1 3 .5 0 (.5 3 0 )
C
A
1 .4 0 (.0 5 5)
3X
1 .0 5 (.0 4 2)
0 .9 0 (.0 3 5 )
3X 0 .7 0 (.0 2 8 )
0 .2 5 (.0 1 0)
3X
M
A M
B
2 .54 (.1 0 0)
2X
0 .4 8 (.0 1 9 )
0 .4 4 (.0 1 7 )
2 .85 (.1 1 2 )
2 .65 (.1 0 4 )
D
B
M IN IM U M C R E E P A G E
D IS T A NC E B E T W E E N
A -B -C -D = 4.8 0 (.1 89 )
Part Marking Information
TO-220 Fullpak
E X AM P LE : TH IS IS A N IRF I8 40G
W ITH A S S E M B LY
LO T CO D E E 40 1
A
INT E RN A TIO N A L
R E CT IF IE R
LO G O
P A RT NU M B ER
IR FI8 40G
E 40 1 92 45
A S S E M B LY
L O T CO D E
DA T E CO D E
(YYW W )
YY = YE A R
W W = W EEK
Data and specifications subject to change without notice.
This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.3/01
8
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