DM74LS122 Retriggerable One-Shot with Clear and Complementary Outputs Y General Description Y The DM74LS122 is a retriggerable monostable multivibrator featuring both positive and negative edge triggering with complementary outputs. An internal 10 kX timing resistor is provided for design convenience minimizing component count and layout problems. This device can be used with a single external capacitor. The ’LS122 has two active-low transition triggering inputs (A), two active-high transition triggering inputs (B), and a CLEAR input that terminates the output pulse width at a predetermined time independent of the timing components. The clear (CLR) input also serves as a trigger input when it is pulsed with a low level pulse transition (ß). To obtain optimum and trouble free operation please read operating rules and NSC one-shot application notes carefully and observe recommendations. Y Y Y Y Retriggerable to 100% duty cycle Over-riding clear terminates output pulse Internal 10 kX timing resistor TTL, DTL compatible Compensated for VCC and temperature variations Input clamp diodes Functional Description The basic output pulse width is determined by selection of the internal resistor RINT or an external resistor (RX) and capacitor (CX). Once triggered, the output pulse width may be extended by retriggering the gated active-low (A) transition inputs or the active-high transition (B) inputs or the CLEAR input. The output pulse width can be reduced or terminated by overriding it with the active-low CLEAR input. Features Y DC triggered from active-high transition or active-low transition inputs Connection Diagram Function Table Dual-In-Line Package Inputs TL/F/6385 – 1 Order Number DM74LS122M or DM74LS122N See NS Package Number M14A or N14A Outputs CLEAR A1 A2 B1 B2 Q Q L X X X H H H H H H H X H X X L L X X H X H X X X X L L X X L X u X X X L H H u v v u u L X L L L L É É É É É É É É É H H H H ß ß ß ß ß ß ß ß ß v v H X L u H H H H H H H u H H H H H H e High Logic Level L e Low Logic Level X e Can Be Either Low or High u e Positive Going Transition v e Negative Going Transition É e A Positive Pulse ß e A Negative Pulse C1995 National Semiconductor Corporation TL/F/6385 RRD-B30M105/Printed in U. S. A. DM74LS122 Retriggerable One-Shot with Clear and Complementary Outputs May 1989 Absolute Maximum Ratings (Note) Note: The ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the ‘‘Electrical Characteristics’’ table are not guaranteed at the absolute maximum ratings. The ‘‘Recommended Operating Conditions’’ table will define the conditions for actual device operation. If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage Input Voltage Operating Free Air Temperature Range DM74LS 7V 7V 0§ C to a 70§ C b 65§ C to a 150§ C Storage Temperature Recommended Operating Conditions Symbol Parameters VCC Supply Voltage VIH High Level Input Voltage VIL Low Level Input Voltage IOH High Level Output Current IOL Low Level Output Current tW Pulse Width (Note 6) A or B High External Timing Resistor CEXT External Timing Capacitance CWIRE Wiring Capacitance at REXT/CEXT Terminal TA Free Air Operating Temperature Symbol Parameter Nom Max Units 5 5.25 V 2 REXT Electrical Characteristics Min 4.75 V 0.8 V b 0.4 mA 8 mA 40 A or B Low 40 Clear Low 40 ns 5 260 kX No Restriction 0 mF 50 pF 70 §C over recommended operating free air temperature range (unless otherwise noted) Conditions Min Typ (Note 1) Max Units b 1.5 V VI Input Clamp Voltage VCC e Min, I e b18 mA VOH High Level Output Voltage VCC e Min, IOH e Max VIL e Max, VIH e Min VOL Low Level Output Voltage VCC e Min, IOL e Max VIL e Max, VIH e Min 0.35 0.5 IOL e 4 mA, VCC e Min 0.25 0.4 2.7 3.4 V V II Input Current @ Max Input Voltage VCC e Max, VI e 7V IIH High Level Input Current VCC e Max, VI e 2.7V 20 mA IIL Low Level Input Current VCC e Max, VI e 0.4V b 0.4 mA IOS Short Circuit Output Current VCC e Max (Note 2) b 100 mA ICC Supply Current VCC e Max (Notes 3, 4 and 5) 11 mA 0.1 b 20 2 6 mA Switching Characteristics at VCC e 5V and TA e 25§ C (See Section 1 for Test Waveforms and Output Load) RL e 2 kX Symbol Parameter From (Input) To (Output) CL e 15 pF CEXT e 0 pF, REXT e 5 kX Min tPLH Propagation Delay Time Low to High Level Output A to Q tPLH Propagation Delay Time Low to High Level Output B to Q tPHL Propagation Delay Time High to Low Level Output A to Q tPHL Propagation Delay Time High to Low Level Output B to Q tPLH Propagation Delay Time Low to High Level Output Clear to Q tPHL Propagation Delay Time High to Low Level Output Clear to Q tWQ(Min) Minimum Width of Pulse at Output Q A or B to Q tW(out) Output Pulse Width A or B to Q CL e 15 pF CEXT e 1000 pF, REXT e 10 kX Max Min Units Max 33 ns 44 ns 45 ns 56 ns 45 ns 27 ns 200 ns 4 5 ms Note 1: All typicals are at VCC e 5V, TA e 25§ C. Note 2: Not more than one output should be shorted at a time, and the duration should not exceed one second. Note 3: Quiescent ICC is measured (after clearing) with 2.4V applied to all clear and A inputs, B inputs grounded, all outputs open, CEXT e 0.02 mF, and REXT e 25 kX. Note 4: ICC is measured in the triggered state with 2.4V applied to all clear and B inputs, A inputs grounded, all outputs open, CEXT e 0.02 mF, and REXT e 25 kX. Note 5: With all outputs open and 4.5V applied to all data and clear inputs, ICC is measured after a momentary ground, then 4.5V is applied to the clock. Note 6: TA e 25§ C and VCC e 5V. Operating Rules 1. To use the internal 10 kX timing resistor, connect the RINT pin to VCC. 2. An external resistor (RX) or the internal resistor (10 kX) and an external capacitor (CX) are required for proper operation. The value of CX may vary from 0 to any necessary value. For small time constants use high-quality mica, glass, polypropylene, polycarbonate, or polystyrene capacitors. For large time constants use solid tantalum or special aluminum capacitors. If the timing capacitors have leakages approaching 100 nA or if stray capacitance from either terminal to ground is greater than 50 pF the timing equations may not represent the pulse width the device generates. 3. The pulse width is essentially determined by external timing components RX and CX. For CX k 1000 pF see Figure 1; design curves on TW as function of timing components value. For CX ll 1000 pF the output is defined as: TW e KRXCX where [RX is in kX] [CX is in pF] [TW is in ns] K & 0.37 TL/F/6385 – 2 FIGURE 1 3 Operating Rules (Continued) The K factor is not a constant, but, varies with CX. See Figure 2 . TL/F/6385 – 6 FIGURE 5 TL/F/6385 – 3 FIGURE 2 4. The switching diode required for most TTL one-shots when using an electrolytic timing capacitor is not needed for the ’LS122 and should not be used. 5. To obtain variable pulse width by remote trimming, the following circuit is recommended: TL/F/6385 – 4 TL/F/6385 – 7 Note: ‘‘Rremote’’ should be as close to the device pins as possible. FIGURE 3 FIGURE 6 6. The retriggerable pulse width is calculated as shown below: T e TW a tPLH e 0.50 c RX c CX a TPLH The retriggered pulse width is equal to the pulse width plus a delay time period (Figure 4). 8. Under any operating condition CX and RX must be kept as close to the one-shot device pins as possible to minimize stray capacitance, to reduce noise pick-up, and to reduce I-R and Ldi/dt voltage developed along their connecting paths. If the lead length from CX to pins (13) and (11) is greater than 3 cm, for example, the output pulse width might be quite different from values predicted from the appropriate equations. A non-inductive and low capacitive path is necessary to ensure complete discharge of CX in each cycle of its operation so that the output pulse width will be accurate. 9. VCC and ground wiring should conform to good high-frequency standards and practices so that switching transients on the VCC and ground return leads do not cause interaction between one-shots. A 0.01 mF to 0.10 mF bypass capacitor (disk ceramic or monolithic type) from VCC to ground is necessary on each device. Furthermore, the bypass capacitor should be located as close to the VCC pin as space permits. TL/F/6385 – 5 FIGURE 4 7. Output pulse width variation versus VCC and operation temperatures: Figure 5 depicts the relationship between pulse width variation versus VCC; and Figure 6 depicts pulse width variation versus temperatures. *For further detailed device characteristics and output performance please refer to the NSC one-shot application note AN-366. 4 Physical Dimensions inches (millimeters) 14-Lead Small Outline Molded Package (M) Order Number DM74LS122M NS Package Number M14A 5 DM74LS122 Retriggerable One-Shot with Clear and Complementary Outputs Physical Dimensions inches (millimeters) (Continued) 14-Lead Molded Dual-In-Line Package (N) Order Number DM74LS122N NS Package Number N14A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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