PHILIPS 74F273A

INTEGRATED CIRCUITS
74F273A
Octal D flip-flop
Product specification
IC15 Data Handbook
1996 Mar 12
Philips Semiconductors
Product specification
Octal D flip–flop
74F273A
All outputs will be forced Low independently of Clock or Data inputs
by a Low voltage level on the MR input. The device is useful for
applications where the true output only is required and the CP and
MR are common to all elements.
FEATURES
• High impedance inputs for reduced loading
(20µA in Low and High states)
• Ideal buffer for MOS microprocessor or memory
• Eight edge–triggered D–type flip–flops
• Buffered common clock
• Buffered asynchronous Master Reset
• See 74F377A for clock enable version
• See 74F373 for transparent latch version
• See 74F374 for 3–State version
TYPE
TYPICAL
fMAX
TYPICAL SUPPLY CURRENT
(TOTAL)
74F273A
170MHz
25mA
ORDERING INFORMATION
PACKAGES
COMMERCIAL RANGE
VCC = 5V±10%;
Tamb = 0°C to +70°C
PKG. DWG. #
20–pin plastic DIP
74F273AN
SOT146-1
20–pin plastic SOL
74F273AD
SOT163-1
DESCRIPTION
The 74F273 has eight edge–triggered D–type flip–flops with
individual D inputs and Q outputs. The common buffered Clock (CP)
and Master Reset (MR) inputs load and reset (clear) all flip–flops
simultaneously.
The register is fully edge–triggered. The state of each D input, one
setup time before the Low–to–High clock transition, is transferred to
the corresponding flip–flop’s Q output.
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
Data inputs
1.0/0.033
20µA/20µA
MR
Master Reset input (active–Low)
1.0/0.033
20µA/20µA
CP
Clock pulse input (active rising edge)
1.0/0.033
20µA/20µA
50/33
1.0mA/20mA
PINS
DESCRIPTION
D0 – D7
Q0 – Q7
Data outputs
PIN CONFIGURATION
LOGIC SYMBOL
MR
1
20
VCC
Q0
2
19
Q7
D0
3
18
D7
D1
4
17
D6
Q1
5
16
Q6
11
CP
Q2
6
15
Q5
1
MR
D2
7
14
D5
D3
8
13
D4
Q3
9
12
Q4
11
CP
GND 10
SF00346
1996 Mar 12
VCC = Pin 20
GND = Pin 10
2
3
4
7
8
13
14
17
18
D0
D1
D2
D3
D4
D5
D6
D7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
2
5
6
9
12
15
16
19
SF00347
853–0066 16555
Philips Semiconductors
Product specification
Octal D flip–flop
74F273A
LOGIC SYMBOL (IEEE/IEC)
1
R
11
C1
3
2
1D
4
5
7
6
8
9
13
12
14
15
17
16
18
19
SF00348
LOGIC DIAGRAM
D0
D1
D2
4
3
D3
7
D4
8
D5
13
D6
14
D7
17
18
11
CP
D
Q
D
CP
Q
D
CP
Q
D
CP
RD
RD
Q
D
CP
RD
Q
D
CP
RD
Q
CP
RD
Q
D
D
CP
RD
Q
CP
RD
RD
1
MR
VCC = Pin 20
GND = Pin 10
2
5
Q0
Q1
6
9
Q2
12
Q3
Q4
15
Q5
16
Q6
19
Q7
SF00349
FUNCTION TABLE
INPUTS
H
h
L
l
X
↑
=
=
=
=
=
=
OUTPUTS
OPERATING
MODE
MR
CP
Dn
Q0 – Q7
L
X
X
L
Reset (clear)
H
↑
h
H
Load ”1”
H
↑
l
L
Load ”0”
High voltage level
High voltage level one set–up time prior to the Low–to–High clock transition
Low voltage level
Low voltage level one set–up time prior to the Low–to–High clock transition
Don’t care
Low–to–High clock transition
1996 Mar 12
3
Philips Semiconductors
Product specification
Octal D flip–flop
74F273A
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)
SYMBOL
PARAMETER
RATING
UNIT
VCC
Supply voltage
–0.5 to +7.0
V
VIN
Input voltage
–0.5 to +7.0
V
IIN
Input current
–30 to +5
mA
VOUT
Voltage applied to output in High output state
–0.5 to VCC
V
IOUT
Current applied to output in Low output state
40
mA
Tamb
Operating free air temperature range
0 to +70
°C
Tstg
Storage temperature range
–65 to +150
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
MIN
TYP
MAX
5.0
5.5
VCC
Supply voltage
4.5
V
VIH
High–level input voltage
2.0
VIL
Low–level input voltage
0.8
V
V
IIk
Input clamp current
–18
mA
IOH
High–level output current
–1
mA
IOL
Low–level output current
20
mA
+70
°C
Tamb
1996 Mar 12
Operating free air temperature range
0
4
Philips Semiconductors
Product specification
Octal D flip–flop
74F273A
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST
LIMITS
CONDITIONS1
VOH
VOL
VIK
High-level output voltage
MIN
TYP2
UNIT
MAX
MR & CP
VCC = MIN, VIL = 0.0V3,
±10%VCC
2.5
inputs
VIH = 4.5V3, IOH = MAX
±5%VCC
2.7
other
VCC = MIN, VIL = MAX,
±10%VCC
2.5
inputs
VIH = MIN, IOH = MAX
±5%VCC
2.7
VCC = MIN, VIL = MAX,
±10%VCC
0.30
0.50
V
VIH = MIN, IOH = MAX
±5%VCC
0.30
0.50
V
–0.73
-1.2
V
100
µA
Low-level output voltage
V
3.4
V
V
3.4
V
Input clamp voltage
VCC = MIN, II = IIK
II
Input current at maximum input voltage
VCC = 0.0V, VI = 7.0V
IIH
High–level input current
VCC = MAX, VI = 2.7V
20
µA
IIL
Low–level input current
VCC = MAX, VI = 0.5V
–20
µA
-150
mA
24
38
mA
27
43
current4
IOS
Short–circuit output
ICC
Supply current (total)
VCC = MAX
ICCH
-60
VCC = MAX
ICCL
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, Tamb = 25°C.
3. To reduce the effect of external noise during test.
4. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, IOS tests should be performed last.
AC CHARACTERISTICS FOR ’F273A
LIMITS
SYMBOL
PARAMETER
Tamb = +25°C
VCC = +5.0V
CL = 50pF
RL = 500Ω
WAVEFORM
Min
Typ
Tamb = 0°C to +70°C
VCC = +5.0V ±10%
CL = 50pF
RL = 500Ω
Max
Min
UNIT
Max
fMAX
Maximum clock frequency
1
150
170
tPLH
tPHL
Propagation delay
CP to Qn
1
3.5
5.0
5.0
7.0
8.0
9.5
3.0
4.5
9.0
10.0
ns
tPHL
Propagation delay
MR to Qn
2
5.0
7.0
9.0
5.0
9.5
ns
1996 Mar 12
5
125
MHz
Philips Semiconductors
Product specification
Octal D flip–flop
74F273A
AC SETUP REQUIREMENTS FOR ’F273A
LIMITS
SYMBOL
PARAMETER
Tamb = +25°C
VCC = +5.0V
CL = 50pF
RL = 500Ω
WAVEFORM
Min
Typ
Tamb = 0°C to +70°C
VCC = +5.0V ±10%
CL = 50pF
RL = 500Ω
Max
Min
UNIT
Max
ts(H)
ts(L)
Setup time, High or Low
Dn to CP
3
3.0
2.0
2.5
2.5
th(H)
th(L)
Hold time, High or Low
Dn to CP
3
0.5
0.0
2.5
1.0
ns
tw(H)
tw(L)
Clock pulse width
High or Low
1
4.5
3.5
5.0
4.0
ns
tw(L)
Master Reset pulse width, Low
2
3.0
3.5
ns
tREC
Recovery time
MR to CP
2
4.0
5.0
ns
AC WAVEFORMS
1/fmax
CP
VM
VM
VM
Dn
tw(H)
tPHL
tw(L)
tPLH
VM
Qn
VM
CP
VM
VM
VM
VM
ts(H)
th(H)
ts(L)
th(L)
VM
VM
SF00294
SF00191
Waveform 1. Propagation Delay, Clock Input to Output, Clock
Pulse Width, and Maximum Clock Frequency
Waveform 3. Data Setup and Hold Times
NOTE: For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output
performance.
MR
VM
VM
tw(L)
tREC
VM
CP
tPHL
Qn
VM
SF00158
Waveform 2. Master Reset Pulse Width, Master Reset to Output
Delay and Master Reset to Clock Recovery Time
1996 Mar 12
6
Philips Semiconductors
Product specification
Octal D flip–flop
74F273A
TEST CIRCUIT AND WAVEFORMS
VCC
7.0V
VIN
RL
VOUT
PULSE
GENERATOR
tw
90%
NEGATIVE
PULSE
VM
CL
AMP (V)
VM
10%
D.U.T.
RT
90%
10%
tTHL (tf )
tTLH (tr )
tTLH (tr )
tTHL (tf )
0V
RL
AMP (V)
90%
90%
Test Circuit for Open Collector Outputs
POSITIVE
PULSE
VM
VM
10%
TEST
tPLZ
tPZL
All other
SWITCH
closed
closed
open
DEFINITIONS:
RL = Load resistor;
see AC electrical characteristics for value.
CL = Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
10%
tw
SWITCH POSITION
0V
Input Pulse Definition
INPUT PULSE REQUIREMENTS
family
amplitude VM
74F
3.0V
1.5V
rep. rate
tw
tTLH
tTHL
1MHz
500ns
2.5ns
2.5ns
SF00128
1996 Mar 12
7
Philips Semiconductors
Product specification
Octal D flip-flop
74F273A
DIP20: plastic dual in-line package; 20 leads (300 mil)
1996 Mar 12
8
SOT146-1
Philips Semiconductors
Product specification
Octal D flip-flop
74F273A
SO20: plastic small outline package; 20 leads; body width 7.5 mm
1996 Mar 12
9
SOT163-1
Philips Semiconductors
Product specification
Octal D flip-flop
74F273A
Data sheet status
Data sheet
status
Product
status
Definition [1]
Objective
specification
Development
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
Preliminary
specification
Qualification
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
Product
specification
Production
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
 Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
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Date of release: 10-98
9397-750-05113