5 4 3 2 Table of Contents 1 2 3 4 5 Title Block Diagram KL25Z MCU OpenSDA INTERFACE I/O Headers and Power Supply 1 Revisions & Change Log Rev Description Date X1 Initial Draft 04/10/12 M. NORMAN A Release to production 05/03/12 M. NORMAN Prototype redefinition. 05/09/12 M. NORMAN 05/21/12 M. NORMAN 06/29/12 M. NORMAN 07/10/12 M. NORMAN 01/22/13 Fixing V. drop in ADC by changing SH1 for R77 & R80, and 3.0V zenner (D9) also changed BAT54C rectifiers (D1, D2, D5) for MBR120VLSFT1G diodes (D6, D7, D8, D10, D11, D12, D13 to enhance VF curve and current capability. Added J20 header to bypass D12 vdrop. Changed J4 and J3 to no bottom-shorting headers and added R73 & R74 0-ohm instead, along with R81 for current measuring Added USB host functionality without electrical protection by placing J21 and R82 options. Updated KL25 symbol TPM to FTM function misnaming M. NORMAN B D C CX1 KL25 XTAL capacitors C16 & C19 changed from 10pF DNP to 22pF populated. Defined A5 signal from K20 MCU Prototype release. Fixed J10 orientation according to Arduino R3 specification Prototype Re-spin. Approved D Changed two pin headers to DNP bottom-shorting headers. Added support to AT45DB161D-S or AT45DB161E-SSHD SPI Flash Memory. Added 2pin header (J11) for on-board MCU programming isolation. Redefined KL25 power netnames. Changed USB connectors part numbers J5 and J7 Changed KL25 XTAL 1M resistor (R25) to DNP. Changed X-FREEDOM-KL25Z board name to FRDM-KL25Z D C FREEDOM KL25Z DX1 B E Pilot release. Changed 2pin header (J11) location for on-board MCU SWD CLK isolation. Changed to DNP non-production BOM parts BT1, J1, J2, J3, J4, J6, J9, J10, TP6, U5, J8 Removed OpenSDA leverage hint voltage legend Production Re-spin. Production Re-spin release. C B 01/30/13 M. NORMAN Adding 5V buck-boost VR support by 1x3 pin header J22 and C26-29 10uF capacitors A A Automotive, Industrial & MultiMarket Solutions Group 6501 William Cannon Drive West Austin, TX 78735-8598 ICAP Classification: Designer: RAFAEL DEL REY 5 4 3 2 FCP: ____ FIUO: ____ PUBI: X Drawing Title: FRDM-KL25Z Drawn by: RAFAEL DEL REY Page Title: Approved: MICHAEL NORMAN Size C Document Number Date: Thursday, January 31, 2013 TITLE PAGE Rev E SCH-27556 | PDF: SPF-27556 Sheet 1 1 of 5 5 4 3 2 1 1. Unless Otherwise Specified: All resistors are in ohms, 5%, 1/8 Watt All capacitors are in uF, 20%, 50V All voltages are DC All polarized capacitors are aluminum electrolytic 2. Interrupted lines coded with the same letter or letter combinations are electrically connected. D D 3. Device type number is for reference only. The number varies with the manufacturer. 4. Special signal usage: _B Denotes - Active-Low Signal <> or [] Denotes - Vectored Signals 5. Interpret diagram in accordance with American National Standards Institute specifications, current revision, with the exception of logic block symbology. C C B B A A ICAP Classification: Drawing Title: FCP: ___ FIUO: ___ PUBI: X FRDM-KL25Z Page Title: BLOCK DIAGRAM 5 4 3 2 Size C Document Number Date: Wednesday, January 30, 2013 Rev E SCH-27556 | PDF: SPF-27556 1 Sheet 2 of 5 5 4 L1 S1 S3 J5 CONN USB MINI-B 5V 1 DD+ 1 2 C3 P5V0_USB_CONN_VBUS 330 OHM USB_CONN_DN USB_CONN_DP R2 R1 P3V3_KL25Z 1.0UF C5 C6 C14 C13 1.0UF 1.0UF 1.0UF GND 33 USB_DN 33 USB_DP C11 C10 0.1UF 0.1UF 0.1UF GND 4 TC_USB_ID_TP TP2 P3V3_KL25Z 2 1 R80 R77 ELECTRICAL PROTECTION IS NOT PROVIDED. USE IT AT YOUR OWN RISK GND C pg(5) pg(5) D14 D15 PTE2 PTE3 PTE4 PTE5 pg(5) pg(5) pg(5) pg(5) PTE20 PTE21 PTE22 PTE23 pg(5) PTE30 I2C0_SCL I2C0_SDA pg(5) PTE31 1 2 3 4 5 6 13 14 15 16 24 25 22 23 pg(5) 20 CAD NOTE: Please place these capacitors near their respective CPU pin (VREFH to VREFL C8 and VDDA to VSSA) 0.1UF GND U3 VSSA VREFL VDD3 19 38 GND 18 C9 0.1UF 60 P3V3_KL25Z VDD1 pg(5) pg(5) pg(5) pg(5) pg(5) pg(5) AREF 0 DNP GND 7 KL25Z USB CONNECTOR VREFH D9 3.0V DNP 17 GND DNP R82 0 DNP VDD2 330 OHM POPULATE THESE PARTS FOR USB HOST FUNCTIONALITY GND A 2 R3 1K TC_USB_ID_TP L2 1 D 0 DNP VDDA 3 J21 HDR 1X2 TH VREFH U2 GSOT05C-GS08 GND S2 S4 OPTIONAL USB HOST FUNCTIONALITY P5V_SDA P5V_KL25Z C 2 G 5 1 ID SHIELD_K20USB D 2 KL25Z Decoupling Caps P5V_KL25Z 1 2 3 3 PTE29/CMP0_IN5/ADC0_SE4B/TPM0_CH2/TPM_CLKIN0 PTE0/UART1_TX/RTC_CLKOUT/CMP0_OUT/I2C1_SDA PTE1/SPI1_MOSI/UART1_RX/SPI1_MISO/I2C1_SCL PTE2/SPI1_SCK PTE3/SPI1_MISO/SPI1_MOSI PTE4/SPI1_PCS0 PTE5 PTA0/TSI0_CH1/TPM0_CH5/SWD_CLK PTA1/TSI0_CH2/UART0_RX/TPM2_CH0 PTA2/TSI0_CH3/UART0_TX/TPM2_CH1 PTA3/TSI0_CH4/I2C1_SCL/TPM0_CH0/SWD_DIO PTA4/TSI0_CH5/I2C1_SDA/TPM0_CH1/NMI PTA5/USB_CLKIN/TPM0_CH2 PTE20/ADC0_DP0/ADC0_SE0/TPM1_CH0/UART0_TX PTE21/ADC0_DM0/ADC0_SE4A/TPM1_CH1/UART0_RX PTE22/ADC0_DP3/ADC0_SE3/TPM2_CH0/UART2_TX PTE23/ADC0_DM3/ADC0_SE7A/TPM2_CH1/UART2_RX PTE24/TPM0_CH0/I2C0_SCL PTE25/TPM0_CH1/I2C0_SDA PTA12/TPM1_CH0 PTA13/TPM1_CH1 PTA14/SPI0_PCS0/UART0_TX PTA15/SPI0_SCK/UART0_RX PTA16/SPI0_MOSI/SPI0_MISO PTA17/SPI0_MISO/SPI0_MOSI PTA18/EXTAL0/UART1_RX/TPM_CLKIN0 PTA19/XTAL0/UART1_TX/TPM_CLKIN1/LPTMR0_ALT1 PTA20/RESET PTE30/DAC0_OUT/ADC0_SE23/CMP0_IN4/TPM0_CH3/TPM_CLKIN1 PTE31/TPM0_CH4 21 PTE29 pg(5) 26 27 28 29 30 31 KL25_SWD_CLK 32 33 34 35 36 37 40 41 42 D3 D8 pg(3) D0 D1 SWD_DIO_TGTMCU D4 pg(5) D5 pg(5) 1K R6 1K DNP R25 pg(3,4,5) 1.0M Y1 3 2 GND2 C19 22PF GND1 TP3 P5V_KL25Z 12 11 10 USB_DN 9 USB_DP USB_VOUT33 PTB0/LLWU_P5/ADC0_SE8/TSI0_CH0/I2C0_SCL/TPM1_CH0 PTB1/ADC0_SE9/TSI0_CH6/I2C0_SDA/TPM1_CH1 PTB2/ADC0_SE12/TSI0_CH7/I2C0_SCL/TPM2_CH0 PTB3/ADC0_SE13/TSI0_CH8/I2C0_SDA/TPM2_CH1 VREGIN VOUT33 USB0_DM USB0_DP PTB8/EXTRG_IN PTB9 PTB10/SPI1_PCS0 PTB11/SPI1_SCK C7 2.2UF PTB16/TSI0_CH9/SPI1_MOSI/UART0_RX/TPM_CLKIN0/SPI1_MISO PTB17/TSI0_CH10/SPI1_MISO/UART0_TX/TPM_CLKIN1/SPI1_MOSI PTB18/TSI0_CH11/TPM2_CH0 PTB19/TSI0_CH12/TPM2_CH1 GND A0 A1 A2 A3 C16 22PF pg(5) pg(5) pg(5) pg(5) 51 52 53 54 8MHZ TSI CAPACITIVE/TOUCH INTERFACE GND GND 47 48 49 50 pg(4) pg(4) C 4 1 43 44 45 46 UART1_RX_TGTMCU UART1_TX_TGTMCU pg(5) pg(5) pg(3,4) pg(5) pg(5) INT1_ACCEL pg(5) INT2_ACCEL pg(5) PTA16 pg(5) PTA17 pg(5) EXTAL XTAL RST_TGTMCU R5 GND E1 GND PTB8 pg(5) PTB9 pg(5) PTB10 pg(5) PTB11 pg(5) TSI0_CH9 TSI0_CH10 PTB18 PTB19 Slider_4 PTC0/ADC0_SE14/TSI0_CH13/EXTRG_IN/CMP0_OUT PTC1/LLWU_P6/RTC_CLKIN/ADC0_SE15/TSI0_CH14/I2C1_SCL/TPM0_CH0 PTC2/ADC0_SE11/TSI0_CH15/I2C1_SDA/TPM0_CH1 PTC3/LLWU_P7/UART1_RX/TPM0_CH2/CLKOUT PTC4/LLWU_P8/SPI0_PCS0/UART1_TX/TPM0_CH3 PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/CMP0_OUT PTC6/LLWU_P10/CMP0_IN0/SPI0_MOSI/EXTRG_IN/SPI0_MISO PTC7/CMP0_IN1/SPI0_MISO/SPI0_MOSI PTC8/CMP0_IN2/I2C0_SCL/TPM0_CH4 PTC9/CMP0_IN3/I2C0_SDA/TPM0_CH5 PTC10/I2C1_SCL PTC11/I2C1_SDA PTC12/TPM_CLKIN0 PTC13/TPM_CLKIN1 B VSS3 VSS2 PTD0/SPI0_PCS0/TPM0_CH0 PTD1/ADC0_SE5B/SPI0_SCK/TPM0_CH1 PTD2/SPI0_MOSI/UART2_RX/TPM0_CH2/SPI0_MISO PTD3/SPI0_MISO/UART2_TX/TPM0_CH3/SPI0_MOSI PTD4/LLWU_P14/SPI1_PCS0/UART2_RX/TPM0_CH4 PTD5/ADC0_SE6B/SPI1_SCK/UART2_TX/TPM0_CH5 PTD6/LLWU_P15/ADC0_SE7B/SPI1_MOSI/UART0_RX/SPI1_MISO PTD7/SPI1_MISO/UART0_TX/SPI1_MOSI 59 39 8 VSS1 PTC16 PTC17 55 56 57 58 61 62 63 64 65 66 67 68 69 70 A5 A4 D6 D7 pg(4,5) pg(5) pg(5) pg(5) pg(5) PTC3 PTC4 PTC5 PTC6 PTC7 pg(5) pg(5) pg(5) pg(5) pg(5) B 71 72 73 74 75 76 77 78 79 80 PTC0 PTC10 PTC11 PTC12 PTC13 pg(5) pg(5) pg(5) pg(5) PTC16 PTC17 pg(5) pg(5) D10 pg(5) D13 pg(3,5) D11 pg(5) D12 pg(5) D2 pg(5) D9 pg(5) PTD6 PTD7 pg(5) pg(5) PKL25Z128VLK4 KINETIS KL25Z MCU GND A SHORTING HEADER ON BOTTOM LAYER SWD CONNECTOR RGB LED FEATURE TP14 D3 PTB18 R8 220 LEDRGB_RED P3V3 1 R 4 LEDRGB_GREEN R7 3 LEDRGB_BLUE R11 pg(3,4) PTB19 220 B D13 J6 P3V3_KL25Z pg(3,5) 1 3 5 7 9 TP17 CLV1A-FKB-CJ1M1F1BB7R4S3 GND 5 SWD_DIO_TGTMCU 220 G 2 4 A Jumper is shorted by a cut-trace on bottom layer. Cutting the trace will effectively isolate the on-board MCU from the OpenSDA debug interface. TP13 2 4 6 8 10 J11 DNP HDR 1X2 TH 1 2 KL25_SWD_CLK SWD_CLK_TGTMCU pg(3) ICAP Classification: Drawing Title: FCP: ___ FIUO: ___ PUBI: X FRDM-KL25Z pg(4) Page Title: RST_TGTMCU KL25Z MCU pg(3,4,5) HDR 2X5 DNP 3 2 Size C Document Number Date: Wednesday, January 30, 2013 Rev E SCH-27556 | PDF: SPF-27556 1 Sheet 3 of 5 5 4 3 D 2 1 D U6 P3V3_SDA 1 VDD1 C17 1.0UF 7 GND 8 VDDA VSSA JTAG_TCLK/SWD_CLK/EZP_CLK/TSI0_CH1/PTA0/UART0_CTS/UART0_COL/FTM0_CH5 JTAG_TDI/EZP_DI/TSI0_CH2/PTA1/UART0_RX/FTM0_CH6 JTAG_TDO/TRACE_SWO/EZP_DO/TSI0_CH3/PTA2/UART0_TX/FTM0_CH7 JTAG_TMS/SWD_DIO/TSI0_CH4/PTA3/UART0_RTS/FTM0_CH0 NMI/EZP_CS/TSI0_CH5/PTA4/FTM0_CH1/LLWU_P3 GND P5V_SDA L4 1 11 TC_VBAT_TP C15 1.0UF 330 OHM SDA_USB_CONN_DP 4 TC_SDA_USB_ID_TP R14 R13 U8 GSOT05C-GS08 SDA_USB_DN SDA_USB_DP C21 2.2UF 6 5 4 3 10 9 GND TP5 TP4 3 GND SDA_SWD_EN 17 18 SDA_EXTAL SDA_XTAL Y2 4 1 TARGET MCU INTERFACE SIGNALS 3 2 GND2 GND1 C23 22PF DNP ADC0_SE8/TSI0_CH0/PTB0/I2C0_SCL/FTM1_CH0/FTM1_QD_PHA/LLWU_P5 ADC0_SE9/TSI0_CH6/PTB1/I2C0_SDA/FTM1_CH1/FTM1_QD_PHB 20 21 8MHZ GND C25 22PF DNP GND GND 1 2 J14 DNP HDR 1X2 TH GND SDA_RST_TGTMCU EXTAL32 XTAL32 RST_TGTMCU pg(3,4,5) P3V3_SDA R15 C SDA_SWD_OE_B 10K 19 2 GND UART1_TX_TGTMCU RESET pg(3) UART1_RX_TGTMCU GND pg(3) P3V3_SDA P5V_SDA 2 R17 4.7K ADC0_SE15/TSI0_CH14/PTC1/SPI0_PCS3/UART1_RTS/FTM0_CH0/I2S0_TXD0/LLWU_P6 ADC0_SE4B/CMP1_IN0/TSI0_CH15/PTC2/SPI0_PCS2/UART1_CTS/FTM0_CH1/I2S0_TX_FS CMP1_IN1/PTC3/SPI0_PCS1/UART1_RX/FTM0_CH2/I2S0_TX_BCLK/LLWU_P7 PTC4/SPI0_PCS0/UART1_TX/FTM0_CH3/CMP1_OUT/LLWU_P8 PTC5/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/CMP0_OUT/LLWU_P9 CMP0_IN0/PTC6/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/I2S0_MCLK/LLWU_P10 CMP0_IN1/PTC7/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS VSS1 GND SDA_RST R21 10K 22 23 24 25 26 27 28 SDA_SPI0_RST_B SDA_SPI0_CS UART1_TX_TGTMCU UART1_RX_TGTMCU SDA_SPI0_SCK SDA_SPI0_SOUT SDA_SPI0_SIN VCC 2 3 SDA_SPI0_SOUT SDA_RST U4A 1 14 330 OHM EXTAL0/PTA18/FTM0_FLT2/FTM_CLKIN0 XTAL0/PTA19/FTM1_FLT0/FTM_CLKIN1/LPTMR0_ALT1 VREGIN VOUT33 USB0_DM USB0_DP TC_EXTAL_TP TC_XTAL_TP L3 1 R23 10K VBAT TP24 5 G 33 33 1 3 SDA_USB_VOUT33 2 5V DD+ ID SDA_USB_CONN_DN S2 S4 SDA_USBSHIELD C P5V0_SDA_USB_CONN_VBUS 2 P3V3_SDA P5V_SDA GND 1 SDA_JTAG_TCLK SDA_JTAG_TDI SDA_JTAG_TDO SDA_JTAG_TMS SDA_SWD_EN P3V3_SDA SWD_DIO_TGTMCU pg(3) GND 7 S1 S3 J7 CONN USB MINI-B TP25 2 12 13 14 15 16 74LVC125ADB TP27 R12 220 A EPAD GND PU/PD LOGIC: SERIAL INTERFACE IS ALWAYS RESET WHEN USB PORT IS DISCONNECTED LED GREEN U4C 10 33 GND GND SDA_LED_R 8 9 D4 SDA_SPI0_SIN 74LVC125ADB TP20 SDA_LED SDA_PTD5 pg(5) U4D 13 29 30 31 32 C PTD4/SPI0_PCS1/UART0_RTS/FTM0_CH4/EWM_IN/LLWU_P14 ADC0_SE6B/PTD5/SPI0_PCS2/UART0_CTS/UART0_COL/FTM0_CH5/EWM_OUT ADC0_SE7B/PTD6/SPI0_PCS3/UART0_RX/FTM0_CH6/FTM0_FLT0/LLWU_P15 PTD7/CMT_IRO/UART0_TX/FTM0_CH7/FTM0_FLT1 12 11 SWD_CLK_TGTMCU pg(3) SDA_SPI0_SCK B R24 B 74LVC125ADB SDA_PTD6 A5 0 pg(3,5) KL25Z Pin PTC1/LLWU_P6/RTC_CLKIN PK20DX128VFM5 TARGET RESET AND BOOTLOADER PUSH BUTTON P5V_SDA OpenSDA INTERFACE R10 4.7K P3V3_KL25Z SDA_USB_P5V_SENSE R4 10K pg(3,4,5) TP19 R9 10K SW1 1 RST_TGTMCU C12 1.0UF 2 EVQ-PE105K GND GND GND SPARE 74HC125 buffer OpenSDA INTERFACE JTAG CONNECTOR SPI FLASH MEMORY P3V3_SDA TP16 P3V3_SDA U5 SDA_SPI0_SOUT 1 SDA_SPI0_SCK 2 SDA_SPI0_RST_B 3 TP12 A 4 TP22 U4B TP11 TP18 TP15 TC_74125_SPARE_I_TP 5 6 SDA_SPI0_CS TC_74125_SPARE_O_TP 4 SI P3V3_SDA VCC SCK SO RSET_B WP_B CS_B GND 6 8 SDA_SPI0_SIN 5 P3V3_SDA DNP AT45DB161D-S OR AT45DB161E-SSHD 5 4 1 3 5 7 9 GND GND R19 10K J8 P3V3_SDA 7 SUBASSEMBLY_S08 74LVC125ADB TP10 2 4 6 8 10 A SDA_JTAG_TMS SDA_JTAG_TCLK SDA_JTAG_TDO SDA_JTAG_TDI SDA_RST ICAP Classification: Drawing Title: HDR 2X5 DNP FCP: ___ FIUO: ___ PUBI: X FRDM-KL25Z Page Title: OpenSDA interface 3 2 Size C Document Number Date: Thursday, January 31, 2013 Rev E SCH-27556 | PDF: SPF-27556 Sheet 1 4 of 5 5 4 3 2 OPTIONAL COIN CELL HOLDER BT1 3 TP8 DNP 2 1 D7 MBR120VLSFT1G A C P3V3_BATT - C1 10uF + GND 1 3003 P3V3 J4 HDR 1X2 TH DNP P3V3_KL25Z D P5-9V_VIN P5V_SDA 1 2 GND P5V_KL25Z D DNP A 0 NCP1117ST33T3G VIN VOUT TAB 2 P3V3_VREG 4 C2 10uF R81 10 J3 HDR 1X2 TH P3V3_SDA J20 DNP GND 20mOhm Resistor in layout GND HDR 1X2 TH SHORTING HEADER ON BOTTOM LAYER 1 2 C4 10uF D12 MBR120VLSFT1G A C 2 1 3 P5-9V_VIN_VR GND U1 1 C D8 MBR120VLSFT1G C D11 MBR120VLSFT1G C D10 MBR120VLSFT1G A A R73 DNP R74 0 GND D0 D1 D2 D3 D4 D5 D6 D7 pg(3) pg(3) pg(3) pg(3) pg(3) pg(3) D8 D9 D10 D11 D12 D13 TP6 DNP GND AREF D14 D15 20 18 16 14 12 10 8 6 4 2 pg(3) pg(3) pg(3) C DEBUG GROUND HOOK I2C INERTIAL SENSOR J2 CON_2X10 DNP GND P3V3 CON 2X8 J1 DNP GND 1 P3V3 pg(3) pg(3) 4 6 I2C0_SCL I2C0_SDA TP26 MMA8451_SERIAL_ADDR0 7 VDDIO U7 R20 10K SCL SDA SA0 INT1 INT2 BYP NC3 NC8 NC13 NC15 NC16 TP23 MMA8451_BYP 2 GND1 GND2 GND3 C22 0.1UF GND MMA8451Q GND 11 9 PTD7 PTD6 pg(3) pg(3) pg(3) pg(3) pg(3) pg(3) pg(3) INT1_ACCEL INT2_ACCEL pg(3) pg(3) TP9 TP28 PTE31 PTA17 PTA16 PTC17 PTC16 PTC13 PTC12 GND pg(3) pg(3) pg(3) pg(3) pg(3) pg(3) PTE30 PTE29 PTE23 PTE22 PTE21 PTE20 pg(3) pg(3) pg(3) pg(3) pg(3) pg(3) pg(3) pg(3) PTE5 PTE4 PTE3 PTE2 PTB11 PTB10 PTB9 PTB8 B 5VDC VR SUPPORT J22 HDR_1X3 DNP P5V_SDA IN CON 2X8 J9 DNP P5V_KL25Z 1 2 3 1 3 5 7 9 11 13 15 GND OUT CON 2X6 SKT D13 D6 C MBR120VLSFT1G C MBR120VLSFT1G pg(3,4) C24 2.2UF RST_TGTMCU P5V_USB P3V3 J10 DNP 2 4 6 8 10 12 2 4 6 8 10 12 14 16 A A P3V3 P5-9V_VIN C26 C27 C28 GND 10uF 10uF 10uF DNP DNP DNP P5V_USB P5-9V_VIN GND P5V_USB pg(4) A TP1 pg(3) PTC11 pg(3) PTC10 pg(3) PTC6 pg(3) PTC5 pg(3) PTC4 pg(3) PTC3 pg(3) PTC0 pg(3) PTC7 3 8 13 15 16 5 10 12 R22 10K DNP B pg(3) pg(3) GND 14 R18 4.7K C18 10uF VDD R16 4.7K C20 0.1UF IN CIRCUIT TEST GND PROBING 1 3 5 7 9 11 P3V3 15 13 11 9 7 5 3 1 19 17 15 13 11 9 7 5 3 1 P3V3 16 14 12 10 8 6 4 2 C pg(3) pg(3) pg(3) pg(3) pg(3) pg(3) pg(3) pg(3) SDA_PTD5 GND C29 10uF DNP A GND pg(3) pg(3) pg(3) pg(3) pg(3) pg(3,4) A0 A1 A2 A3 A4 A5 ICAP Classification: Drawing Title: FCP: ___ FIUO: ___ PUBI: X FRDM-KL25Z Page Title: ARDUINO SHIELDS & PWR SUPPLY 5 4 3 2 Size C Document Number Date: Thursday, January 31, 2013 Rev E SCH-27556 | PDF: SPF-27556 Sheet 1 5 of 5