AT16245 Features • • • • • • • Fastest Propagation Speeds in the Industry TPD (F grade) = 2.5 ns, TPD (G grade) = 2.0 ns Maximum Derating for Capacitive Loads 1.5ns/100pF (F grade) and 1.1ns/100pF (G grade) Very Low Ground Bounce <0.6V @ VCC=5.00 V, Ta=25°C Excellent Noise Rejection Typical Output Skew ≤0.25ns Bus Hold Circuitry to Retain Last Active State During Tri-State Available in SSOP and TSSOP Packages Description Atmel’s new family of high speed CMOS transceivers offers the best of all worlds to the user requiring stability and ultra fast speeds. These transceivers, which can function as two 8-bit devices or one 16-bit device, are capable of improving processing efficiency as much as 6% by reducing the number of wait states required during memory access. In addition, this family of parts has been designed to minimize ground bounce on the outputs while rejecting input spikes of up to 1.8V and 1 ns wide. This combination of ultra high speed and low noise is the next step in high speed performance. AT16245F AT16245G Functional Block Diagram Pin Configurations Pin Names xOE Descriptions Output Enable Input (Active Low) SSOP/TSSOP 1DIR 1B2 1B3 VCC 1B6 xDIR Direction Control Input 1B7 2B1 xAχ Side A Inputs or Tri-State Outputs xBχ Side B Inputs or Tri-State Outputs AT16245 Fast Logic Bi-Directional Transceiver GND 2B4 2B5 GND 2B8 1B1 GND 1B4 1B5 GND 1B8 2B2 2B3 VCC 2B6 2B7 2DIR 1 3 5 7 9 11 13 15 17 19 21 23 2 4 6 8 10 12 14 16 18 20 22 24 48 46 44 42 40 38 36 34 32 30 28 26 47 1A1 45 GND 43 1A4 41 1A5 39 GND 37 1A8 35 2A2 33 2A3 31 VCC 29 2A6 27 2A7 25 2OE 1OE 1A2 1A3 VCC 1A6 1A7 2A1 GND 2A4 2A5 GND 2A8 Top View 0754B 5-9 Function Table Inputs xDIR L L Bus B Data to Bus A L H Bus A Data to Bus B (1) H Note: Outputs xOE X High Z State 1. X = Don’t Care Absolute Maximum Ratings* NOTICE:Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Operating Temperature ........................ 0°C to +70°C Storage Temperature ......................-65°C to +150°C Voltage on any Pin with Respect to Ground................. -2.0 V to +7.0V(1) Maximum Operating Voltage..............................6.0V Notes: 1. Minimum voltage is -0.6V dc which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC +0.75V dc which may overshoot to +7.0V for pulses of less than 20 ns. 5.0 Volt DC Characteristics Applicable over recommended operating range from Ta=0°C to +70°C, VCC=+5.0V ±5% (unless otherwise noted) Symbol Parameter Test Conditions ∆ICC Quiescent Power Supply Current VCC=Max, VIN=3.4V V IH Input High Voltage V IL Input Low Voltage IIH Input High Current (I/O Pins) IIL Input Low Current (I/O Pins) IOZ Min Typ Max Units 0.8 1.2 mA 2.0 V 0.8 V VIN=V CC ±15 µA VIN= GND ±15 µA ±10 µA Output Leakage Current (1) Output High Voltage F Grade only V CC=4.75 V IOH=-10 mA 2.7 V OH (2) Output High Voltage G Grade only V CC=4.75 V IOH=-12 mA 2.7 VOL Output Low Voltage (F Grade) IOL=10 mA 0.55 V VOL Output Low Voltage (G Grade) IOL =12 mA 0.55 V V OH Note: 5-10 1. F grade: At VCC(max), the value of VOH(max) = 3.75V and at VCC(min), VOH(max ) = 3.25V 2. G grade: At VCC(max), the value of VOH(max) = 3.75V and at VCC(min), VOH(max ) = 3.35V AT16245 V V AT16245 AC Characteristics AT16245F Applicable over recommended operating range from Ta=0°C to +70°C, VCC=5.0V ±5% (unless otherwise noted) Symbol Parameter Test Conditions tPHL tPLH Propagation Delay tPZH tPZL Min Typ Max Units CL=50 pF 2.5 ns Output Enable Time CL=50 pF 6.0 ns tPHZ tPLZ Output Disable Time CL=50 pF 6.0 ns tSK(1) Output Skew CL=50 pF 0.5 ns ∆tPHL ∆tPLH Propagation Delay vs Output Loading 1.5 ns/100pF (1) Note: 1.3 1. This parameter is guaranteed but not 100% tested. AT16245G Applicable over recommended operating range from Ta=0°C to +70°C, VCC=5.0V ±5% (unless otherwise noted) Symbol Parameter Test Conditions TPHL TPLH Propagation Delay TPZH TPZL Min Typ Max Units CL=50 pF 2.0 ns Output Enable Time CL=50 pF 6.0 ns TPHZ TPLZ Output Disable Time CL=50 pF 5.0 ns T SK(1) Output Skew CL=50 pF 0.5 ns ∆tPHL ∆tPLH Propagation Delay vs Output Loading 1.1 ns/100pF (1) Note: 0.9 1. This parameter is guaranteed but not 100% tested. Test Circuits(1,2) Switch Position Test Switch Open Drain Disable Low Enable Low Closed All Other Tests Open Definitions: CL = Load capacitance; Includes jig and probe capacitance. RT = Termination resistance; Should be equal to ZOUT of the Pulse Generator. Note: 1. Pulse Generator: Rate ≤ 1.0 MHz, tF ≤2.5 ns, tR ≤ 2.5 ns. 2. AC tests are done with a single bit switching, and timings need to be derated when multiple outputs are switching in the same direction simultaneously. This derating should not exceed 0.5 ns for 16 inputs switching simultaneously. 5-11 IOL Pull Down Current 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 -1.0 IOL, mA 120 80 40 0 -40 IOL Output, V Output, V 160 Time Supply Bounce for Low to High Transitions(2) Ground Bounce for High to Low Transitions(1) 4.5 3.5 gnd - measured on output with input held constant 3.0 2.5 3 output Volts 2.0 Volts 3.5 1.5 VOHV 2.5 output 2 1.5 1.0 0.5 vcc measured on output with input held constant VOHP 4 1 VOLP 0.5 0.0 0 VOLV -0.5 Time Time Typical Values Note: 5-12 Parameter Value Units VOLP 0.4 V VOLV -0.26 V VOHV V CC - 0.13 V VOHP V CC + 0.6 V 1. When multiple outputs are switched at the same time, rapidly changing current on the ground and VCC paths cause a voltage to develop across the parasitic inductance of the wire bond and package pins. This occurrence is called simultaneous switching noise. Atmel’s AT16245 products have minimized this phenomenon as shown on the graph. Output data is for 15 outputs switching simultaneously at a frequency of 1 MHz. The ground data is measured on the one remaining output, which is set to logic low and will reflect any device ground movement. 2. As on the graph for Ground Bounce, a similar condition occurs for low to high transitions. Output data is for 15 outputs switching simultaneously at a frequency of 1 MHz. VCC droop is measured on the one remaining output pin, which is set to a logic high. This output will reflect any movement on the device VCC. AT16245 AT16245 Propagation Delay Waveforms Input Transition 1.5 V 1.5 V tPLH tPHL VOH 1.5 V Output Transition VOL Enable and Disable Waveforms(1) Enable Disable 3.0 V Control Input 1.5 V 0V tPZL Output Switched Low tPLZ 3.5 V Switch Closed 1.5 V 0.3 V tPHZ tPZH Output Switched High VOL 0.3 V VOH 1.5 V Switch Open 0V Note: 1. Enable and disable waveforms are the same for both xOE and xDIR inputs. 5-13 Ordering Information TPD Ordering Code Package Operation Range 2.5 ns AT16245F - 25YC AT16245F - 25XC 48Y 48X Commercial 2.0 ns AT16245G - 20YC AT16245G - 20XC 48Y 48X Commercial Package Type 48X 48 Pin, Plastic Thin Shrink Small Outline Package (TSSOP) 48Y 48 Pin, Plastic Shrink Small Outline Package (SSOP) 5-14 AT16245