AT16373 Features • • • • • • • Fastest Propagation Speeds in the Industry TPD (F grade) = 2.5 ns, TPD (G grade) = 2.0 ns Maximum derating for capacitive loads 1.5ns/100 pF (F grade) and 1.1ns/100 pF (G grade) Very low ground bounce < 0.6V @ VCC =5.00V, Ta=25°C Excellent noise rejection Typical output skew ≤0.25ns Bus Hold circuitry to retain last active state during Tri-state Available in SSOP and TSSOP packages Description Atmel’s AT16373 devices provide maximum speed in temporary data storage. They can be operated as either two separate 8 bit latches or as a single 16-bit latch by use of the output enable and the latch enable. The AT16373 has very low ground bounce and excellent input noise rejection, giving the user stable signals in a high speed environment. These devices can drive very large loads while operating in a high speed transparent mode. AT16373 Fast Logic 16-Bit Transparent Latch Functional Block Diagram (1) AT16373F AT16373G Note: 1. This 8-bit latch function is repeated a second time on each device. Pin Configurations Pin Names xOE xLE Descriptions Output Enable Input (Active Low) Latch Enable Inputs (Active High) SSOP/TSSOP 1OE 1O2 1O3 VCC 1O6 1O7 2O1 GND xDχ xOχ Data Inputs Tri-State Outputs 2O4 2O5 GND 2O8 1O1 GND 1O4 1O5 GND 1O8 2O2 2O3 VCC 2O6 2O7 2OE 1 3 5 7 9 11 13 15 17 19 21 23 2 4 6 8 10 12 14 16 18 20 22 24 48 46 44 42 40 38 36 34 32 30 28 26 47 1D1 45 GND 43 1D4 41 1D5 39 GND 37 1D8 35 2D2 33 2D3 31 VCC 29 2D6 27 2D7 25 2LE 1LE 1D2 1D3 VCC 1D6 1D7 2D1 GND 2D4 2D5 GND 2D8 Top View 0756B 5-15 Function Table(1) Inputs Outputs xDχ xLE xOE xOχ H L X H H X L L H H L Z Note: 1. X = Don’t Care, Z = High Impedance Absolute Maximum Ratings* Operating Temperature........................ 0°C to +70°C Storage Temperature...................... -65°C to +150°C Voltage on any Pin with Respect to Ground .................. -2.0V to +7.0V(1) Maximum Operating Voltage ............................. 6.0V 5.0 Volt DC Characteristics *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Notes: 1. Minimum voltage is -0.6V dc which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is VCC +0.75V dc which may overshoot to +7.0V for pulses of less than 20 ns. Applicable over recommended operating range from Ta = 0°C to +70°C, VCC = +5.0V +/- 5% (unless otherwise noted) Units Symbol Parameter Test Conditions ∆ICC Quiescent Power Supply Current VCC = Max, VIN = 3.4V V IH Input High Voltage VIL Input Low Voltage IIH Input High Current IIL Input Low Current IOZ Output Leakage Current V OH(1) Typ Max 0.8 1.2 2.0 mA V 0.8 V VIN = VCC ±15 µA VIN = GND ±15 µA ±10 µA Output High Voltage F Grade only VCC = 4.75V IOH = -10 mA 2.7 V Output High Voltage G Grade only VCC = 4.75V IOH = -12 mA 2.7 V VOL Output Low Voltage (F Grade) IOL = 10 mA 0.55 V VOL Output Low Voltage (G Grade) IOL = 12 mA 0.55 V V OH(2) Note: 1. F grade: At VCC (max), the value of VOH(max) = 3.75V and at VCC(min), VOH(max) = 3.25V 2. G grade: At VCC (max), the value of VOH(max) = 3.75V and at VCC(min), VOH(max) = 3.35V 5-16 Min AT16373 AT16373 AC Characteristics AT16373F Applicable over recommended operating range from Ta = 0°C to +70°C, VCC = 5.0V +/- 5% (unless otherwise noted) Symbol Parameter Test Conditions(1) tPHL tPLH Propagation Delay xDχ to xOχ tPHL tPLH Min Typ Max Units CL = 50 pF 2.5 ns Propagation Delay xLE to xOχ CL = 50 pF 5.5 ns tPZH tPZL Output Enable CL = 50 pF 8.8 ns tPHZ tPLZ Output Disable CL = 50 pF 6.5 ns tSK(2) Output Skew CL = 50 pF 0.5 ns ∆tPHL(2) ∆tPLH Propagation Delay vs Output Loading 1.5 ns/100 pF tsu Set-up Time CL = 50 pF 2.0 ns tH Hold Time CL = 50 pF 2.0 ns 1.3 Note: 1. See test circuit and waveforms. 2. This parameter is guaranteed but not 100% tested. AT16373G Applicable over recommended operating range from Ta = 0°C to +70°C, VCC = 5.0V +/- 5% (unless otherwise noted) Symbol Parameter Test Conditions(1) tPHL tPLH Propagation Delay xDχ to xOχ tPHL tPLH Min Typ Max Units CL = 50 pF 2.0 ns Propagation Delay xLE to xOχ CL = 50 pF 5.0 ns tPZH tPZL Output Enable CL = 50 pF 8.8 ns tPHZ tPLZ Output Disable CL = 50 pF 6.0 tSK(2) Output Skew CL = 50 pF 0.5 ns ∆tPHL(2) ∆tPLH Propagation Delay vs Output Loading 1.1 ns/100 pF tsu Set-up Time CL = 50 pF 2.0 ns tH Hold Time CL = 50 pF 2.0 ns 0.9 ns Note: 1. See test circuit and waveforms. 2. This parameter is guaranteed but not 100% tested. 5-17 Test Circuits(1,2) Switch Position VCC 7.0V 500Ω VIN VOUT Pulse Generator D.U.T. 50 pF 500Ω RT CL Test Switch Open Drain Disable Low Enable Low Closed All Other Tests Open Definitions: CL = Load capacitance; Includes jig and probe capacitance. RT = Termination resistance; Should be equal to ZOUT of the Pulse Generator. Note: 1. Pulse Generator: Rate ≤ 1.0 MHz, tF ≤ 2.5 ns, tR ≤ 2.5 ns. 2. AC tests are done with a single bit switching, and timings need to be derated when multiple outputs are switching in the same direction simultaneously. This derating should not exceed 0.5 ns for 16 inputs switching simultaneously. IOL Pull Down Current IOL, mA 120 80 40 0 -40 IOL Output, V Output, V 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 -1.0 160 Time Ground Bounce for High to Low Transitions(1) Supply Bounce for Low to High Transitions(2) 4.5 3.5 gnd - measured on output with input held constant 3.0 2.5 1.0 VOHV 2.5 1 VOLP 0.5 VOLV 0 Time Time 5-18 AT16373 vcc measured on output with input held constant output 2 1.5 0.0 -0.5 3 Volts Volts 1.5 0.5 3.5 output 2.0 VOHP 4 AT16373 Typical Values Parameter Value Units V OLP 0.4 V V OLV -0.26 V VOHV V CC - 0.13 V VOHP VCC + 0.6 V Note: 1. When multiple outputs are switched at the same time, rapidly changing current on the ground and VCC paths causes a voltage to develop across the parasitic inductance of the wire bond and package pins. This occurrence is called simultaneous switching noise. Atmel’s AT16373 products have minimized this phenomenon as shown on the graph. Output data is for 15 outputs switching simultaneously at a frequency of 1 MHz. The ground data is measured on the one remaining output, which is set to logic low and will reflect any device ground movement. 2. As on the graph for Ground Bounce, a similar condition occurs for low to high transitions. Output data is for 15 outputs switching simultaneously at a frequency of 1 MHz. VCC droop is measured on the one remaining output pin, which is set to a logic high. This output will reflect any movement on the device VCC. Propagation Delay Waveforms Input Transition 1.5 V 1.5 V tPLH tPHL VOH 1.5 V Output Transition VOL Enable and Disable Waveforms(1) Enable Disable 3.0 V Control Input 1.5 V 0V tPZL Output Switched Low tPLZ 3.5 V Switch Closed 1.5 V 0.3 V tPHZ tPZH Output Switched High VOL 0.3 V VOH 1.5 V Switch Open 0V Note: 1. Enable and disable waveforms are the same for both xOE and xLE inputs. 5-19 Ordering Information TPD Ordering Code Package Operation Range 2.5 ns AT16373F - 25YC AT16373F - 25XC 48Y 48X Commercial 2.0 ns AT16373G - 20YC AT16373G - 20XC 48Y 48X Commercial Package Type 48X 48 Pin, Plastic Thin Shrink Small Outline Package (TSSOP) 48Y 48 Pin, Plastic Shrink Small Outline Package (SSOP) 5-20 AT16373