Qualification Report January 1992 QTP 90313 64 Bit Static RAM Family MARKETING PART NBR DEVICE DESCRIPTION CY7C189 Inverted R/W CY7C190 R/W Version 1.1 PRODUCT DESCRIPTION (for qualification) Information provided in this document is intended for generic qualification and technically describes the Cypress part supplied: Marketing Part #: CY7C189 Device Description: 16 x 4 Bit Static RAM Cypress Division: Cypress Semiconductor Overall Die (or Mask) REV Level (pre-requisite for qualification): Die Size (stepping): 59 mil x 70 mil B What ID markings on Die: 7C189B Cypress Qualification completion/Marketing Availability Dates (Current REV): 1991 Now DIE/FAB DESCRIPTION Number of Metal Layers: 1 Metal Composition: Passivation Type and Materials: 1200Å Ti, 9000Å 1%SiAl 4KÅ 2%P LTO, + 15KÅ Oxynitride Free Phosphorus contents in top glass layer(%): Die Coating(s), if used: 2% None Generic Process Technology/Design Rule (µ-drawn): CMOS, Double Poly, Single Metal / 1.2µm Gate Oxide Material/Thickness (MOS): SiO2 / 245Å Name/Location of Die Fab (prime) Facility: Cypress Semiconductor / Round Rock, TX Die Fab Line ID/Wafer Process ID: Fab 2 / R11 HERMETIC PACKAGE/ASSEMBLY DESCRIPTION Package Outline, Type, or Name: 16-pin, 300-mil CerDIP Die to Package edge clearance: 113 mils per side Mold Compound Name/Manufacturer: Lead Frame material: N/A Alloy 42 Lead Finish, composition: Solder Dipped, 63%Sn, 37%Pb Die Attach Area Plating: Silver Die Attach Pad Dim: 110 mils x 140 mils Die Attach Method: Paste Die Attach Material: Silver Glass Wire Bond Method: Ultrasonic Wire Material/Size: Aluminum / 1.25 mil Name/Location of Assembly (prime) facility: Cypress Semiconductor, San Jose, CA Assembly Line ID and Process ID: Cypress Semiconductor / D2 CYPRESS SEMICONDUCTOR PAGE 3 HERMETIC PACKAGE/ASSEMBLY DESCRIPTION Package Outline, Type, or Name: 20-pin square LCC, Gold Lid Die to Package edge clearance: 136 mils per side Mold Compound Name/Manufacturer: Lead Frame material: N/A N/A Lead Finish, composition: Solder Dipped, 63%Sn, 37%Pb Die Attach Area Plating: Silver Die Attach Pad Dim: 280 mils x 280 mils Die Attach Method: None Die Attach Material: Silver Glass Wire Bond Method: Ultrasonic Wire Material/Size: Aluminum / 1.25 mil Name/Location of Assembly (prime) facility: Cypress Semiconductor, San Jose, CA Assembly Line ID and Process ID: Cypress Semiconductor / D2 PLASTIC PACKAGE/ASSEMBLY DESCRIPTION Package Outline, Type, or Name: 16-pin, 300 mil Plastic DIP Die to Package edge clearance: 115 mil / side Mold Compound Name/Manufacturer: Lead Frame material: Sumitomo EME-6300H(R) Copper Lead Finish, composition: Solder, 63%Sn 37%Pb Die Attach Area Plating: Silver Die Attach Pad Dim: 110 mils x 140 mils Die Attach Method: Epoxy Die Attach Material: Silver Epoxy Wire Bond Method: Thermocompression Wire Material/Size: Gold / 1.3 mil Name/Location of Assembly (prime) facility: Cypress Semiconductor, San Jose, CA Assembly Line ID and Process ID: Cypress Semiconductor/ P27 CYPRESS SEMICONDUCTOR PAGE 4 OTHER INFORMATION For approval by similarity, identify other devices using the same basic die with bonding or metal mask options or test selections and explain: CY7C189, CY7C190 -- Metal Mask Options. CY27S03 (Test parameters Option of 7C189). CY27S07 (Test Parameters option of 7C190) If Cypress is planning any changes in the near future, identify change (Qtr/Yr) in: Die Design Rev./Shrink/Date None Die Process Change/Date: None Fab/Assembly site change/Date None Cross Licensee/Licensor : None ESD Voltage Rating (per MIL STD-008, Method 3018): >2000V Flammability Classification (UL-94V): UL-94V0 1/8 Alternate Fab/Assembly Locations: Fab: San Jose, CA (Fab 1) Assembly: Omedata Corporation, Indonesia Please attach the following Qualification / Reliability data for the die revision and Package type, for the fab and assembly sites identified above (mark [X] if included): 1 X H A S T (130°C/85%RH) 7 X Operating Life at (temp): 2 X Temperature Cycle (-65°C to 150°C) 8 X Latchup Testing 3 Data Retention Bake, Plastic (185°C) 9 Other: 4 Data Retention Bake, Hermetic (250°C) 10 Other: 5 X Autoclave (PCT, 130°C, 100%RH) 11 Other: 6 X ESD Tests (MIL-STD 883, method 3015) 12 Other: 150°C CYPRESS SEMICONDUCTOR PAGE 5 PRODUCT INFORMATION FOR QUALIFICATION BY SIMILARITY Product Family: 64 Bit Static RAM Mfg Division: San Jose, CA Supplier's Part Number Rated Pkg Size/ Die Speed Type Revision /ID Die Size mil x mil Design Rule (µ µ) Fabrication Passivatio Mold Assembly n Type Compound Line Location ESD Volt Rating Availability (mm/yy) Process Line ID ID CY7C189 -xxPC -xxDC 15ns to 65ns 16.3 PDIP 16.3 CDIP 7C189B 59 x 70 1.2µ R11 CMOS 2 1* LTO + Oxynitride Sumitomo San Jose, CA >2000V Now CY27S03 -APC -ADC/DMB -ALMB 25ns 16.3 PDIP 16.3 CDIP 20S LCC 7C189B 59 x 70 1.2µ R11 CMOS 2 1 LTO + Oxynitride Sumitomo San Jose, CA >2000V Now C74S189 -35PC -35DC PC DC/DMB LC/LMB 35ns 16.3 PDIP 16.3 CDIP 16.3 PDIP 16.3 CDIP 20S LCC 7C189B 59 x 70 1.2µ R11 CMOS 2 1 LTO + Oxynitride Sumitomo San Jose, CA >2000V Now CY27SL03 DMB LMB 65ns 16.3 CDIP 20S LCC 7C189B 59 x 70 1.2µ R11 CMOS 2 1 LTO + Oxynitride Sumitomo San Jose, CA >2000V Now CY7C190 -xxPC -xxDC/DMB 15ns to 45ns 16.3 PDIP 16.3 CDIP 7C190B 59 x 70 1.2µ R11 CMOS 2 1 LTO + Oxynitride Sumitomo San Jose, CA >2000V Now CY27S07 APC ADC/DMB ALMB 25ns 16.3 PDIP 16.3 CDIP 20S LCC 7C190B 59 x 70 1.2µ R11 CMOS 2 1 LTO + Oxynitride Sumitomo San Jose, CA >2000V Now CY27S07 PC DC/DMB LC/LMB 35ns 16.3 PDIP 16.3 CDIP 20S LCC 7C190B 59 x 70 1.2µ R11 CMOS 2 1 LTO + Oxynitride Sumitomo San Jose, CA >2000V Now CY27S03 NOTE: "xx" replaces all speed grades for device. Options for 7C189 are 15ns, 18ns, 25ns, 35ns, and 65ns; for 7C190 are 15ns, 18ns, 25ns, 35ns, and 45ns. *Fab 1 ws one of Cypress' initial products, which began manufacture in 1984. CYPRESS SEMICONDUCTOR PAGE 6 DEVICE RELIABILITY SUMMARY Marketing Part: Pkg Description: CY7C189 16-pin 300 mil PDIP Wafer Fab: Assembly: Fab 2, San Jose, CA San Jose, CA High Temperature Dynamic Operating Life (HTOL, 5.75V, 150°C) Device Lot# 24 Hours Cumulative 7C189 2023734 1/2000 1/2000 Cause not identified High Temperature Dynamic Operating Life (HTOL, 5.75V, 150°C), LFR Device Lot# 80 Hours 500 Hours Cumulative 7C189 7C189 2023734 2916576 0/350 0/93 0/350 0/443 Temperature Cycle (Condition C, -65°C to 150°C) Device Lot# 100 cycles 500 Cycles Cumulative 7C189 7C189 2023734 2916576 0/77 0/44 0/77 0/121 Pressure Cooker (PCT, Unbiased, 130°C, 100%RH, Device Lot# 96 Hours 288 Hours Cumulative 7C189 2023734 0/77 0/77 0/77 High Accelerated Saturation Test (HAST, Unbiased, 130°C, 85%RH, 15psig) Device Lot# 100 Hours Cumulative 7C189 2023734 0/78 0/77 CYPRESS SEMICONDUCTOR PAGE 7 Device Reliability Summary 64 Bit Static RAM CY7C189 Electrostatic Discharge Human Body Model Circuit per Mil Std 883, Method 3015 >+2000 Unit 1 >-2000 >+2000 Unit 2 >-2000 >+2000 Unit 3 >-2000 (Highest Passing Voltage, +100% Guard-banded) Latchup Testing to Cypress Internal Latch-up Procedure 3 Tests: Current Injection = 200mA Trigger Hot Socket = VCC 0 - 7V VCC Oscillation VCC = 3.5 - 7.5V at 1MHz Temp = 150°C CYPRESS SEMICONDUCTOR PAGE 8 CYPRESS PREVIOUS QUALIFICATION Device ID: Status: Process ID: 7C189B/7C190B Prod. Family: Production R11 Passed Complete Date: Technology: CMOS Process Loc: PDIP (Plastic) CDIP, LCC (Ceramic) Mold Compound: Die Attach Mat: Silver Epoxy (Plastic) Silver Glass (Ceramic) Package Loc: Stress/Test Mask ID: Results: Package: Cypress Test No. 64 Bit Static Ram Reference Method Sumitomo (Plastic Only) Lead Frame PDIP: San Jose, Omedata Ceramic: San Jose Actual Conditions Test Loc: Status * Temp/Bias Hrs/Cyc SS/Fail 7C189B 1984 Fab 1, San Jose, CA PDIP: Copper CDIP: Alloy 42 San Jose, CA Qualification Data Reference Test Result Pass 22A HTOL - EFR 150°/5.75V 12 hrs 1350/1 C Reliability Monitor X 22 HTOL - EFR 150°/5.75V 80 hrs 197/0 C Reliability Monitor X 22 HTOL - LFR 150°/5.75V 168 hrs 1660/0 C Reliability Monitor X Steady State Life - Dynamic 150°/5.75V 184 hrs 80/0 C QCI Inspection X Corner Pins Internal Pins ---- C R&D X 5/0 C R&D X 24 Steam Test/Autoclave/PCT 12 Temperature Cycle 34 Accelerated Soft Error Rate 20 Mechanical Sequence 26 X-Ray 6 ESD-HBM - 2000V 33 Latch-up 50 Flammability & Oxygen Index 200mA Thermal Series Group D3 52/0 C QCI Inspection X Mechanical Series Group D4 52/0 C QCI Inspection X 2 Solvent Resistance 4 Internal Visual 1 Physical Dimensions 3 Solderability 7 Lead Integrity 5 Bond Strength 29 Die Shear Strength 11 Lid Torque Fail * I - Interim, C - Complete NOTE: 64-bit SRAM was one of Cypress' initial products. The data included herein is from Reliability Monitor testing, R&D characterization reports, and QCI Group C and D inspection (per MIL STD 883) for Class B material.