QTP #98424:256K STATIC SRAM (CY7C194/195/197/199) - R42DH TECHNOLOGY - FAB 4

Document No.001-88022 Rev. *A
ECN # 4417735
Cypress Semiconductor
Product Qualification Report
QTP# 98424 VERSION*A
June, 2014
256K STATIC SRAM,
R42HD TECHNOLOGY, FAB 4
CY7C194/195
64K x 4 Static RAM (5V)
CY7C197
256K x 1 Static RAM (5V )
CY7C199
32K x 8 Static RAM (5V)
FOR ANY QUESTIONS ON THIS REPORT, PLEASE CONTACT
[email protected] or via a CYLINK CRM CASE
Prepared By:
Josephine Pineda
Reliability Engineer
Reviewed By:
Zhaomin Ji
Reliability Manager
Approved By:
Richard Oshiro
Reliability Director
Company Confidential
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Page 1 of 8
Document No.001-88022 Rev. *A
ECN # 4417735
PRODUCT QUALIFICATION HISTORY
Qual
Report
98064
1 Meg SRAM fabricated in Fab 4 with R42HD Technology
Date
Comp
Feb. 1999
98424
256K STATIC SRAM (CY7C194/195/197/199) - R42DH TECHNOLOGY - FAB 4
June 2000
Description of Qualification Purpose
Company Confidential
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Page 2 of 8
Document No.001-88022 Rev. *A
ECN # 4417735
MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION
Package Outline, Type, or Name:
28-pin, 300-mil SOJ
Mold Compound Name/Manufacturer
Hitachi CEL 9200
Lead Frame material:
Copper
Lead Finish, composition:
Solder Plated, 90%Sn, 10%Pb
Die Attach Area Plating:
Silver Spot
Die Attach Method:
Epoxy
Die Attach Material:
Ablestik 8361H
Wire Bond Method:
Thermosonic
JESD22-A112 Moisture Sensitivity Level
Wire Material/Size:
Gold / 1.0/1.3 mil
Level 1
:
Name/Location of Assembly (prime facility )
Cypress Philippines (CSPI-R)
PRODUCT DESCRIPTION (for qualification)
Information provided in this document is intended for generic qualification and technically describes the Cypress part
supplied:
CY7C199
Marketing Part #:
32K x 8 Static RAM, R42HD Technology , 28-pin, 300-mil SOJ
Device Description:
Cypress Semiconductor Corporation – MPD Division
Cypress Division:
Overall Die (or Mask) REV Level (pre-requisite for qualification):
What ID markings on Die:
Rev G.
7C1599C
TECHNOLOGY/FAB PROCESS DESCRIPTION – RAM42
Number of Metal Layers:
2
Passivation Type and Materials:
Free Phosphorus contents in top glass layer(%):
Metal
Metal 1: 500Å TiW/6000Å Al -5%Cu/1200Å TiW
Composition: Metal 2: 500Å TiW/8000Å Al -5%Cu/300Å TiW
7000Å SiO2
0%
+ 6000Å Si3N4
Generic Process Technology/Design Rule (µ-drawn): CMOS, Double Metal /0.42 m
Gate Oxide Material/Thickness (MOS):
SiO2 / 110Å
Name/Location of Die Fab (prime) Facility:
Cypress Semiconductor - Bloomington, MN
Die Fab Line ID/Wafer Process ID:
Fab4/R42HD
Note: Please contact a Cypress Representative for other packages availability.
Company Confidential
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Page 3 of 8
Document No.001-88022 Rev. *A
ECN # 4417735
RELIABILITY TESTS PERFORMED
Stress/Test
Test Condition
(Temp/Bias)
Result
P/F
High Temperature Operating Life
Latent Failure Rate
Dynamic Operating Condition, Vcc = 5.75V, 150°C
JESD22-A108
P
Extended Dynamic Burn-in
Dynamic Operating Condition, Vcc = 5.75V, 150°C
JESD22-A108
P
Read and Record Life Test
Dynamic Operating Condition, Vcc = 5.75V, 150°C
JESD22-A108
P
High Temperature Steady State Life
Static Operating Condition, Vcc = 5.75V, 150°C
JESD22-A108
P
High Accelerated Saturation Test
(HAST)
JEDEC STD 22-A110: 140°C, 85%RH, 5.5V
Precondition: JESD22 Moisture Sensitivity Level
P
(192 Hrs., 30C, 60% RH)
Temperature Cycle
MIL-STD-883, Method 1010, Condition C, -65°C to 150°C
Precondition: JESD22 Moisture Sensitivity Level 3
(192 Hrs, 30C/60%RH)
P
Cold Life Test
Dynamic Operating Condition, Vcc = 6.5V, -45 °C
P
JESD22-A108
High Temp Storage
JESD22-A103:165°C, No bias
P
Electrostatic Discharge
Human Body Model (ESD-HBM)
2,200V MIL-STD-883, Method 3015.7
P
Electrostatic Discharge
Charge Device Model (ESD-CDM)
1000V, JESD22-C101
P
11.10V / 7.3V
Latchup Sensitivity
In accordance with JEDEC 17
P
Current Density
Meet Technology Device Level Reliability Specifications
P
Aged Bond Pull
MIL-STD-883, Method 2011
P
Static Latchup/ Dynamic Latchup
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Page 4 of 8
Document No.001-88022 Rev. *A
ECN # 4417735
RELIABILITY FAILURE RATE SUMMARY
Stress/Te
st
High Temperature Operating Life
Early Failure Rate
1,2,
High Temperature Operating Life
Long Term Failure Rate
1
2
3
Device Tested/
Device Hours
#
Fails
Activation
Energy
Thermal
AF4
Failure Rate
3020
0
N/A
N/A
0 PPM
791,500 DHRs
0
170
7 FIT
0.7
Assuming an ambient temperature of 55C and a junction temperature rise of 15C.
Chi-squared 60% estimations used to calculate the failure rate..
Thermal Acceleration Factor is calculated from the Arrhenius equation
E  1 1  
AF = exp  A  -  
 k  T 2 T1  
where:
EA =The Activation Energy of the defect mechanism.
-5
k = Boltzmann's constant = 8.62x10 eV/Kelvin.
T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device at
use conditions.
4
Long Term Failure Rate is based on 1 Meg SRAM, R42HD Technology qualification, QTP#98064
.
Company Confidential
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Page 5 of 8
Document No.001-88022 Rev. *A
ECN # 4417735
Reliability Test Data
QTP #: 98424
Device
STRESS:
Fab Lot #
Assy Lot #
Ass Loc
Duration
Samp
Rej
HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE (150C, 5.75V)
CY7C199-VC
CSPI-R
4822196
619808550
48
1012
0
CY7C199-VC
CSPI-R
4822279
619809494
48
1008
0
CY7C199-VC
CSPI-R
4828707
619812830
48
1000
0
619812830
COMP
3
0
3
0
48
0
48
44
0
0
STRESS:
ESD-CHARGE DEVICE MODEL (1000V)
CY7C199-VC
STRESS:
4828707
CSPI-R
4828707
619812830
COMP
PRESSURE COOKER TEST (121C, 100%RH)
CY7C199-VC
STRESS:
CSPI-R
ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015 (2200V)
CY7C199-VC
STRESS:
Failure Mechanism
CSPI-R
4828707
619812830
168
TC COND. C, -65 TO 150C, PRECOND. 168 HRS 85C/85%RH (MSL 1)
CY7C199-VC
CY7C199-VC
CSPI-R
CSPI-R
4828707
4934352
619812830
619928997
300
1000
Company Confidential
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Page 6 of 8
Document No.001-88022 Rev. *A
ECN # 4417735
Reliability Test Data
QTP #: 98064
Device
STRESS:
Fab Lot #
Duration
Samp
Rej
INDNS-O
4738602
519712560
COMP
3
0
INDNS-O
4738602
519712560
COMP
3
0
HI-ACCEL SATURATION TEST (140C, 5.5V), PRECOND. 192 HRS 30C/60%RH
CY7C109-VC
INDNS-O
4738602
519712560
128
46
0
CY7C109-VC
CY7C109-VC
INDNS-O
INDNS-O
4738564
4738564
519712898
519712898
128
256
46
46
0
0
CY7C109-VC
INDNS-O
4739644
519714390
128
46
0
STRESS:
HIGH TEMPERATURE STORAGE (165C, NO BIAS)
CY7C109-VC
INDNS-O
4738602
519712560
336
46
0
CY7C109-VC
INDNS-O
4738602
519712560
500
46
0
CY7C109-VC
INDNS-O
4738602
519712560
1000
46
0
STRESS:
HIGH TEMP STEADY STATE LIFE TEST (150C, 5.75V)
CY7C109-VC
CY7C109-VC
INDNS-O
INDNS-O
4738602
4738602
519712560
519712560
80
168
78
78
0
0
CY7C109-VC
CY7C109-VC
INDNS-O
INDNS-O
4739644
4739644
519714390
519714390
80
168
78
78
0
0
STRESS:
HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE (150C, 5.75V)
CY7C109-VC
CY7C109-VC
INDNS-O
INDNS-O
4739644
4739644
519714390
519714390
80
500
528
527
0
0
CY7C109-VC
CY7C109-VC
INDNS-O
INDNS-O
4745042
4745042
519800651L1
519800651L1
80
500
529
529
0
0
519714390
1000
527
0
519712560
519712560
500
1000
45
45
0
0
48
500
10
10
0
0
STRESS:
EXTENDED DYNAMIC BURN-IN (150C, 5.75V)
CY7C109-VC
STRESS:
4739644
INDNS-O
INDNS-O
4738602
4738602
READ & RECORD LIFE TEST (150C, 5.75V)
CY7C109-VC
CY7C109-VC
STRESS:
INDNS-O
COLD LIFE TEST (-30C, 6.5V)
CY7C109-VC
CY7C109-VC
STRESS:
Failure Mechanism
ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2200V
CY7C109-VC
STRESS:
Ass Loc
ESD-CHARGE DEVICE MODEL, 1000V
CY7C109-VC
STRESS:
Assy Lot #
INDNS-O
INDNS-O
4738602
4738602
519712560
519712560
TC COND. C, -65 TO 150C, PRECOND. 192 HRS 30C/60%RH
CY7C109-VC
CY7C109-VC
INDNS-O
INDNS-O
4738602
4738602
519712560
519712560
300
1000
46
46
0
0
CY7C109-VC
INDNS-O
4738564
519712898
300
46
0
CY7C109-VC
INDNS-O
4739644
519714390
300
46
0
Company Confidential
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Page 7 of 8
Document No.001-88022 Rev. *A
ECN # 4417735
Document History Page
Document Title:
Document Number:
QTP #98424: 256K STATIC SRAM (CY7C194/195/197/199) - R42DH TECHNOLOGY - FAB 4
001-88022
Rev. ECN
Orig. of
No.
Change
**
4033729 ILZ
*A
4417735 JYF
Description of Change
Initial Spec Release
Qualification report published on Cypress.com is not in spec format.
Initiated spec for QTP 98424 and removed all Cypress reference spec
and replaced with Industry standard.
Updated package availability based on current qualified assembly
Sunset review:
Updated QTP title page;
Updated Reliability Tests Performed table:
- Added industry standard of LFR, Extended Dynamic Burn-In,
Read and Record Life Test, HTSSL, HAST, HTS, Cold Life Test
and HTS .
Distribution: WEB
Posting:
None
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Page 8 of 8