Cypress Semiconductor Product Qualification Report QTP# 022505 VERSION 2.0 June, 2003 PSoC Microcontrollers Family S4AD-5 Technology, Fab 2 CY8C25122 4K Flash x 256 SRAM CY8C26233 8K Flash x 256 SRAM CY8C26443 CY8C26643 16K Flash x 256 SRAM CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA: Ed Russell Reliability Director (408) 432-7069 Bill Stevenson Reliability Engineering (408) 456-1926 Cypress Semiconductor PSoC Microcontrollers family, S4AD-5, Fab 2 Device: CY8C25xxx/26xxx QTP# 022505, V, 2.0 Page 2 of 14 June, 2003 PRODUCT QUALIFICATION HISTORY Qual Report Description of Qualification Purpose Date Comp 010702 New Technology S4AD-5 / New Product, Programmable Clock Generator, CY2414ZC, its product family and bond option. Apr 01 003605 Technology Derivative S4D-5 /New Neuron Devices, CY7C53150 and CY7C53120 Jul 01 013507 New PSoC CY8C25xxx/26xxx device and its product family Sept 01 022505 Three layer mask change to enhance functionality Jul 02 Cypress Semiconductor PSoC Microcontrollers family, S4AD-5, Fab 2 Device: CY8C25xxx/26xxx QTP# 022505, V, 2.0 Page 3 of 14 June, 2003 PRODUCT DESCRIPTION (for qualification) Qualification Purpose: Qualify New device CY8C25xxx/CY8C26xxx and its product family in Technology S4D-5 in Fab 2 Marketing Part #: CY8C25122, CY8C26233, CY8C26443, CY8C26643 Device Description: 3.3V and 5.5V, Industrial, available in 8/16/20/28/48 lead PDIP, 20/28/-lead SOIC, 20/28/48-lead SSOP and 44-lead TQFP package respectively. Cypress Division: Cypress Microsystems Inc Subsidiary– (CMS) WA Overall Die (or Mask) REV Level (pre-requisite for qualification): What ID markings on Die: Rev. D 8C25001A TECHNOLOGY/FAB PROCESS DESCRIPTION S4AD-5 Number of Metal Layers: 2 Metal Composition: Metal 1: 500A Ti/6,000A Al 0.5% Cu /1,200A TiW Metal 2: 500A Ti/8,000A Al 0.5% Cu/300A TiW Passivation Type and Materials: 3,000A TeOs / 6,000A Si3N4 Free Phosphorus contents in top glass layer(%): 0% Number of Transistors in Device: 300,000 Number of Gates in Device 50,000 Generic Process Technology/Design Rule ( -drawn): Single Poly, Double Metal, 0.35 m Gate Oxide Material/Thickness (MOS): SiO2 / 110A Name/Location of Die Fab (prime) Facility: Cypress Semiconductor - Round Rock, TX Die Fab Line ID/Wafer Process ID: Fab2, S4AD-5 PACKAGE AVAILABILITY PACKAGE ASSEMBLY SITE FACILITY 8/20/28-lead PDIP Omedata Indonesia 48-lead PDIP Alphatec Thailand 20/28-lead SOIC Omedata Indonesia 20/28-lead SSOP OSE Taiwan 48-lead SSOP Cypress CML-R 44-pin TQFP ASE Taiwan Note: Package Qualification details upon request. Cypress Semiconductor PSoC Microcontrollers family, S4AD-5, Fab 2 Device: CY8C25xxx/26xxx QTP# 022505, V, 2.0 Page 4 of 14 June, 2003 MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION Package Designation: Package Outline, Type, or Name: Mold Compound Name/Manufacturer: Mold Compound Flammability Rating: P283 28-lead Plastic-Dual-In Line Plastic (PDIP) NITTO MP8000CH V-O per UL94 Oxygen Rating Index: >28% Lead Frame Material: Copper Lead Finish, Composition / Thickness: Solder Plate, 85%Sn, 15%Pb Die Backside Preparation Method/Metallization: N/A Die Separation Method: Wafer Saw Die Attach Supplier: Ablestik Die Attach Material: 8361H Die Attach Method: Epoxy Bond Diagram Designation: 10-04020 Wire Bond Method: Thermosonic Wire Material/Size: Au, 1.3mil Thermal Resistance Theta JA °C/W: 56.96°C/W Package Cross Section Yes/No: N/A Assembly Process Flow: 49-70027 Name/Location of Assembly (prime) facility: OMEDATA Indonesia (INDNS-O) ELECTRICAL TEST / FINISH DESCRIPTION Test Location: OMEDATA Indonesia (INDNS-O) Fault Coverage: 100% Note: Please contact a Cypress Representative for other packages availability. Cypress Semiconductor PSoC Microcontrollers family, S4AD-5, Fab 2 Device: CY8C25xxx/26xxx QTP# 022505, V, 2.0 Page 5 of 14 June, 2003 RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT Stress/Test Test Condition (Temp/Bias) Result P/F High Temperature Operating Life Dynamic Operating Condition, Vcc Max=5.75V, 125°C Early Failure Rate Dynamic Operating Condition, Vcc Max=5.75V, 150°C High Temperature Operating Life Dynamic Operating Condition, Vcc Max=5.75V, 125°C P MIL-STD-883C, Method 1010, Condition C, -65°C to 150°C P P Latent Failure Rate Temperature Cycle Precondition: JESD22 Moisture Sensitivity MSL 3 192 Hrs., 30°C/60%RH+3IR-Reflow, 235°C+5, -0°C Precondition: JESD22 Moisture Sensitivity MSL 1 168 Hrs, 85C/85%RH+3IR-Reflow, 235°C+5, 0°C Pressure Cooker P 121°C, 100%RH MIL-STD-883C, Method 1010, Condition C, -65°C to 150°C High Accelerated Saturation Test (HAST) Precondition: JESD22 Moisture Sensitivity MSL 3 192 Hrs., 30°C/60%RH+3IR-Reflow, 235°C+5, -0°C Precondition: JESD22 Moisture Sensitivity MSL 1 168 Hrs, 85C/85%RH+3IR-Reflow, 235°C+5, 0°C 130°C, 5.5V, 85%RH Precondition: P JESD22 Moisture Sensitivity MSL 3 192 Hrs., 30°C/60%RH+3IR-Reflow, 235°C+5, -0°C 130°C, 3.63V, 85%RH Precondition: JESD22 Moisture Sensitivity MSL 1 168 Hrs, 85C/85%RH+3IR-Reflow, 235°C+5, 0°C Data Retention 150°C ± 5°C no bias P High Temperature Steady State Life 150°C, 363V, Vcc Max P Electrostatic Discharge 2,200V P Human Body Model (ESD-HMB) 2,000V MIL-STD-883, Method 3015.7 Electrostatic Discharge Charge Device Model (ESD-CDM) 500V Cypress Spec. 25-00020 P Cypress Semiconductor PSoC Microcontrollers family, S4AD-5, Fab 2 Device: CY8C25xxx/26xxx QTP# 022505, V, 2.0 Page 6 of 14 June, 2003 RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT (continuation) Stress/Test Test Condition (Temp/Bias) Result P/F Age Bond Strength MIL-STD-883C, Method 2011 P Acoustic Microscopy , MSL1, MSL3 Cypress Spec. 25-00104 P Current Density Cypress Spec. 22-00029 P Low Temperature Operating Life -30C, 4.3V, 8MHZ P Sem X-Section MIL-STD-883C, Method 2018-2 P Endurance Test MIL-STD-883C, Method 1033 P Dynamic Latchup Sensitivity Cypress Spec. 01-00081 P Static Latchup Sensitivity 125°C, ± 300mA P In accordance with JEDEC 17. Cypress Spec. 01-00081 Cypress Semiconductor PSoC Microcontrollers family, S4AD-5, Fab 2 Device: CY8C25xxx/26xxx QTP# 022505, V, 2.0 Page 7 of 14 June, 2003 RELIABILITY FAILURE RATE SUMMARY Device Tested/ Device Hours # Fails Activation Energy Thermal3 A.F Failure Rate4 High Temperature Operating Life Early Failure Rate 9,107 Devices 3 N/A N/A 329 PPM High Temperature Operating Life1,2 Long Term Failure Rate 676,799 DHRs 1 0 .7 170 9 FITs Stress/Test 1 2 3 Assuming an ambient temperature of 55°C and a junction temperature rise of 15°C. Chi-squared 60% estimations used to calculate the failure rate. Thermal Acceleration Factor is calculated from the Arrhenius equation E 1 1 AF = exp A - k T 2 T1 where: EA =The Activation Energy of the defect mechanism. k = Boltzmann's constant = 8.62x10-5 eV/Kelvin. T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device at use conditions. 4 4 EFR Failure Rate based on QTP #022505, QTP #013507, QTP #003605 and QTP #010702. LFR FIT Rate based on QTP #013507, QTP #003605 and QTP #010702. Cypress Semiconductor PSoC Microcontrollers family, S4AD-5, Fab 2 Device: CY8C25xxx/26xxx QTP# 022505, V, 2.0 Page 8 of 14 June, 2003 Reliability Test Data QTP #: Device Fab Lot # 010702 Assy Lot # Assy Loc Duration Samp Rej Failure Mechanism STRESS: ACOUSTIC-MSL1 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T COMP 15 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T COMP 15 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T COMP 15 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 150C, 3.8V, Vcc Max CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 48 1005 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 48 1004 1 NON VISUAL CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 48 1005 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, 3.8V, Vcc Max CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 80 120 0 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 500 120 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 80 120 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 500 120 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 80 120 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 500 120 0 STRESS: AGE BOND STRENGTH CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T COMP 15 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T COMP 15 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T COMP 15 0 TAIWN-T COMP 3 0 TAIWN-T 500 48 0 STRESS: DYNAMIC LATCH-UP TESTING, 11.5V CY2414ZC (7C841400A) 2101502 610106170/1/2 STRESS: LOW TEMPERATURE OPERATING LIFE, -30C, 4.3V CY2414ZC (7C841400A) 2101502 610106170/1/2 STRESS: ESD-CHARGE DEVICE MODEL, 500V CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T COMP 9 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T COMP 9 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T COMP 9 0 Cypress Semiconductor PSoC Microcontrollers family, S4AD-5, Fab 2 Device: CY8C25xxx/26xxx QTP# 022505, V, 2.0 Page 9 of 14 June, 2003 Reliability Test Data QTP #: Device Fab Lot # Assy Lot # 010702 Assy Loc Duration Samp Rej Failure Mechanism STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,000V CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T COMP 9 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T COMP 9 0 CY2414ZC (7C841400A) 2103764 610106177 TAIWN-T COMP 10 0 STRESS: STATIC LATCH-UP TESTING, 125C, 10V, ±300mA CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T COMP 3 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T COMP 3 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T COMP 3 0 STRESS: HI-ACCEL SATURATION TEST, 130C, 85%RH, 3.63V, PRE COND 168 HR 85C/85%RH, MSL1 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 128 50 0 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 256 50 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 128 48 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 128 48 0 STRESS: HIGH TEMP STEADY STATE LIFE TEST, 150C, 3.63V CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 80 80 0 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 168 80 0 610106170/1/2 TAIWN-T COMP 45 0 STRESS: ENDURANCE TEST CY2414ZC (7C841400A) 2101502 STRESS: DATA RETENTION, PLASTIC, 150C CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 168 80 0 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 552 80 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 168 80 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 552 80 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 168 80 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 552 80 0 Cypress Semiconductor PSoC Microcontrollers family, S4AD-5, Fab 2 Device: CY8C25xxx/26xxx QTP# 022505, V, 2.0 Page 10 of 14 June, 2003 Reliability Test Data QTP #: Device Fab Lot # Assy Lot # 010702 Assy Loc Duration Samp Rej STRESS: PRESSURE COOKER TEST, 121C, 100%RH, PRE COND 168 HR 85C/85%RH, MSL1 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 168 50 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 168 49 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 168 51 0 STRESS: TC COND. C -65C TO 150C, PRECONDITION 168 HRS 85C/85%RH, MSL1 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 300 50 0 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 500 50 0 CY2414ZC (7C841400A) 2101502 610106170/1/2 TAIWN-T 1000 50 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 300 50 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 500 50 0 CY2414ZC (7C841400A) 2052404 610106173/4/5 TAIWN-T 1000 50 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 300 50 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 500 50 0 CY2414ZC (7C841400A) 2103764 610106176/7/8 TAIWN-T 1000 49 0 Failure Mechanism Cypress Semiconductor PSoC Microcontrollers family, S4AD-5, Fab 2 Device: CY8C25xxx/26xxx QTP# 022505, V, 2.0 Page 11 of 14 June, 2003 Reliability Test Data QTP #: Device Fab Lot # 003605 Assy Lot # Assy Loc Duration Samp Rej CY7C53150-AI (7C53150A) 2104858 610109389/90 TAIWN-G COMP 15 0 CY7C53150-AI(7C53150B) 2110601 610115306 TAIWN-G COMP 15 0 CY7C53150-AI (7C53150B) 2113874 340100160/1 TAIWN-G COMP 15 0 Failure Mechanism STRESS: ACOUSTIC-MSL3 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 150C, 5.75V, Vcc Max CY7C53120-SI (7C53120B) 2110601 610119962 CSPI-R 80 394 0 CY7C53120-SI (7C53120B) 2113874 610119334 CSPI-R 80 591 0 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 5.75V, Vcc Max CY7C53120-SI (7C53120B) 2110601 610119962 CSPI-R 96 609 1 CY7C53120-SI (7C53120B) 2113874 610119334/7707 CSPI-R 96 414 0 MISSING LICON STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, 5.75V, Vcc Max CY7C53120-SI (7C53120B) 2110601 610119962 CSPI-R 197 393 0 CY7C53120-SI (7C53120B) 2110601 610119962 CSPI-R 500 393 0 CY7C53120-SI (7C53120B) 2113874 610119334 CSPI-R 197 400 1 CY7C53120-SI (7C53120B) 2113874 610119334 CSPI-R 500 399 0 COMP 9 0 UNKNOWN STRESS: ESD-CHARGE DEVICE MODEL, 500V CY7C53150-AI (7C53150B) 2110601 610115306 TAIWN-G STRESS: HI-ACCEL SATURATION TEST, 130C, 85%RH, 5.5V, PRE COND 192 Hrs., 30ºC/60%RH, MSL3 CY7C53150-AI (7C53150A) 2104858 610109389/90 TAIWN-G 128 48 0 CY7C53150-AI (7C53150B) 2110601 610115306 TAIWN-G 128 46 0 CY7C53150-AI (7C53150B) 2110601 610115306 TAIWN-G 256 46 0 COMP 9 0 STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,000V CY7C53150-AI (7C53150B) 2110601 610115306 TAIWN-G STRESS: STATIC LATCH-UP TESTING, 125C, 12V, ±300mA CY7C53150-AI (7C53150A) 2104858 610109389/90 TAIWN-G COMP 3 0 CY7C53150-AI (7C53150B) 2110601 610115306 TAIWN-G COMP 3 0 TAIWN-G 1000 48 0 STRESS: ENDURANCE TEST, -25C/+85 CY7C53150-AI (7C53150B) 2110601 610115306 Cypress Semiconductor PSoC Microcontrollers family, S4AD-5, Fab 2 Device: CY8C25xxx/26xxx QTP# 022505, V, 2.0 Page 12 of 14 June, 2003 Reliability Test Data QTP #: Device Fab Lot # Assy Lot # 003605 Assy Loc Duration Samp Rej STRESS: DATA RETENTION, PLASTIC, 150C CY7C53150-AI (7C53150B) 2110601 610115306 TAIWN-G 500 266 0 CY7C53150-AI (7C53150B) 2113874 340100160/1 TAIWN-G 500 266 0 STRESS: PRESSURE COOKER TEST, 121C, 100%RH), PRE COND 192 HR 30ºC/60%RH, MSL3 CY7C53150-AI (7C53150A) 2104858 610109389/90 TAIWN-G 168 50 0 CY7C53150-AI (7C53150B) 2110601 610115306 TAIWN-G 168 48 0 STRESS: TC COND. C -65C TO 150C, PRECONDITION 192 HR 30ºC/60%RH, MSL3 CY7C53150-AI (7C53150A) 2104858 610109389/90 TAIWN-G 300 50 0 CY7C53150-AI (7C53150A) 2104858 610109389/90 TAIWN-G 500 50 0 CY7C53150-AI (7C53150A) 2104858 610109389/90 TAIWN-G 1000 50 0 CY7C53150-AI (7C53150B) 2110601 610115306 TAIWN-G 300 48 0 CY7C53150-AI (7C53150B) 2110601 610115306 TAIWN-G 500 47 0 CY7C53150-AI (7C53150B) 2110601 610115306 TAIWN-G 1000 47 0 CY7C53150-AI (7C53150B) 2113874 340100180/1 TAIWN-G 300 48 0 CY7C53150-AI (7C53150B) 2113874 340100180/1 TAIWN-G 500 48 0 CY7C53150-AI (7C53150B) 2113874 340100180/1 TAIWN-G 1000 48 0 Failure Mechanism Cypress Semiconductor PSoC Microcontrollers family, S4AD-5, Fab 2 Device: CY8C25xxx/26xxx QTP# 022505, V, 2.0 Page 13 of 14 June, 2003 Reliability Test Data QTP #: Device Fab Lot # Assembly Lot # 013507 Assy Loc Duration Samp Rej Failure Mechanism STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 5.75V, Vcc Max CY8C26443 (8C26443A) 2115002 510105093 INDNS-0 96 1050 0 CY8C26443 (8C26443A) 2117164 510105252 INDNS-0 96 1075 1 STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 125C, 5.75V, Vcc Max CY8C26443 (8C26443A) 2115002 510105093 INDNS-0 168 267 0 CY8C26443 (8C26443A) 2115002 510105093 INDNS-0 500 267 0 CY8C26443 (8C26443A) 2115002 510105093 INDNS-0 1000 267 0 CY8C26443 (8C26443A) 2117164 510105252 INDNS-0 168 267 0 510104779 INDNS-0 COMP 15 0 STRESS: AGE BOND STRENGTH CY8C26443 (8C26443A) 2111640 STRESS: ESD-CHARGE DEVICE MODEL, 500V CY8C26443 (8C26443A) 2117164 610121060 CSPI-R COMP 9 0 CY8C26443 (8C26443A) 2111640 510104779 INDNS-0 COMP 9 0 STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V CY8C26443 (8C26443A) 2117164 610121060 CSPI-R COMP 9 0 CY8C26443 (8C26443A) 2111640 510104779 INDNS-0 COMP 9 0 INDNS-0 COMP 3 0 STRESS: STATIC LATCH-UP TESTING, 125C, 12V, ±300mA CY8C26443 (8C26443A) 2111640 510104779 STRESS: DATA RETENTION, PLASTIC, 150C CY8C26443 (8C26443A) 2115002 510105093 INDNS-0 168 46 0 CY8C26443 (8C26443A) 2117164 510105252 INDNS-0 168 46 0 STRESS: ENDURANCE TEST CY8C26443 (8C26443A) 2115002 510105093 INDNS-0 COMP 48 0 CY8C26443 (8C26443A) 2117164 510105252 INDNS-0 COMP 46 0 510104779 INDNS-0 168 47 0 STRESS: PRESSURE COOKER TEST 121C, 100%RH CY8C26443 (8C26443A) 2111640 STRESS: TC COND. C -65C TO 150C CY8C26443 (8C26443A) 2111640 510104779 INDNS-0 300 78 0 CY8C26443 (8C26443A) 2111640 510104779 INDNS-0 500 77 0 CY8C26443 (8C26443A) 2111640 510104779 INDNS-0 1000 78 0 ISB Failure Cypress Semiconductor PSoC Microcontrollers family, S4AD-5, Fab 2 Device: CY8C25xxx/26xxx QTP# 022505, V, 2.0 Page 14 of 14 June, 2003 Reliability Test Data QTP #: Device Fab Lot # Assembly Lot # 022505 Assy Loc Duration Samp Rej STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 5.75V, Vcc Max CY8C26443 (8C26443D) 2215932 510205367 INDNS-0 96 890 0 CY8C26443 (8C26443D) 2215932 510205368 INDNS-0 96 900 0 CY8C26443 (8C26443D) 2215932 510205407 INDNS-0 96 200 0 INDNS-0 COMP 9 0 INDNS-0 COMP 9 0 510205367/8 INDNS-0 COMP 3 0 STRESS: ESD-CHARGE DEVICE MODEL, 500V CY8C26443 (8C26443D) 2215932 510205367/8 STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V CY8C26443 (8C26443D) 2215932 510205367/8 STRESS: STATIC LATCH-UP TESTING, 125C, 12V, ±300mA CY8C26443 (8C26443D) 2215932 STRESS: TC COND. C -65C TO 150C CY8C26443 (8C26443D) 2215932 510205367/8 INDNS-0 300 48 0 CY8C26443 (8C26443D) 2215932 510205367/8 INDNS-0 500 48 0 Failure Mechanism