QTP#043805:ENCORE(TM) II DEVICE FAMILY S4AD-5 TECHNOLOGY, FAB 2

Document No. 001-81625 Rev. *A
ECN #: 4079955
Cypress Semiconductor
Product Qualification Report
QTP# 043805
July 2013
enCoRe™ II Device Family
S4AD-5 Technology, Fab 2
CY7C63310
CY7C638xx
CY7C639xx
enCoRe™ II Low-Speed USB
Peripheral Controller
CY7C60123
enCoRe™ II Microcontroller Die
CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA:
Mira Ben-Tzur
Reliability Director
(408) 943-2675
Zhaomin Ji
Principal Reliability Engineer
(408) 432-7021
Company Confidential
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Page 1 of 12
Document No. 001-81625 Rev. *A
ECN #: 4079955
PRODUCT QUALIFICATION HISTORY
QTP
Number
010702
043804
043805
Description of Qualification Purpose
New Technology S4AD-5 / New Product, Programmable Clock
Generator, CY2414ZC, its product family and bond option
7C6380AT Encore2 USB2CR device family from Fab2 using S4AD-5
technology
7C6390AT Encore2 USB5CR device family from Fab2 using S4AD-5
technology
Date
Apr 01
Mar 05
Mar 05
Company Confidential
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Page 2 of 12
Document No. 001-81625 Rev. *A
ECN #: 4079955
PRODUCT DESCRIPTION (for qualification)
Qualification Purpose: Qualify New device CY638xxx/CY7C639xxx and its product family in Technology S4D-5 in Fab 2
Marketing Part #:
CY7C63310, CY7C638xx, CY7C639xx, CY7C6123
Device Description:
Low Speed USB Peripheral Controller
Cypress Division:
Cypress Semiconductor Corporation – Data Communication Division
TECHNOLOGY/FAB PROCESS DESCRIPTION
Number of Metal Layers:
2
Metal Composition:
Metal 1: 500A Ti/6,000A Al 0.5% Cu /1,200A TiW
Passivation Type and Materials:
Metal 2: 500A Ti/8,000A Al 0.5% Cu/300A TiW
3,000A TeOs / 6,000A Si3N4
Free Phosphorus contents in top glass layer(%):
0%
Number of Transistors in Device:
279,000
Number of Gates in Device:
1,300
Generic Process Technology/Design Rule (-drawn): Single Poly, Double Metal, 0.35 m
Gate Oxide Material/Thickness (MOS):
SiO2 / 110A
Name/Location of Die Fab (prime) Facility:
Cypress Semiconductor - Round Rock, TX
Die Fab Line ID/Wafer Process ID:
Fab2, S4AD-5
PACKAGE AVAILABILITY
PACKAGE
ASSEMBLY FACILITY SITE
16/18/24-Lead SOIC
CML-RA, PHIL-M, JT-CHINA
16/18/24/40-Pin PDIP
X-THAILAND, CML-RA
28/48-Lead SSOP
OSE Taiwan – T, JT-CHINA
24-Lead QSOP
JT-CHINA
Wafer Sales/ Die Sales
N/A
Note: Package Qualification details upon request.
Company Confidential
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Page 3 of 12
Document No. 001-81625 Rev. *A
ECN #: 4079955
MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION
Package Designation:
Package Outline, Type, or Name:
Mold Compound Name/Manufacturer:
Mold Compound Flammability Rating:
Oxygen Rating Index:
PZ40
Lead Frame Material:
40-Lead Plastic Dual In-Line (PDIP)
MP-8000 / Nitto
V-0 PER UL-94
>28%
Copper
Lead Finish, Composition / Thickness:
100% Sn
Die Backside Preparation
Method/Metallization:
Backgrind
Die Separation Method:
Wafer Saw
Die Attach Supplier:
Ablestik
Die Attach Material:
8361
Die Attach Method:
Epoxy
Wire Bond Method:
Thermosonic
Wire Material/Size:
Au./ 1.0 mil
Thermal Resistance Theta JA °C/W:
67.4°C/W
Package Cross Section Yes/No:
N/A
Name/Location of Assembly (prime) facility:
INDNS-O (Obsolete Site)
ELECTRICAL TEST / FINISH DESCRIPTION
Test Location:
Cypress Phil (CML-R), KY-TAIWAN
Fault
Coverage:
100%
Note: Please contact a Cypress Representative for other package availability.
Company Confidential
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Page 4 of 12
Document No. 001-81625 Rev. *A
ECN #: 4079955
RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENTS
Stress/Test
Test Condition (Temp/Bias)
High Temperature Operating Life
Dynamic Operating Condition, Vcc Max=5.75V, 125C
Early Failure Rate (EFR)
Dynamic Operating Condition, Vcc Max=3.8V, 150C
JESD22-A108
High Temperature Operating Life
Dynamic Operating Condition, Vcc Max=3.8V, 150C
Latent Failure Rate (LFR)
JESD22-A108
Temperature Cycle
MIL-STD-883, Method 1010, Condition C, -65°C to 150°C
Result
P/F
P
P
P
Precondition: JESD22 Moisture Sensitivity Level 1
168 Hrs, 85C/85%RH+Reflow, 235C+0, -5C
High Accelerated Stress Test
130C, 3.63V, 85%RH, JESD22-A110
(HAST)
Precondition: JESD22 Moisture Sensitivity Level 1
P
168 Hrs, 85C/85%RH+ Reflow, 235C+0, -5C
High Temperature Steady State life
150C, 3.63V, Vcc Max, JESD22-A108
Low Temperature Operating Life
-30C, 4.3V, 8MHZ
P
P
JESD22-A108
Pressure Cooker
121C, 100%RH, 15Psig, JESD22-A102
P
Precondition: JESD22 Moisture Sensitivity Level 1
168 Hrs, 85C/85%RH+ Reflow, 235C+0, -5C
Aged Bond Strength
200C, 4hrs
MIL-STD-883, Method 2011
P
Data Retention
150°C ± 5°C No Bias, JESD22-A117 and JESD22-A103
P
Electrostatic Discharge
Human Body Model (ESD-HBM)
2,200V, JESD22-A114
P
Electrostatic Discharge
2,200V
Human Body Model (ESD-HBM)
MIL-STD-883, Method 3015.7
Electrostatic Discharge
500V, JESD22-C101
P
Charge Device Model (ESD-CDM)
Static Latch-up
± 300mA, 125C, In accordance with JEDEC 17
Dynamic Latch-up
125C, 11.5V
P
JESD78
Acoustic Microscopy
J-STD-020
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Page 5 of 12
P
Document No. 001-81625 Rev. *A
ECN #: 4079955
RELIABILITY FAILURE RATE SUMMARY
Stress/Test
High Temperature Operating Life
1
Early Failure Rate
1, 2
High Temperature Operating Life
Long Term Failure Rate
1
2
3
Device Tested/
Device Hours
#
Fails
Activation
Energy
Thermal
AF3
Failure Rate
1,015 Devices
0
N/A
N/A
0 ppm
180,000 DHRs
0
0.7
170
30 FITs
Assuming an ambient temperature of 55C and a junction temperature rise of 15C.
Chi-squared 60% estimations used to calculate the failure rate.
Thermal Acceleration Factor is calculated from the Arrhenius equation
E  1 1  
AF = exp  A  -  
 k  T 2 T1  
where:
EA =The Activation Energy of the defect mechanism.
-5
K = Boltzmann’s constant = 8.62x10 eV/Kelvin.
T1 is the junction temperature of the device under stress and T2 is the junction temperature of the
device at use conditions.
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Page 6 of 12
Document No. 001-81625 Rev. *A
ECN #: 4079955
Reliability Test Data
QTP #: 010702
Device
Fab Lot #
Assy Lot #
Assy Loc Duration
Samp
Rej
Failure Mechanism
STRESS: ACOUSTIC-MSL1
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
COMP
15
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
COMP
15
0
CY2414ZC (7C841400A)
2103764
610106176/7/8
TAIWN-T
COMP
15
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 150C, 3.8V, Vcc Max
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
48
1005
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
48
1004
1 NON VISUAL
CY2414ZC (7C841400A)
2103764
610106176/7/8
TAIWN-T
48
1005
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 150C, 3.8V, Vcc Max
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
80
120
0
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
500
120
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
80
120
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
500
120
0
CY2414ZC (7C841400A)
2103764
610106176/7/8
TAIWN-T
80
120
0
CY2414ZC (7C841400A)
2103764
610106176/7/8
TAIWN-T
500
120
0
STRESS: AGE BOND STRENGTH
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
COMP
15
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
COMP
15
0
CY2414ZC (7C841400A)
2103764
610106176/7/8
TAIWN-T
COMP
15
0
TAIWN-T
COMP
3
0
TAIWN-T
500
48
0
STRESS: DYNAMIC LATCH-UP TESTING, 11.5V
CY2414ZC (7C841400A)
2101502
610106170/1/2
STRESS: LOW TEMPERATURE OPERATING LIFE, -30C, 4.3V
CY2414ZC (7C841400A)
2101502
610106170/1/2
STRESS: ESD-CHARGE DEVICE MODEL, 500V
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
COMP
9
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
COMP
9
0
CY2414ZC (7C841400A)
2103764
610106176/7/8
TAIWN-T
COMP
9
0
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Page 7 of 12
Document No. 001-81625 Rev. *A
ECN #: 4079955
Reliability Test Data
QTP #: 010702
Device
Fab Lot #
Assy Lot #
Assy Loc Duration
Samp
Rej
Failure Mechanism
STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,000V
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
COMP
9
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
COMP
9
0
CY2414ZC (7C841400A)
2103764
610106177
TAIWN-T
COMP
10
0
STRESS: STATIC LATCH-UP TESTING, 125C, 10V, 300mA
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
COMP
3
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
COMP
3
0
CY2414ZC (7C841400A)
2103764
610106176/7/8
TAIWN-T
COMP
3
0
STRESS: HI-ACCEL SATURATION TEST, 130C, 85%RH, 3.63V, PRE COND 168 HR 85C/85%RH, MSL1
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
128
50
0
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
256
50
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
128
48
0
CY2414ZC (7C841400A)
2103764
610106176/7/8
TAIWN-T
128
48
0
STRESS: HIGH TEMP STEADY STATE LIFE TEST, 150C, 3.63V
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
80
80
0
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
168
80
0
610106170/1/2
TAIWN-T
COMP
45
0
STRESS: ENDURANCE TEST
CY2414ZC (7C841400A)
2101502
STRESS: DATA RETENTION, PLASTIC, 150C
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
168
80
0
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
552
80
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
168
80
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
552
80
0
CY2414ZC (7C841400A)
2103764
610106176/7/8
TAIWN-T
168
80
0
CY2414ZC (7C841400A)
2103764
610106176/7/8
TAIWN-T
552
80
0
STRESS: PRESSURE COOKER TEST, 121C, 100%RH, PRE COND 168 HR 85C/85%RH, MSL1
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
168
50
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
168
49
0
CY2414ZC (7C841400A)
2103764
610106176/7/8
TAIWN-T
168
51
0
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Page 8 of 12
Document No. 001-81625 Rev. *A
ECN #: 4079955
Reliability Test Data
QTP #: 010702
Device
Fab Lot #
Assy Lot #
Assy Loc Duration
Samp
Rej
Failure Mechanism
STRESS: TC COND. C -65C TO 150C, PRECONDITION 168 HRS 85C/85%RH, MSL1
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
300
50
0
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
500
50
0
CY2414ZC (7C841400A)
2101502
610106170/1/2
TAIWN-T
1000
50
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
300
50
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
500
50
0
CY2414ZC (7C841400A)
2052404
610106173/4/5
TAIWN-T
1000
50
0
CY2414ZC (7C841400A)
2103764
610106176/7/8
TAIWN-T
300
50
0
CY2414ZC (7C841400A)
2103764
610106176/7/8
TAIWN-T
500
50
0
CY2414ZC (7C841400A)
2103764
610106176/7/8
TAIWN-T
1000
49
0
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Page 9 of 12
Document No. 001-81625 Rev. *A
ECN #: 4079955
Reliability Test Data
QTP #: 043804
Device
Fab Lot #
Assy Lot #
Assy Loc
Duration
Samp
Rej
Failure Mechanism
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 5.75V, Vcc Max
CY7C63913 (7C6391A)
2447432
510500455
INDNS-O
96
1015
0
INDNS-O
COMP
9
0
9
0
COMP
3
0
INDNS-O
COMP
3
0
510500455
INDNS-O
168
45
0
510500455
INDNS-O
300
45
0
STRESS: ESD-CHARGE DEVICE MODEL, 500V
CY7C63823 (7C6382A)
2447431
510500542
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 2,200V
CY7C63823 (7C6382A)
2447431
510500542
INDNS-O
COMP
STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V
CY7C63823 (7C6382A)
2447431
510500542
INDNS-O
STRESS: STATIC LATCH-UP TESTING, 125C, 9.0V, 300mA
CY7C63823 (7C6382A)
2447431
510500542
STRESS: PRESSURE COOKER TEST (121C, 100%RH)
CY7C63913 (7C6391A)
2447432
STRESS: TC COND. C -65C TO 150C
CY7C63913 (7C6391A)
2447432
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Page 10 of 12
Document No. 001-81625 Rev. *A
ECN #: 4079955
Reliability Test Data
QTP #: 043805
Device
Fab Lot #
Assy Lot #
Assy Loc
Duration
Samp
Rej
Failure Mechanism
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 5.75V, Vcc Max
CY7C63913 (7C6391A)
2447432
510500455
INDNS-O
96
1015
0
INDNS-O
COMP
9
0
9
0
COMP
3
0
INDNS-O
COMP
3
0
510500455
INDNS-O
168
45
0
510500455
INDNS-O
300
45
0
STRESS: ESD-CHARGE DEVICE MODEL, 500V
CY7C63913 (7C6391A)
2447432
510500455
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 2,200V
CY7C63913 (7C6391A)
2447432
510500455
INDNS-O
COMP
STRESS: ESD-HUMAN BODY CIRCUIT PER MIL STD 883, METHOD 3015, 2,200V
CY7C63913 (7C6391A)
2447432
510500455
INDNS-O
STRESS: STATIC LATCH-UP TESTING, 125C, 9.5V, 300mA
CY7C63913 (7C6391A)
2447432
510500455
STRESS: PRESSURE COOKER TEST (121C, 100%RH)
CY7C63913 (7C6391A)
2447432
STRESS: TC COND. C -65C TO 150C
CY7C63913 (7C6391A)
2447432
Company Confidential
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Page 11 of 12
Document No. 001-81625 Rev. *A
ECN #: 4079955
Document History Page
Document Title:
Document Number:
QTP# 043805: ENCORE (TM) II DEVICE FAMILY S4AD-5 TECHNOLOGY, FAB 2
001-81625
Rev. ECN
Orig. of
No.
Change
**
3689781 NSR
*A
4079955 JYF
Description of Change
Initial Spec Release.
Revision from the original qual report released in memo LGQ-214:
- Updated the QTP 043805 Version 1.0 to Version 2.0.
- Added device CY7C60123in the title page.
- Changed the contact Reliability Engineer to Zhaomin Ji.
- Changed the device description to Low Speed USB Peripheral
Controller.
- Changed the product division from CCD to DCD.
Removed the Overall Die (or Mask) REV Level (pre-requisite for
qualification) and What ID markings on Die in the ‘PRODUCT
DESCRIPTION’ table to align with the current template.
- Updated the Assembly Facility site.
- Added the wafer sales and die sales in package availability table.
- Removed obsolete spec Bond Diagram 10-06151 and Assembly
Process Flow 49-70095.
- Updated the electrical test/ finish location.
- Replaced the reference Cypress standards with the industry
standards on the reliability tests performed table.
Sunset Review:
Removed Version 2.0 in QTP title page;
Updated Reliability Tests Performed table:
- Deleted Rev. C in MIL-STD-883 reference.Revision changes from time
to time.
- Added referenced industry standards of LTOL and Dynamic Latch-up;
- Deleted “3IR” in reflow step of TCT, HAST, PCT.
Distribution: WEB
Posting:
None
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Page 12 of 12