042809 rev 4.0, S4AD-5CTI, 8C24xxx, Automotive.pdf

Cypress Semiconductor
Product Qualification Report
QTP# 042809 VERSION 4.0
October 2006
Automotive PSoC Mixed Signal Array Family
S4AD-5CTI Technology, Fab 2
CY8C24223A
CY8C24423A
Mixed Signal Array with On-Chip
Controller
CYPRESS TECHNICAL CONTACT FOR QUALIFICATION DATA:
Rene Rodgers
Principal Reliability Engineer
(408) 943-2732
Mira Ben T-Zur
Quality Engineering Director
(408) 943-2675
Cypress Semiconductor
Automotive PSoC Mixed-Signal Array family, S4AD-5CTI, Fab 2
Device: CY8C24xxx
QTP# 042809, V, 4.0
Page 2 of 11
October 2006
PRODUCT QUALIFICATION HISTORY
Qual
Report
Description of Qualification Purpose
Date
Comp
042702
Automotive PSoC 8C27243/443/643 Rev B Device Product Family on S4AD-5CTI Technology,
Fab2
Nov 04
042809
Automotive PSoC 8C24xxx Rev B Device Product Family on S4AD-5CTI Technology, Fab2
Nov 04
Cypress Semiconductor
Automotive PSoC Mixed-Signal Array family, S4AD-5CTI, Fab 2
Device: CY8C24xxx
QTP# 042809, V, 4.0
Page 3 of 11
October 2006
PRODUCT DESCRIPTION (for qualification)
Qualification Purpose: Qualify CY8C24xxx product family in Technology S4D-5CTI in Fab 2 for Automotive Application
Marketing Part #:
CY8C24223A, CY8C24423A
Device Description:
5V, Automotive, available in 20/28-Lead SSOP
Cypress Division:
Cypress Semiconductor – Consumer and Computation Division
Overall Die (or Mask) REV Level (pre-requisite for qualification):
What ID markings on Die:
Rev. B
8C24000B
TECHNOLOGY/FAB PROCESS DESCRIPTION
Number of Metal Layers:
2
Metal Composition:
S4AD-5CTI
Metal 1: 500A Ti/6000A Al 0.5% Cu /1200A TiW
Metal 2: 500A Ti/8000A Al 0.5% Cu/300A TiW
Passivation Type and Materials:
3,000A TeOs / 6000A Si3N4
Free Phosphorus contents in top glass layer (%):
0%
Number of Transistors in Device:
150,000
Number of Gates in Device
25,000
Generic Process Technology/Design Rule ( -drawn):
Single Poly, Double Metal, 0.35 m
Gate Oxide Material/Thickness (MOS):
SiO2 / 110A
Name/Location of Die Fab (prime) Facility:
Cypress Semiconductor - Round Rock, TX
Die Fab Line ID/Wafer Process ID:
Fab2, S4AD-5CTI SONOS
PACKAGE AVAILABILITY
PACKAGE
ASSEMBLY SITE FACILITY
20/28-Lead SSOP
OSE-Taiwan (TAIWN-T)
Note: Package Qualification details upon request.
Cypress Semiconductor
Automotive PSoC Mixed-Signal Array family, S4AD-5CTI, Fab 2
Device: CY8C24xxx
MAJOR PACKAGE INFORMATION USED IN THIS QUALIFICATION
Package Designation:
Package Outline, Type, or Name:
Mold Compound Name/Manufacturer:
Mold Compound Flammability Rating:
SP28
28-lead Shrunk Small Outline Packages (SSOP)
Hitachi CEL9220HF
V-O per UL94
Oxygen Rating Index:
>28%
Lead Frame Material:
Copper
Lead Finish, Composition / Thickness:
Sn Matte (100% Sn)
Die Backside Preparation Method/Metallization:
N/A
Die Separation Method:
Sawing 100%
Die Attach Supplier:
Ablestik
Die Attach Material:
8340
Die Attach Method:
Epoxy (Conductive)
Bond Diagram Designation:
10-05890
Wire Bond Method:
Thermosonic
Wire Material/Size:
Au, 1.0mil
Thermal Resistance Theta JA °C/W:
116° C/W
Package Cross Section Yes/No:
N/A
Assembly Process Flow:
49-35999
Name/Location of Assembly (prime) facility:
OSE-Taiwan
ELECTRICAL TEST / FINISH DESCRIPTION
Test Location:
CML-R
Note: Please contact a Cypress Representative for other packages availability.
QTP# 042809, V, 4.0
Page 4 of 11
October 2006
Cypress Semiconductor
Automotive PSoC Mixed-Signal Array family, S4AD-5CTI, Fab 2
Device: CY8C24xxx
QTP# 042809, V, 4.0
Page 5 of 11
October 2006
RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT
Stress/Test
Test Condition
(Temp/Bias)
High Temperature Operating Life
Dynamic Operating Condition, Vcc Max=3.8V, 150°C
Early Failure Rate
Dynamic Operating Condition, Vcc Max=5.5V, 125°C
High Temperature Operating Life
Dynamic Operating Condition, Vcc Max=3.8V, 150°C
Latent Failure Rate
Dynamic Operating Condition, Vcc Max=5.5V, 125°C
Temperature Cycle
MIL-STD-883C, Method 1010, Condition C, -65°C to 150°C
Result
P/F
P
P
P
Precondition: JESD22 Moisture Sensitivity MSL 1
168 Hrs, 85C/85%RH+3IR-Reflow, 260°C+0, -5°C
Pressure Cooker
121°C, 100%RH
P
Precondition: JESD22 Moisture Sensitivity MSL 1
168 Hrs, 85C/85%RH+3IR-Reflow, 260°C+0, -5°C
High Accelerated Saturation Test
(HAST)
130°C, 5.5V, 85%RH, 130°C, 3.63V, 85%RH
P
Precondition: JESD22 Moisture Sensitivity MSL 1
168 Hrs, 85C/85%RH+3IR-Reflow, 260°C+0, -5°C
Data Retention
150°C ± 5°C no bias
P
High Temperature Steady State Life
150°C, 3.63V, Vcc Max
P
Electrostatic Discharge
Human Body Model (ESD-HBM)
500V/1000V/1500V/2000V
Electrostatic Discharge
2,200V, 2,000V
Human Body Model (ESD-HBM)
MIL-STD-883, Method 3015.7
Electrostatic Discharge
P
Charge Device Model (ESD-CDM)
250V/500V/750V (corner pins only)
Cypress Spec. 25-00020
Age Bond Strength
MIL-STD-883C, Method 2011
P
Acoustic Microscopy
Cypress Spec. 25-00104
P
Low Temperature Operating Life
-30C, 4.3V, 8MHZ
P
Endurance Test
MIL-STD-883C, Method 1033
P
Dynamic Latchup Sensitivity
Cypress Spec. 01-00081
P
Static Latchup Sensitivity
125°C, ± 300mA
P
JESD22, Method A114-B
Cypress Spec. 01-00081
P
P
Cypress Semiconductor
Automotive PSoC Mixed-Signal Array family, S4AD-5CTI, Fab 2
Device: CY8C24xxx
QTP# 042809, V, 4.0
Page 6 of 11
October 2006
RELIABILITY TESTS PERFORMED PER SPECIFICATION REQUIREMENT
Stress/Test
Test Condition
(Temp/Bias)
Result
P/F
Ball Shear
Cypress Spec 24-00018
P
Bond Pull
Cypress Spec 24-00002
P
Electrical Distribution
AEC-Q100-009
P
External Visual
Cypress Spec 25-00038
P
Physical Dimensions
Cypress Spec. 25-00031
P
High Temperature Storage
150°C ± 5°C, no bias
P
Solderability
Cypress Spec. 25-00018
P
Cypress Semiconductor
Automotive PSoC Mixed-Signal Array family, S4AD-5CTI, Fab 2
Device: CY8C24xxx
QTP# 042809, V, 4.0
Page 7 of 11
October 2006
RELIABILITY FAILURE RATE SUMMARY
Device Tested/
Device Hours
#
Fails
Activation
Energy
Thermal3
A.F
Failure
Rate
High Temperature Operating Life
Early Failure Rate @125C
3,372 Devices
0
N/A
N/A
0 PPM
High Temperature Operating Life1,2
Long Term Failure Rate
232,000 DHRs
0
0 .7
55
71 FITs *
Stress/Test
1
2
3
Assuming an ambient temperature of 55°C and a junction temperature rise of 15°C.
Chi-squared 60% estimations used to calculate the failure rate.
Thermal Acceleration Factor is calculated from the Arrhenius equation
E  1 1  
AF = exp  A  -  
 k  T 2 T1  
where:
EA =The Activation Energy of the defect mechanism.
k = Boltzmann's constant = 8.62x10-5 eV/Kelvin.
T1 is the junction temperature of the device under stress and T2 is the junction temperature of the device
at use conditions.
*
Based on Automotive qual samples size not Commercial qual sample size.
Cypress Semiconductor
Automotive PSoC Mixed-Signal Array family, S4AD-5CTI, Fab 2
Device: CY8C24xxx
QTP# 042809, V, 4.0
Page 8 of 11
October 2006
Reliability Test Data
QTP #:
Device
Fab Lot #
Assy Lot #
Assy Loc
042702
Duration
Samp
Rej
STRESS: ACOUSTIC, MSL1
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
COMP
15
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
COMP
15
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
COMP
15
0
2403330
610438921
TAIWN-T
COMP
5
0
2403330
610438921
TAIWN-T
COMP
5
0
STRESS: BALL SHEAR
CY8C27443 (8C27443B)
STRESS: BOND PULL
CY8C27443 (8C27443B)
STRESS: DATA RETENTION
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
1000
94
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
1000
94
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
1000
92
0
STRESS: ELECTRICAL DISTRIBUTION
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
COMP
30
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
COMP
30
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
COMP
30
0
STRESS: ENDURANCE (DATA RETENTION)
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
COMP
94
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
COMP
94
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
1000
92
0
STRESS: EXTERNAL VISUAL
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
COMP
1317
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
COMP
1223
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
COMP
1400
0
TAIWN-T
COMP
3
0
TAIWN-T
COMP
3
0
COMP
6
0
STRESS: ESD-CHARGE DEVICE MODEL, 250V
CY8C27443 (8C27443B)
2403330
610438921
STRESS: ESD-CHARGE DEVICE MODEL, 500V
CY8C27443 (8C27443B)
2403330
610438921
STRESS: ESD-CHARGE DEVICE MODEL, 750V (Corner pins only)
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
Failure Mechanism
Cypress Semiconductor
Automotive PSoC Mixed-Signal Array family, S4AD-5CTI, Fab 2
Device: CY8C24xxx
QTP# 042809, V, 4.0
Page 9 of 11
October 2006
Reliability Test Data
QTP #:
Device
Fab Lot #
Assy Lot #
042702
Assy Loc Duration
Samp
Rej
Failure Mechanism
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 500V
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
COMP
3
0
3
0
3
0
3
0
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 1,000V
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
COMP
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 1,500V
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
COMP
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 2,000V
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
COMP
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 5.5V, Vcc Max
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
48
848
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
48
848
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
48
847
0
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-LATENT FAILURE RATE, 125C, 5.5V, Vcc Max
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
1000
78
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
1000
81
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
1000
73
0
STRESS: ENDURANCE (LIFE TEST)
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
1000
81
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
1000
84
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
1000
84
0
TAIWN-T
1000
50
0
STRESS: HIGH TEMPERATURE STORAGE, 150C
CY8C27443 (8C27443B)
2403330
610438921
STRESS: HI-ACCEL SATURATION TEST, 130C, 85%RH, 5.5V, PRE COND 168 HR 85C/85%RH, MSL1
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
96
85
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
96
84
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
96
85
0
STRESS: PHYSICAL DIMENSIONS
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
COMP
10
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
COMP
10
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
COMP
10
0
Cypress Semiconductor
Automotive PSoC Mixed-Signal Array family, S4AD-5CTI, Fab 2
Device: CY8C24xxx
QTP# 042809, V, 4.0
Page 10 of 11
October 2006
Reliability Test Data
QTP #:
Device
Fab Lot #
Assy Lot #
042702
Assy Loc Duration
Samp
Rej
Failure Mechanism
STRESS: STATIC LATCH-UP TESTING, 125C, 9V, ±300mA
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
COMP
3
0
STRESS: PRESSURE COOKER TEST, 121C, 100%RH, 15 Psig, PRE COND 168 HR 85C/85%RH, MSL1
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
96
85
0
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
168
85
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
96
85
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
168
85
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
96
85
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
168
85
0
STRESS: TC COND. C -65C TO 150C, PRE COND 168 HRS 85C/85%RH, MSL1
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
500
85
0
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
1000
84
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
500
85
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
1000
82
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
500
85
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
1000
80
0
STRESS: SOLDERABILITY
CY8C27443 (8C27443B)
2414285
610438918
TAIWN-T
COMP
15
0
CY8C27443 (8C27443B)
2405478
610438920
TAIWN-T
COMP
15
0
CY8C27443 (8C27443B)
2403330
610438921
TAIWN-T
COMP
15
0
Cypress Semiconductor
Automotive PSoC Mixed-Signal Array family, S4AD-5CTI, Fab 2
Device: CY8C24xxx
QTP# 042809, V, 4.0
Page 11 of 11
October 2006
Reliability Test Data
QTP #:
Device
Fab Lot #
Assy Lot #
Assy Loc
042809
Duration
Samp
Rej
STRESS: ELECTRICAL DISTRIBUTION
CY8C24423A (8C24423B) 2419761
610439360
TAIWN-T
COMP
30
0
CY8C24423A (8C24423B) 2421934
610439704
TAIWN-T
COMP
30
0
CY8C24423A (8C24423B) 2422007
610439705
TAIWN-T
COMP
30
0
TAIWN-T
COMP
3
0
TAIWN-T
COMP
3
0
COMP
6
0
3
0
3
0
3
0
3
0
STRESS: ESD-CHARGE DEVICE MODEL, 250V
CY8C24423A (8C24423B) 2419761
610439360
STRESS: ESD-CHARGE DEVICE MODEL, 500V
CY8C24423A (8C24423B) 2419761
610439360
STRESS: ESD-CHARGE DEVICE MODEL, 750V (Corner pins only)
CY8C24423A (8C24423B) 2419761
610439360
TAIWN-T
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 500V
CY8C24423A (8C24423B) 2419761
610439360
TAIWN-T
COMP
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 1,000V
CY8C24423A (8C24423B) 2419761
610439360
TAIWN-T
COMP
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 1,500V
CY8C24423A (8C24423B) 2419761
610439360
TAIWN-T
COMP
STRESS: ESD-HUMAN BODY CIRCUIT PER JESD22, METHOD A114-B, 2,000V
CY8C24423A (8C24423B) 2419761
610439360
TAIWN-T
COMP
STRESS: HIGH TEMP DYNAMIC OPERATING LIFE-EARLY FAILURE RATE, 125C, 5.5V, Vcc Max
CY8C24423A (8C24423B) 2419761
610439360
TAIWN-T
48
829
0
COMP
6
0
STRESS: STATIC LATCH-UP TESTING, 125C, 9V, ±300mA
CY8C24423A (8C24423B) 2419761
610439360
TAIWN-T
Failure Mechanism