Revised March 2005 FST3345 8-Bit Bus Switch General Description Features The Fairchild Switch FST3345 provides 8-bits of highspeed CMOS TTL-compatible bus switching. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. ■ 4: switch connection between two ports. The device is organized as an 8-bit switch bank with dual output enable inputs (OE and OE). When OE is LOW or OE is HIGH, the switch is ON and Port A is connected to Port B. When OE is HIGH and OE is LOW, the switch is OPEN and a high-impedance state exists between the two ports. ■ Control inputs compatible with TTL level. ■ Minimal propagation delay through the switch. ■ Low lCC. ■ Zero bounce in flow-through mode. Ordering Code: Order Number Package Package Description Number FST3345WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide FST3345QSC MQA20 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide FST3345MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide FST3345MTCX_NL (Note 1) MTC20 Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only. Logic Diagram Connection Diagram Pin Descriptions Truth Table Pin Name Description OE, OE Bus Switch Enables A Bus A B Bus B © 2005 Fairchild Semiconductor Corporation DS500019 Inputs OE Function OE X L Connect H X Connect L H Disconnect www.fairchildsemi.com FST3345 8-Bit Bus Switch June 1997 FST3345 Absolute Maximum Ratings(Note 2) Supply Voltage (VCC) DC Switch Voltage (VS) DC Input Voltage (VIN ) (Note 3) DC Input Diode Current (lIK) VIN0V 0.5V to 7.0V 0.5V to 7.0V 0.5V to 7.0V 50mA DC Output (IOUT ) Sink Current DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG) Recommended Operating Conditions (Note 4) Power Supply Operating (VCC) 128mA 4.0V to 5.5V Input Voltage (VIN) 0V to 5.5V Output Voltage (VOUT) 0V to 5.5V Input Rise and Fall Time (tr, tf) / 100mA 65qC to 150 qC Switch Control Input 0nS/V to 5nS/V Switch I/O 0nS/V to DC 40 qC to 85 qC Free Air Operating Temperature (TA) Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 3: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 4: Unused control inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics VCC Symbol Parameter (V) 40 qC to 85 qC TA Min Typ (Note 5) Max 1.2 Units Conditions VIK Clamp Diode Voltage VIH HIGH Level Input Voltage 4.0–5.5 VIL LOW Level Input Voltage 4.0–5.5 0.8 V II Input Leakage Current 5.5 r1.0 PA 0d VIN d5.5V IOZ OFF-STATE Leakage Current 5.5 r1.0 PA 0 dA, B dVCC RON Switch On Resistance 4.5 4 7 : VIN 0V, IIN 64mA (Note 6) 4.5 4 7 : VIN 0V, IIN 30mA 4.5 8 15 : VIN 2.4V, IIN 15mA 4.0 11 20 : VIN 2.4V, IIN 15mA VCC or GND, IOUT 4.5 2.0 V IIN -18mA V ICC Quiescent Supply Current 5.5 3 PA VIN ' ICC Increase in ICC per Input 5.5 2.5 mA One Input at 3.4V 0 Other Inputs at VCC or GND Note 5: Typical values are at VCC 5.0V and T A 25qC Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (A or B) pins. www.fairchildsemi.com 2 CL Symbol Parameter tPHL,tPLH Propagation Delay Bus to Bus (Note 7) tPZH, tPZL Output Enable Time tPHZ, tPLZ Output Disable Time TA 40 qC to 85 qC, 50 pF, RU RD 500: VCC 4.5 5.5V Min Max 1.5 1.0 VCC 4.0V Min Units Figure No. Conditions Max Figures 1, 2 0.25 0.25 ns VI OPEN 6.5 7.0 ns VI 7V for tPZL VI OPEN for tPZH VI 7V for tPLZ VI OPEN for tPHZ 8.0 8.2 ns Figures 1, 2 Figures 1, 2 Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On Resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance). Capacitance (Note 8) Symbol CIN CI/O Note 8: TA Parameter Typ Max Units Conditions Control Pin Input Capacitance 4 pF VCC Input/Output Capacitance 5 pF VCC, OE 25qC, f 5.0V 5.0V, OE 0V 1 MHz, Capacitance is characterized but not tested. AC Loading and Waveforms Note: Input driven by 50 : source terminated in 50 : Note: C L includes load and stray capacitance Note: Input PRR 1.0 MHz tW 500 nS FIGURE 1. AC Test Circuit FIGURE 2. AC Waveforms 3 www.fairchildsemi.com FST3345 AC Electrical Characteristics FST3345 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide Package Number M20B 20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide Package Number MQA20 www.fairchildsemi.com 4 FST3345 8-Bit Bus Switch Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com