Revised December 1999 FST3384 10-Bit Low Power Bus Switch General Description Features The Fairchild Switch FST3384 provides 10 bits of highspeed CMOS TTL-compatible bus switches. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise. The device is organized as two 5-bit switches with separate bus enable (OE) signals. When OE is LOW, the switch is ON and Port A is connected to Port B. When OE is HIGH, the switch is OPEN and a high-impedance state exists between the two ports. ■ 4Ω switch connection between two ports ■ Minimal propagation delay through the switch ■ Ultra low power with < 0.1 µA typical ICC ■ Zero ground bounce in flow-through mode ■ Control inputs compatible with TTL level Ordering Code: Order Number Package Number Package Description FST3384WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide FST3384QSC MQA24 24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide FST3384MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Diagram Connection Diagram Pin Descriptions Truth Table Pin Names Description OEA, OEB Bus Switch Enable A0–A9 B0–B9 OEA OEB B0–B4 B5–B9 L L A0–A4 A5–A9 Bus A L H A0–A4 HIGH-Z State Bus B H L HIGH-Z State A5–A9 H H HIGH-Z State HIGH-Z State © 1999 Fairchild Semiconductor Corporation DS500046 Print form created on December 13, 1999 4:03 Function Connect Connect Connect Disconnect www.fairchildsemi.com FST3384 10-Bit Low Power Bus Switch September 1997 FST3384 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions (Note 3) −0.5V to +7.0V Supply Voltage (VCC ) DC Switch Voltage (VS) −0.5V to +7.0V Power Supply Operating (VCC) DC Input Voltage (VIN) (Note 2) −0.5V to +7.0V Input Voltage (VIN) 0V to 5.5V 0V to 5.5V DC Input Diode Current (IIK) VIN<0V −50 mA Output Voltage (VOUT) DC Output (IOUT ) Sink Current 128 mA Input Rise and Fall Time (tr, tf) +/− 100mA DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG) 4.0V to 5.5V Switch Control Input −65°C to +150°C 0nS/V to 5nS/V Switch I/O 0nS/V to DC −40°C to +85°C Free Air Operating Temperature (TA) Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the “Electrical Characteristics” table are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: The input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. Note 3: Unused control inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter VCC (V) TA = −40°C to +85°C Min Typ (Note 4) Units Condition Max −1.2 IIN= − 18mA VIK Clamp Diode Voltage VIH HIGH Level Input Voltage 4.0-5.5 VIL LOW Level Input Voltage 4.0-5.5 0.8 V II Input Leakage Current 5.5 ±1.0 µA IOZ OFF-STATE Leakage Current 5.5 ±1.0 µA 0 ≤ A, B ≤ VCC RON Switch On Resistance 4.5 4 7 Ω VIN = 0V, IIN = 64mA (Note 5) 4.5 4 7 Ω VIN = 0V, IIN = 30mA 4.5 8 15 Ω VIN = 2.4V, IIN = 15mA 4.0 11 20 Ω VIN = 2.4V, IIN = 15mA 4.5 2.0 V V 0 ≤ VIN ≤ 5.5V ICC Quiescent Supply Current 5.5 3 µA VIN = VCC or GND, IOUT = 0 ∆ ICC Increase in ICC per Input 5.5 2.5 mA One input at 3.4V Other inputs at VCC or GND Note 4: All typical values are at VCC = 5.0V, TA = 25°C. Note 5: Measured by voltage drop between A and B pin at indicated current through the switch. On resistance is determined by the lower of the voltages on the two (A or B) pins. www.fairchildsemi.com 2 TA = −40°C to +85°C Symbol CL = 50 pF, RU = RD = 500Ω Parameter VCC = 4.5 − 5.5V Min tPHL, tPLH tPZH, tPZL Prop Delay Bus to Bus (Note 6) Output Enable Time 1.0 Max VCC = 4.0V Min Units Figure No. Max 0.25 0.25 ns 5.7 6.2 ns VI = OPEN Figure 1 Figure 2 VI = 7V for tPZL Figure 1 Figure 2 VI = OPEN for tPZH OEA, OE B to An, Bn tPHZ, tPLZ Conditions Output Disable Time 1.5 5.2 5.5 ns II = 7V for tPLZ Figure 1 Figure 2 VI = OPEN for tPHZ OEA, OE B to An, Bn Note 6: This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance). Capacitance Symbol (Note 7) Typ Max Units CIN Control Input Capacitance Parameter 3 6 pF Conditions VCC = 5.0V CI/O (OFF) Input/Output Capacitance 5 13 pF VCC, OE = 5.0V Note 7: Capacitance is characterized but not tested. AC Loading and Waveforms FST3384 VIN vs RON (Typ) Note: Input driven by 50 Ω source terminated in 50 Ω Note: C L includes load and stray capacitance Note: Input PRR = 1.0 MHz, tW = 500 nS FIGURE 1. AC Test Circuit FIGURE 2. AC Waveforms 3 www.fairchildsemi.com FST3384 AC Electrical Characteristics FST3384 Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M24B 24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide Package Number MQA24 www.fairchildsemi.com 4 FST3384 10-Bit Low Power Bus Switch Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC24 Technology Description The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its 74LVX3L384 (FST3384) bus switch product. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 5 www.fairchildsemi.com