SSM3K7002BFU TOSHIBA Field-Effect Transistor Silicon N Channel MOS Type (U-MOSⅣ) SSM3K7002BFU High-Speed Switching Applications Analog Switch Applications Unit: mm • Small package • Low ON-resistance : RDS(ON) = 3.3 Ω (max) (@VGS = 4.5 V) : RDS(ON) = 2.6 Ω (max) (@VGS = 5 V) : RDS(ON) = 2.1 Ω (max) (@VGS = 10 V) Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit Drain-source voltage VDSS 60 V Gate-source voltage VGSS ± 20 V DC ID 200 Pulse IDP 800 PD (Note 1) 150 mW Channel temperature Tch 150 °C Storage temperature range Tstg −55 to 150 °C Drain current Drain power dissipation (Ta = 25°C) mA Note: Using continuously under heavy loads (e.g. the application of high JEDEC ― temperature/current/voltage and the significant change in JEITA SC-70 temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. TOSHIBA 2-2E1E operating temperature/current/voltage, etc.) are within the Weight: 6.0 mg (typ.) absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: mounted on FR4 board (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 0.6mm2 × 3) 0.6 mm 1.0 mm Marking Equivalent Circuit (top view) 3 3 NM 1 2 1 1 2 2009-11-26 SSM3K7002BFU Electrical Characteristics (Ta = 25°C) Characteristics Symbol Gate leakage current Min Typ Max Unit VGS = ± 20 V, VDS = 0 V ⎯ ⎯ ± 10 μA V (BR) DSS ID = 10 mA, VGS = 0 V 60 ⎯ ⎯ V (BR) DSX ID = 10 mA, VGS = -10 V 45 ⎯ ⎯ IGSS Drain-source breakdown voltage Drain cutoff current Forward transfer admittance Drain-source ON-resistance VDS = 60 V, VGS = 0 V ⎯ ⎯ 1 μA VDS = 10 V, ID = 0.25 mA 1.5 ⎯ 3.1 V ⎪Yfs⎪ VDS = 10 V, ID = 200 mA (Note 2) 225 ⎯ ⎯ mS ID = 500 mA, VGS = 10 V (Note 2) ⎯ 1.62 2.1 ID = 100 mA, VGS = 5 V (Note 2) ⎯ 1.90 2.6 ID = 100 mA, VGS = 4.5 V (Note 2) ⎯ 2.10 3.3 ⎯ 17.0 ⎯ RDS (ON) Input capacitance Ciss Reverse transfer capacitance Crss Output capacitance Coss Switching time VDS = 25 V, VGS = 0 V, f = 1 MHz Turn-on delay time td(on) Turn-off delay time td(off) VDD = 30 V , ID = 200 mA , VGS = 0 to 10 V VDSF ID = -200 mA, VGS = 0 V Drain-source forward voltage V Vth IDSS Gate threshold voltage Test Condition (Note 2) ⎯ 1.9 ⎯ ⎯ 3.6 ⎯ ⎯ 3.3 6.6 ⎯ 14.5 40 ⎯ -0.84 -1.2 Ω pF ns V Note2: Pulse test Switching Time Test Circuit (b) VIN (a) Test circuit 90 % OUT IN 0 10 μs VDD = 30 V Duty ≤ 1% VIN: tr, tf < 2 ns (Zout = 50 Ω) Common Source Ta = 25 °C 50 Ω 10 V 10 V 10 % 0V RL (c) VOUT VDD 10 % VDD 90 % VDS (ON) tr tf td(on) td(off) Precaution Let Vth be the voltage applied between gate and source that causes the drain current (ID) to be low (0.25 mA for the SSM3K7002BFU). Then, for normal switching operation, VGS(on) must be higher than Vth, and VGS(off) must be lower than Vth. This relationship can be expressed as: VGS(off) < Vth < VGS(on). Take this into consideration when using the device Handling Precaution When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that come into direct contact with devices should be made of antistatic materials. 2 2009-11-26 SSM3K7002BFU ID – VDS ID – VGS 1000 Common Source Ta = 25 °C 600 400 5.0 V (mA) 7.0 V 100 4.5 V ID 10 V 800 10 Drain current Drain current ID (mA) 1000 4.0 V 200 3.5 V Common Source VDS = 10 V Ta = 100 °C 1 25 °C -25 °C 0.1 VGS = 3.3 V 0 0 0.4 0.8 1.2 1.6 Drain–source voltage VDS 0.01 0 2.0 1.0 (V) 2.0 Gate–source voltage Drain–source ON-resistance RDS (ON) (Ω) Drain–source ON-resistance RDS (ON) (Ω) Common Source Ta = 25°C 3 4.5 V 5.0 V VGS = 10 V 1 0 10 300 100 ID ID = 100 mA Common Source Ta = 25°C 3 Ta = 100 °C 2 25 °C -25 °C 1 1000 10 0 Gate–source voltage (mA) RDS (ON) – Ta 100 mA / 4.5 V ID = 500 mA / VGS = 10 V 1 100 mA / 5.0V 0 50 Ambient temperature VGS (V) Common Source VDS = 10 V ID = 0.25 mA Vth (V) Gate threshold voltage Drain–source ON-resistance RDS (ON) (Ω) Common Source 2 0 −50 20 Vth – Ta 3.0 4 3 (V) 4 0 30 Drain current 5 VGS 5 4 2 5.0 4.0 RDS (ON) – VGS RDS (ON) – ID 5 3.0 100 Ta 2.0 1.0 0 −50 150 (°C) 0 50 Ambient temperature 3 100 Ta 150 (°C) 2009-11-26 (mA) Common Source VDS = 10 V Ta = 25°C 0.03 0.01 0.003 0.001 Common Source VGS = 0 V Ta = 25°C D 800 IDR 0.1 1000 Drain reverse current ⎪Yfs⎪ 0.3 IDR – VDS |Yfs| – ID 1 Forward transfer admittance (S) SSM3K7002BFU 100 10 1 Drain current ID S 400 200 0 0 1000 -0.2 (mA) -0.4 -0.6 -0.8 Drain–source voltage C – VDS 100 IDR G 600 VDS 30 (ns) (pF) 50 C (V) Common Source VDD = 30 V VGS = 0 to 10 V Ta = 25 °C tf td(off) 100 t 10 Switching time Capacitance -1.2 t – ID 1000 Ciss -1.0 5 Coss 3 1 0.1 Common Source Ta = 25°C f = 1 MHz VGS = 0 V Crss 10 td(on) tr 1 10 Drain–source voltage 1 100 VDS 1 (V) 10 Drain current 100 ID 1000 (mA) PD – Ta Drain power dissipation PD (mW) 250 Mounted on FR4 board. 2 (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 0.6 mm × 3) 200 150 100 50 0 0 40 80 120 160 Ambient temperature Ta (°C) 4 2009-11-26 SSM3K7002BFU RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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