Revised August 2005 USB1T1104 Universal Serial Bus Peripheral Transceiver with Voltage Regulator General Description The USB1T1104 is an Universal Serial Bus Specification Rev 2.0 compliant transceiver. The device provides an USB interface for Full-Speed (12Mbit/s) USB applications. The USB1T1104 provides excellent flexibility, allowing differential and single ended inputs while an integrated voltage regulator sets the I/O level to 1.65V to 3.6V. Utilizing an integrated 5.0V to 3.3V voltage regulator, the part can be powered directly from the USB host (VBUS) to minimize the power consumed from the local sources while used in devices with low supply voltages. The USB1T1104 provides 15kV ESD protection on the USB bus pins (D/D). This eliminates the need for any external ESD devices while providing excellent protection to larger and more expensive ASICs and USB controllers. Features O Complies with Universal Serial Bus Specification 2.0 O Integrated 5V to 3.3V voltage regulator for powering VBus O Utilizes digital inputs and outputs to transmit and receive USB cable data O Supports full speed 12Mbits/s speed data rates O Ideal for portable electronic devices O 15kV contact HBM ESD protection on bus pins O 3.3mm leadless package O Industry standard HBCC footprint is lead-free Applications O Cell phone O Digital camera O MP3 Ordering Code: Order Package Number Number USB1T1104MHX MLP16HB Package Description Pb-Free 16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square Pb-Free package per JEDEC J-STD-020B. Logic Diagram © 2005 Fairchild Semiconductor Corporation DS500893 www.fairchildsemi.com USB1T1104 Universal Serial Bus Peripheral Transceiver with Voltage Regulator August 2004 USB1T1104 Connection Diagram (Bottom View) Terminal Descriptions Terminal Number Terminal Name I/O Terminal Description 1 OE I Output Enable: Active LOW enables the transceiver to transmit data on the bus. When not active the transceiver is in the receive mode (CMOS level is relative to VCCIO) 2 RCV O Receive Data Output: Non-inverted CMOS level output for USB differential Input (CMOS output level is relative to VCCIO). Driven LOW when SUSPN is HIGH; RCV output is stable and preserved during SE0 condition. 3 Vp O Single-ended D receiver output VP (CMOS level relative to VCCIO): Used for external detection of SEO, error conditions, speed of connected device; Driven HIGH when no supply connected to VCC and VREG. 4 Vm O Single-ended D receiver output Vm (CMOS level relative to VCCIO): Used for external detection of SEO, error conditions, speed of connected device; Driven HIGH when no supply connected to VCC and VREG. 5 SUSPND I Suspend: Enables a low power state (CMOS level is relative to VCCIO). While the SUSPND pin is active (HIGH) it will drive the RCV pin to logic “0” state. 6 MODE I MODE input (CMOS level is relative to VCCIO). A HIGH selects the differential input MODE (Vpo, Vmo) whereas a LOW enables the single-ended MODE (Vo, VFSEO) see Table 2 and Table 4 7 VCCIO 8 Vbusmon O 10, 9 D , D AI/O 11 Vpo / Vo I Driver Data Input (CMOS level is relative to VCCIO); Schmitt trigger input; see Table 2 and Table 3 12 Vmo / FSEO I Driver Data Input (CMOS level is relative to VCCIO); Schmitt trigger input; see Table 2 and Table 3 13 VREG (3.3V) Internal Regulator Option: Regulated supply output voltage (3.0V to 3.6V) during 5V operation; decoupling capacitor of at least 0.1 P F is required. 14 VCC (5.0V) Internal Regulator Option: Used as supply voltage input (4.0V to 5.5V); can be connected directly to USB line Vbus. 15 VPU (3.3V) Pull-up Supply Voltage (3.3V r 10%): Connect an external 1.5k: resistor on D (FS data rate); Pin function is controlled by Config input pin: Config = LOW VPU (3.3V) is floating (High Impedance) for zero pull-up current. Config = HIGH VPU (3.3V) = 3.3V; internally connected to VREG (3.3V). 16 Config www.fairchildsemi.com Supply Voltage for digital I/O pins (1.65V to 3.6V): When not connected the D and D pins are in 3-STATE. This supply bus is totally independent of VCC (5V) and VREG (3.3V). I Vbus monitor output (CMOS level relative to VCCIO): When Vbus ! 4.1V then Vbusmon = HIGH and when Vbus 3.6V then Vbusmon = LOW. Data , Data : Differential data bus conforming to the USB standard. USB connect or disconnect software control input. Configures 3.3V to external 1.5k: resistor on D when HIGH. 2 Terminal Name I/O Exposed Diepad GND GND Terminal Description GND supply down bonded to exposed diepad to be connected to the PCB GND. Functional Description The USB1T1104 transceiver is designed to convert CMOS data into USB differential bus signal levels and to convert USB differential bus signal to CMOS data. Table 1 describes the specific pin functionality selection. Table 2, Table 3, and Table 4 describe the specific Truth Tables for Driver and Receiver operating functions. To minimize EMI and noise the outputs are edge rate controlled with the rise and fall times controlled and defined for full speed data rates. The rise, fall times are balanced between the differential pins to minimize skew. The USB1T1104 also has the capability of various power supply configurations to support mixed voltage supply applications (see Table 5) and Power Supply Configurations and Options for detailed descriptions. Functional Tables TABLE 1. Function Select SUSPND OE D, D RCV Vp/Vm L L Driving & Receiving Active Active Normal Driving (Differential Receiver Active) L H Receiving (Note 1) Active Active Receiving H L Driving Inactive (Note 2) Active Driving during Suspend (Differential Receiver Inactive) H H 3-STATE (Note 1) Inactive (Note 2) Active Low Power State Function Note 1: Signal levels is function of connection and/or pull-up/pull-down resistors. Note 2: For SUSPND = HIGH mode the differential receiver is inactive and the output RCV output is forced LOW. The out-of-suspend signaling (K) is detected via the singleended receiver outputs of the Vp and Vm pins. TABLE 2. Driver Function (OE = L) using Differential Input Interface Mode Pin = H Vmo Vpo Data L L SE0 (Note 3) L H Differential Logic 1 H L Differential Logic 0 H H Illegal State Note 3: SE0 = Single Ended Zero TABLE 3. Driver Function (OE = L) using Single-ended Input Interface Mode Pin = L FSE0 Vo Data L L Differential Logic 0 L H Differential Logic 1 H L SE0 (Note 4) H H SE0 (Note 4) Note 4: SE0 = Single Ended Zero 3 www.fairchildsemi.com USB1T1104 Terminal Number USB1T1104 TABLE 4. Receiver Function (OE = H) D, D RCV Vp Vm Differential Logic 1 H H L Differential Logic 0 L L H SE0 X L L Sharing Mode L H H X = Don’t Care Power Supply Configurations and Options The three modes of power supply operation are: 1. Regulated Output. VCCIO is connected and VCC (5.0) is connected to 5V (4.0V to 5.5V) and the internal voltage regulator then produces 3.3V for the USB connections. 3-STATE and the USB1T1104 allows external signals up to 3.6V to share the D and D bus lines. Internally the circuitry limits leakage from D and D pins (maximum 10 P A) and VCCIO such that device is in low power (suspended) state. Pins Vbusmon and RCV are forced LOW as an indication of this mode with Vbusmon being ignored during this state. For normal mode the VCCIO is an independent voltage source (1.65V to 3.6V) that is a function of the external circuit configuration. • Disable Mode: VCCIO is not connected and VCC(5V) is connected. In this mode the D and D pins are 3-STATE and the device is in low power state. • Sharing Mode: VCCIO is only supply connected. VCC and VREG are not connected. In this mode the D and D pins are A summary of the Supply Configurations is described in Table 5. • Normal Mode: Regulated Output TABLE 5. Power Supply Configuration Options Pins Power Supply Mode Configuration Sharing Disable Normal (Regulated Output) VCC (5V) 3.6V Connected to 5V Source Connected to 5V Source VREG (3.3V) Pulled LOW Regulator OFF 3.3V, 300 P A Regulated Output 3.3V, 300 P A Regulated Output VCCIO 1.65V to 3.6V Source Not Connected 1.65V to 3.6V Source VPU (3.3V) 3-STATE (Off) 3-STATE (Off) 3.3V Available if Config = HIGH D, D 3-STATE 3-STATE Function of Mode Set Up Vp, Vm H Invalid Function of Mode Set Up RCV L Invalid Function of Mode Set Up OE, SUSPND, Config, Vpo/Vo, Vmo/FSEO, MODE Hi-Z Hi-Z Function of Mode Set Up Note 5: Hi-Z or forced LOW. www.fairchildsemi.com 4 Recommended Operating Conditions Supply Voltage (VCC)(5V) 0.5V to 6.0V I/O Supply Voltage (VCCIO) 0.5V to 4.6V DC Supply Voltage VCC (5V) I/O DC Voltage VCCIO Latch-up Current (ILU) 1.65V to 3.6V DC Input Voltage Range (VI) VI = 1.8V to 5.4V 150 mA 0V to 3.6V Pins D and D 18 mA 0V to 3.6V Operating Ambient Temperature DC Input Voltage (VI) 40qC to 85qC (TAMB) 0.5V to VCCIO 0.5V (Note 7) 0V to VCCIO 0.5V DC Input Range for AI/O (VIA/O) DC Input Current (IIK) VI 0 4.0V to 5.5V DC Output Diode Current (IOK) VO ! VCC or VO 0 r18 mA DC Output Voltage (VO) 0.5V to VCCIO 0.5V (Note 7) Output Source or Sink Current (IO) VO = 0 to VCC Current for D, D Pins r12 mA Current for RCV, Vm/Vp r12 mA DC VCC or GND Current r100 mA (ICC, IGND) ESD Immunity Voltage (VESD); Contact HBM Pins D, D, and GND Note 6: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristic tables are not guaranteed at the absolute maximum rating. The “Recommended Operating Conditions” table will define the conditions for actual device operation. 15kV All Other Pins 2.5kV Storage Temperature (TSTO) 40qC to 125qC Power Dissipation (PTOT) ICC (5V) Note 7: IO Absolute Maximum Rating must be observed. 48 mW ICCIO 9 mW DC Electrical Characteristics (Supply Pins) Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC (5V) = 4.0V to 5.5V or VREG (3.3V) = 3.0V to 3.6V, VCCIO = 1.65V to 3.6V Limits Symbol VREG (3.3V) Parameter Regulated Supply Output Internal Regulator Option; Operating Supply Current (VCC5.0) I/O Operating Supply Current Transmitting and Receiving at Transmitting and Receiving at Max 3.0 3.3 3.6 4.0 8.0 mA (Note 10) 1.0 2.0 mA 12 Mbits/s ICC (IDLE) Typ (Note 8)(Note 9) 12 Mbits/s; CLOAD = 50 pF (D, D) ICCIO Units Min V ILOAD d 300 PA ICC 40qC to 85qC Conditions (Note 10) Supply Current during IDLE: VD t 2.7V, VD d 0.3V; FS IDLE and SE0 (VCC5.0) SE0: VD d 0.3V, VD d 0.3V 500 (Note 11) ICCIO (STATIC) I/O Static Supply Current IDLE, SUSPND or SE0 20.0 ICC(SUSPND) Suspend Supply Current SUSPND = HIGH 25.0 USB1T1104 OE = HIGH PA PA (Note 11) PA 20.0 PA Vm = Vp = OPEN ICCIO(SHARING) I/O Sharing Mode Supply Current VCC (5V) Not Connected 5 www.fairchildsemi.com USB1T1104 Absolute Maximum Ratings(Note 6) USB1T1104 DC Electrical Characteristics (Continued) Limits Symbol Parameter 40qC to 85qC Conditions Min IDr(SHARING) VCCTH Sharing Mode Load Current on VCC (5V) Not Connected D/D Pins Config = LOW; VDr = 3.6V VCC Threshold Detection Voltage 1.65V d VCCIO d 3.6V Units Typ Max Supply Lost Supply Present VCCHYS VCC Threshold Detection 10.0 PA 3.6 V 4.1 VCCIO = 1.8V 70.0 mV Hysteresis Voltage VCCIOTH VCCIO Threshold Detection Voltage 2.7V d VREG d 3.6V Supply Lost 0.5 Supply Present VCCIOHYS VCCIO Threshold Detection V 1.4 VREG = 3.3V 450 mV Hysteresis Voltage Note 8: ILOAD includes the pull-up resistor current via pin VPU Note 9: The minimum voltage in Suspend mode is 2.7V. Note 10: Not tested in production, value based on characterization. Note 11: Excludes any current from load and VPU current to the 1.5k: resistor. Note 12: Includes current between Vpu and the 1.5k internal pull-up resistor. Note 13: When VCCIO 2.7V, minimum value for VREGTH = 2.0V for supply present condition. DC Electrical Characteristics (Digital Pins – excludes D, D Pins) Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCCIO = 1.6V to 3.6V Limits Symbol Parameter 40qC to 85qC Test Conditions Min Units Max Input Levels VIL LOW Level Input Voltage VIH HIGH Level Input Voltage 0.3 VHYS Hysteresis Voltage P11 P12 Pins Vpo/Vmo, VCCIO = 3.3V LOW Level Output Voltage IOL = 2 mA 0.4 IOL = 100 PA 0.15 0.6*VCCIO 0.30 V V 0.7 V Output Levels VOL VOH HIGH Level Output Voltage V IOH = 2 mA VCCIO - 0.4 IOH = 100 PA VCCIO- 0.15 V Leakage Current ILI Input Leakage Current VCCIO = 1.65V to 3.6V Input Capacitance Pin to GND r1.0 (Note 14) PA 10.0 pF Capacitance CIN, CI/O Note 14: If VCCIO t VREG then leakage current will be higher than specified. www.fairchildsemi.com 6 Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC = 4.0V to 5.5V or VREG = 3.0V to 3.6V Limits Symbol Parameter 40qC to 85qC Test Condition Min Typ Units Max Input Levels – Differential Receiver VDI Differential Input Sensitivity VCM Differential Common Mode Voltage | VI(D) - VI(D) | 0.2 V 0.8 2.5 V 0.8 V 0.7 V 0.3 V 3.6 V Input Levels – Single-ended Receiver VIL LOW Level Input Voltage VIH HIGH Level Input Voltage 2.0 VHYS Hysteresis Voltage 0.4 V Output Levels VOL LOW Level Output Voltage RL = 1.5k: to 3.6V VOH HIGH Level Output Voltage RL = 15k: to GND Input Leakage Current Off State OE = H r1.0 PA I/O Capacitance Pin to GND 20.0 pF 2.8 (Note 15) Leakage Current ILZ Capacitance CI/O Resistance ZDRV Driver Output Impedance 34.0 ZIN Driver Input Impedance 10.0 RSW Switch Resistance VTERM Termination Voltage RPU Upstream Port 3.0 (Note 17) (Note 18) 41.0 (Note 16) 44.0 : M: 10.0 : 3.6 V Note 15: VOH min. = VREG - 0.2V. Note 16: Includes external resistors of 29: on both D and D pins. Note 17: This voltage is available at pin VPU and VREG. Note 18: Minimum voltage is 2.7V in the suspend mode. 7 www.fairchildsemi.com USB1T1104 DC Electrical Characteristics (Analog I/O Pins – D, D Pins) USB1T1104 AC Electrical Characteristics (A I/O Pins Full Speed) Over recommended range of supply voltage and operating free air temperature (unless otherwise noted). VCC = 4.0V to 5.5V or VREG = 3.0V to 3.6V, VCCIO = 1.65V to 3.6V, CL = 50 pF; RL = 1.5K on D to VPU Limits Symbol Parameter 40qC to 85qC Test Conditions Min Typ Unit Max Driver Characteristics tFR Output Rise Time CL = 50 125 pF 4.0 20.0 10% to 90% ns tFF Output Fall Time Figures 1, 5 4.0 20.0 fRFM Rise/Fall Time Match tF/ tR Excludes First Transition from Idle State 90.0 111.1 % VCRS Output Signal Crossover Voltage Excludes First Transition from Idle State 1.3 2.0 V Figures 2, 5 18.0 ns Figures 4, 6 15.0 ns Figures 4, 6 15.0 ns Figures 3, 7 15.0 ns Figures 3Figure 7 18.0 ns (Note 19) see Waveform Driver Timing tPLH Propagation Delay tPHL (Vp/Vpo, Vm/Vmo to D/D) tPHZ Driver Disable Delay tPLZ (OE to D/D) tPZH Driver Enable Delay tPZL (OE to D/D) Receiver Timing tPLH Propagation Delay (Diff) tPHL (D/D to Rev) tPLH Single Ended Receiver Propagation Delay tPHL (D/D to Vp/ Vpo, Vm/Vmo) Note 19: Not production tested, guaranteed by characterization. www.fairchildsemi.com 8 USB1T1104 Typical Application Configurations Upstream Connection in Bypass Mode with Differential Outputs Downstream Connection in Normal Mode with Differential Outputs 9 www.fairchildsemi.com USB1T1104 AC Waveforms FIGURE 1. Rise and Fall Times FIGURE 2. Vpo/Vo, Vmo/VSEO to D/D FIGURE 3. D/D to RCV, Vp and Vm FIGURE 4. OE to D/D Test Circuits and Waveforms V = 0 for tPZH, tPHZ V = VREG for tPZL CL = 50 pF Full Speed Propagation Delays CL = 125 pF Edge Rates only FIGURE 6. Load for Enable and Disable Times FIGURE 5. Load for D/D FIGURE 7. Load for Vm/Vmo, Vp/Vpo and RCV www.fairchildsemi.com 10 Tape Format for MHBCC Package Tape Number Cavity Cover Tape Designator Section Cavities Status Status Leader (Start End) 125 (typ) Empty Sealed Carrier 2500/3000 Filled Sealed Trailer (Hub End) 75 (typ) Empty Sealed MHX TAPE DIMENSIONS inches (millimeters) REEL DIMENSIONS inches (millimeters) Tape Size 12 mm A B C D N W1 W2 13.0 0.059 0.512 0.795 7.008 0.488 0.724 330 (1.50) (13.00) (20.20) (178) (12.4) (18.4) 11 www.fairchildsemi.com USB1T1104 Tape and Reel Specification USB1T1104 Physical Dimensions inches (millimeters) unless otherwise noted Pb-Free 16-Terminal Molded Leadless Package (MHBCC), JEDEC MO-217, 3mm Square Package Number MLP16HB www.fairchildsemi.com 12 FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION As used herein: provided in the labeling, can be reasonably expected to result in significant injury to the user. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or 2. A critical component is any component of a life support (b) support or sustain life, or (c) whose failure to perform device or system whose failure to perform can be reasonwhen properly used in accordance with instructions for use ably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. 13 www.fairchildsemi.com USB1T1104 Universal Serial Bus Peripheral Transceiver with Voltage Regulator DISCLAIMER