CCD Area Image Sensor MN39571PT 9.2mm (type-1/2) 2,310k pixel CCD Area Image Sensor ■ Overview The MN39571PT is a super high resolution CCD area image sensor which includes 2,310k pixels in type-1/2 image format size. Adopting RGB Bayer arrangement in primary color filter array on chip provides excellent color reproduction. As the aspect ratio of image area is 3:2 which is the same as that of 35mm film, pictures can be taken in similar framing manner to use of a usual film camera. As The MN39571PT has also a skipping readout mode for image monitoring by LCD panel,you can fix the composition in real time. Part Number Size System Color or B/W IS Color MN39571PT 9.2mm(type-1/2) ■ Features • Photographic grade super high resolution by 2,310k pixels in type-1/2 format • Responds to 5:1 skipping readout mode for LCD monitoring • The same aspect ratio of 3:2 as a 35mm film • Newly developed small plastic package Outline dimensions : 14.0mm(W) × 12.4mm(D) × 3.4mm(t)(Without lead pins) ■ Applications • Digital still camera • FA, OA cameras ■ Device Configuration Diagram 2 Vertical dummy bit (No PD) 4 2 Al shielding (PD exists) For transient (PD exists) OB part 8 1800 8 81 2 4 2 4 2 1200 Valid pixels 13 Horizontal dummy bit Vertical dummy bit (No PD) 1901 Effective horizontal CCD 1 Horizontal dummy bit 1 MN39571PT CCD Area Image Sensor ■ Pin Assignments PW 1 20 φV1 RG 2 19 φV2 RD 3 18 φV3 OD 4 17 φV4 VO 5 16 φV5 LG 6 15 φV6 OG 7 14 φV7 φH1 8 13 φV8 φH2 9 12 PT Sub 10 11 IS (Top View) ■ Pin Descriptions Pin No. Symbol Descriptions 1 PW P-well 2 RG Reset gate 3 RD Reset drain 4 OD Output drain 5 VO Video output 6 LG Output load transistor gate 7 OG Output gate 8 φH1 Horizontal register clock pulse (1) 9 φH2 Horizontal register clock pulse (2) 10 Sub Substrate 11 IS Horizontal CCD input source 12 PT P-well for protection circuit 13 φV8 Vertical shift register clock pulse 8 2 Pin No. Symbol 14 φV7 Descriptions Vertical shift register clock pulse 7 15 φV6 Vertical shift register clock pulse 6 16 φV5 Vertical shift register clock pulse 5 17 φV4 Vertical shift register clock pulse 4 18 φV3 Vertical shift register clock pulse 3 19 φV2 Vertical shift register clock pulse 2 20 φV1 Vertical shift register clock pulse 1 CCD Area Image Sensor MN39571PT ■ Absolute Maximum Ratings and Operating Conditions Rating Parameter Symbol Operating condition min max min typ max Unit Output drain voltage VOD − 0.2 18.0 15.2 15.5 15.8 V Reset drain voltage VRD − 0.2 18.0 15.2 15.5 15.8 V Input source voltage VIS − 0.2 18.0 15.2 15.5 15.8 V VPT *2 − 10.0 0.2 − 9.3 − 9.0 − 8.7 V 0 V Protection P-well voltage P-well voltage VPW Reference voltage Output load transistor gate voltage VLG Supplied internally V Output gate voltage VOG Supplied internally V Reset H-L VφRG(H-L) *3 8.0 pulse voltage Bias VφRG(Bias)*3 − 0.5 Horizontal register VφH1(H) 8.0 3.0 3.3 3.6 clock pulse voltage 1 VφH1(L) − 0.2 − 0.2 0 0.2 Horizontal register VφH2(H) 8.0 3.0 3.3 3.6 clock pulse voltage 2 VφH2(L) − 0.2 − 0.2 0 0.2 Vertical shift register VφV1,5(H) *2 18.0 15.2 15.5 15.8 clock pulse voltage 1,5 VφV1,5(M) *2 − 0.2 0 0.2 VφV1,5(L) *2 − 10.0 − 9.3 − 9.0 − 8.7 Vertical shift register VφV3,7(H) *2 18.0 15.2 15.5 15.8 clock pulse voltage 3,7 VφV3,7(M) *2 − 0.2 0 0.2 VφV3,7(L) *2 − 10.0 − 9.3 − 9.0 − 8.7 Vertical shift register VφV2,6(M) *2 15.0 − 0.2 0 0.2 clock pulse voltage 2,6 VφV2,6(L) *2 − 10.0 − 9.3 − 9.0 − 8.7 Vertical shift register VφV4,8(M) *2 15.0 − 0.2 0 0.2 clock pulse voltage 4,8 VφV4,8(L) *2 − 10.0 − 9.3 − 9.0 − 8.7 VSub*2 Substrate voltage 3.0 3.3 3.6 Supplied internally V V Supplied internally V V V V V V V φVSub *4,*5 − 0.2 45.0 26.5 27.0 27.5 Operating temperature Topr − 10 60 25 °C Storage temperature Tstg − 30 70 °C Note)1. Standard light input defines Standard light input is the one when the exposure is done at a lens aperture of F8, using a light source of 2856 K and 1050 nt, and placing a color temperature conversion filter LB-40 (HOYA) and an IR cutting filter CAW-500 (t = 2.5 mm) in the light path. 2. *1: VSub internal settings guarantee blooming at 400 times light input of the standard light input. 3. *2: VPT is set so that the following conditions are set for VL of the vertical shift clock. VPT < = VL 4. *3: VφR(H) 5. *4: VSub when using electronic shutter function H-L φVSub "H" Bias (Internally) φVSub "L" VφR(L) E E φVSub(V) VSub(V) 6. *5: Separate powor supply is recommended for φVSub 3 MN39571PT CCD Area Image Sensor ■ Optical Characteristics S/N Saturation Sensitivity output F8 pixels typ typ typ H V (dB) (mV) (mV) Effective Part Number Color or B/W MN39571PT Color 1816 1208 500 Vertical smear Sm typ(%) 340 Image lag Horizontal Vertical resolution resolution typ typ typ (%) (TV-lines) (TV-lines) 0.01 Note)1. 1/7.5 sec frame storage. Horizontal register clock frequency 24 MHz 2. *1: Mechanical shutter saturation output ■ Package Dimensions (Unit : mm) • WDIP020-P-0500A 3.40±0.30 3.90±0.15 (0.38) 12.60±0.10 R0.15 ns (0.60) (0.80) 0.30±0.05 0.46 M 4 1.27 (1.30) 2.60±0.15 10 3.90±0.15 3.40±0.15 1 12.95±0.25 0.015 1.71±0.10 0.25 (12.77) 11.60±0.10 11 6.20±0.08 12.40±0.08 14.00±0.08 7.00±0.08 20