PHILIPS FXA1012WC

IMAGE SENSORS
FXA 1012
Frame Transfer CCD Image Sensor
Objective specification
File under Image Sensors
Philips
Semiconductors
2000 January 7
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
•
2M active pixels (1616H x 1296V)
•
2/3-inch type optical format
•
Still and monitor modes
•
RGB Bayer pattern colour filters
•
Progressive scan
•
Excellent anti-blooming (Vertical Overflow
Drain)
•
High dynamic range (>70dB)
•
High sensitivity
•
Low dark current and low fixed pattern noise
•
Low read-out noise
•
Variable electronic shuttering
•
Data rate up to 25 MHz, 5 frames/s
•
Small outline LCC package
•
Low cost
FXA 1012
Description
The FXA 1012 is a colour frame-transfer CCD image sensor designed
for consumer digital photography applications. The combination of
high speed and a high linear dynamic range of over 10 true bits
makes this device the perfect solution for use in compact high quality
imaging applications. Two modes of operation provide both a
monitoring image for LCD screens, and a full resolution, zero-smear
still image with excellent colour rendition. The device structure is
shown in figure 1.
12 dark lines
Device structure
Optical size:
Chip size:
Pixel size:
Active pixels:
Total no. of pixels:
Optical black pixels:
Optical black lines:
Total no. of storage lines:
Dummy register cells:
G B G B
R G R G
G B G B
8.16 mm
9.49 mm
5.1 µm x
1616 (H)
1688 (H)
Left: 2
Top: 12
298
8
(H) x 6.53 mm (V)
(H) x 9.32 mm (V)
5.1 µm
x 1296 (V)
x 1324 (V)
Right: 70
Bottom: 12
8 black lines
Image
Section
2
G B G B
R G R G
G B G B
1296
active
lines
1616 active pixels
G B G B
R G R G
70
G B G B
R G R G
12 dark + 4 dummy lines
Storage Section
298 lines x 1688 cells
Output 8
amplifier
Figure 1 - Device structure
2000 January
2
1688 cells
Output register
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
Architecture of the FXA 1012
The FXA 1012 consists of an open image section and a storage
section with an optical light shield. An output register and amplifier
are located below the storage section for read-out.
through the storage section to the horizontal output register. In the
monitoring mode subsampling of the image is performed at the
image-to-storage transition and the subsampled image is stored in
the storage section. The stored image is shifted one line at a time
into the horizontal output register.
The optical centres of all pixels in the image section form a square
grid. The image area has RGB Bayer colour filter pattern. The charge
is generated and integrated in the image section. This section is
controlled by four image clock phases (A1 to A4). After the integration
time the image charge is shifted one line at a time to the storage
section.
In the next active line time the pixels are transported towards the
output amplifier. Four clock phases (C1 to C4) control the pixel
transport in the output register. In the output amplifier the charge
packets are dumped one by one on a floating diffusion area. The
voltage of this area is sensed and buffered by a three-stage FET
source-follower. Figure 2 shows the detailed internal structure.
The storage section is controlled by four storage clock phases (B1
to B4). In the still mode the image information is transported straight
IMAGE SECTION
Image diagonal (active video only)
10.4 mm
Aspect ratio
5:4
Active image width x height
8.24 x 6.61 mm2
Pixel width x height
5.1 x 5.1 µm2
Image clock pins
A1, A2, A3, A4
Capacity of each clock phase
5.4 nF per pin
Number of active lines
1296
Number of black reference lines
24 (12+12)
Number of dummy lines
4
Total number of lines
1324
Number of active pixels per line
1616
Number of black reference pixels per line
72 (2+70)
Total number of pixels per line
1688
STORAGE SECTION
Cell width x height
5.1 x 5.1 µm2
Storage clock pins
B1, B2, B3, B4
Capacity of each clock phase
1.5 nF per pin
Number of cells per line x number of lines
1688 x 298
OUTPUT REGISTER
Number of dummy cells
8
Total number of register cells
1696
Output register clock pins
C1, C2, C3, C4
Capacity of each clock phase
60 pF per pin
Reset Gate (RG) capacity
15 pF
Output stage
3-stage source follower (open source)
2000 January
3
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
Operational modes
The FXA 1012 is designed for high-resolution digital photography
with real time monitoring at reduced resolution. Two different modes
of operation make this possible.
In the monitoring mode, images with reduced vertical resolution are
produced that are suitable for LCD displays. These images can have
for example, 120, 240 or 256 lines at up to 40 images per second.
In the still picture mode the high-resolution image is read-out directly.
A mechanical shutter ensures a 100% smear-free image with a
resolution of 1600 (H) x 1280 (V).
A1
A1
A2
A2
A3
A3
A4
A4
A1
12 lines
A1
A2
One Pixel
A2
A3
A3
A4
A4
A1
A1
A2
A2
A3
A3
A4
A4
1296 active
images
lines
A1
A2
IMAGE
A1
A2
A3
A3
A4
A4
A1
A1
A2
A2
A3
A3
A4
A4
A1
16 lines
A1
A2
A2
A3
A3
FT CCD
A4
A4
B1
B1
B2
OG: output gate
RG: reset gate
RD: reset drain
B2
B3
B3
B4
B4
B1
298 storage
lines
STORAGE
B1
B2
OUT
OG C2 C1 C4
B2
B3
B3
B4
B4
C3 C2 C1 C4 C3 C2 C1 C4 C3 C2 C1 C4 C3 C2 C1 C4 C3 C2 C1 C4
C3 C2 C1 C4 C3 C2 C1 C4
C3 C2 C1 C4 C3 C2 C1 C4
RG
RD
8 dummy pixels
column
1
2 black timing
columns
column
2+1
column
2+1616
1616 image pixels
column
2+1616+70
70 black timing columns
A1, A2, A3, A4: clocks of image section
B1, B2, B3, B4: clocks of storage section
C1, C2, C3, C4: clocks of horizontal register
Figure 2 - Detailed internal structure
2000 January
4
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
Specifications
Absolute Maximum Ratings
Min.
Max.
Unit
GENERAL:
storage temperature
ambient temperature during operation
voltage between any two gates
DC current through any clock phase (absolute value)
OUT current (no short circuit protections)
-40
-20
-20
-0.2
0
+80
+60
+20
+2.0
4
°C
°C
V
µA
mA
VOLTAGES IN RELATION TO VPS:
VNS, RD
all other pins
-0.5
-10
+30
+25
V
V
VOLTAGES IN RELATION TO VNS:
RD
VPS
all other pins
-10
-30
-30
+0.5
+0.5
+0.5
V
V
V
DC Conditions
VNS1
VPS
SFD
SFS
OG
RD
N substrate
P substrate
Source Follower Drain
Source Follower Source
Output Gate
Reset Drain
Number of adjustments
Min. [V]
Typical [V]
Max. [V]
Max. current
[mA]
20
6
19
0
3.5
19
24
7
20
0
4
20
28
9
21
0
4.5
21
2
2
5.5 3
1
-
Min.
Typical
Max.
Pin
0
0
1
VNS
2
1
To set the VNS voltage for optimal Anti-Blooming (vertical overflow drain), it should be adjustable between minimum and maximum values.
Currents INS and IPS are specified at overexposure of 100 x Qmax.
3
Measured with Rload = 3.3 kOhms.
2
AC Clock Level Conditions
Min.
Typical
Max.
Unit
IMAGE CLOCKS:
A-clock amplitude
A-clock low level
11
12
0
13
V
V
STORAGE CLOCKS:
B-clock amplitude
B-clock low level
11
12
0
13
V
V
4.5
5.5
2.5
5
0
3
3.5
V
V
V
Reset Gate (RG) amplitude
Reset Gate (RG) high level
4.5
21
5
22
5.25
23
V
V
VNS PULSE:
Charge Reset (CR) pulse on VNS
4.5
5
5.5
V
HORIZONTAL AND RESET CLOCKS:
C-clock amplitude
C-clock low level C1, C3
C-clock low level C2, C4
2000 January
5
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
Timing diagrams (for default operation)
AC Characteristics
Horizontal frequency
Vertical frequency
Charge Reset (CR) time
Rise and fall times: image clocks (A)
register clocks (C)2
reset gate (RG)
Min.
Typical
10
10
3
3
1.561
12
20
5
5
Max.
Unit
25
MHz
MHz
µs
ns
ns
ns
14
Tp/8 3
Tp/8
1
Typical value for monitor mode.
Duty cycle = 50%
3
Tp is pulse period of C clocks
2
C-clock pulses
FREQUENCY = 25 MHz
COMPLETE LINE READOUT CYCLE
SSC
C1
C2
C3
C4
RG
1616 active pixels
8 dummy pixels
blue (even) lines
red (odd) lines
2
black
pixels
8 overscan pixels
8 overscan pixels
1600 active pixels within aspect ratio
G
B
G
B
G
B
G
B
G
B
G
B
G
B
G
R
G
R
G
R
G
R
G
R
G
R
G
R
G
R
20ns
40ns
.
.
.
.
.
.
.
.
.
.
.
.
.
.
G
B
G
B
G
B
G
B
G
B
G
B
G
R
G
R
G
R
G
R
G
R
G
R
G
25MHz HORIZONTAL TRANSPORT PULSES
C1
6ns
C2
C3
C4
6.7ns
RG
SENSOR SIGNAL
Figure 3 - Timing diagram for horizontal pulses
2000 January
6
70 black pixels
B
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
HORIZONTAL PULSES
C-clock frequency = 25MHz
Thorizontal = 1/25E6 * 2040 = 81.6us
1696 sensor pixels
48
440
420
400
380
360
340
320
300
280
260
240
220
200
180
1600 active pixels
160
140
120
80
100
312 lineblanking
60
40
20
2040/0
2020
2000
1980
1960
1940
phase count
70 black
2 black
8 dummy
phiC reg 8 overscan
31 dummy
black
8 overscan
1600 active pixels
361
SSC
349
49
CR_A1/A2
12 us
49
349
CR_NS
69
A1 / B1
129
Line shift
Line shift
109
169
A2 / B2
49
A3 / B3
Line shift
A4 / B4
Line shift
149
89
189
Figure 4 - Pulse timing diagrams for vertical clocks during line blanking
STILL PICTURE MODE - 1/30s Integration
Tvertical = (1/25E6 * 2040) * 2035 = 166.1 ms
1622 sensor lines
298
storage lines
overscan
1280
active lines
8
overscan
12
black lines
4
dummy
lines
CR
1628
NS_pulse
CR
1628
A1 / A2
A3 / A4
2
1626
line shift
B1 / B2
B3 / B4
Figure 5 - Still picture mode timing diagrams
2000 January
7
integration
1599
1600
1601
1602
1603
1604
1605
1606
1507
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
2028
2029
2030
2031
2032
2033
2035/0
1
2
3
4
5
6
7
8
9
12
black lines
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
4
dummy
integration
line count
1324
image lines
8
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
MONITOR MODE - 1/60s integration
integration
Tvertical = (1/25E6 * 2040) * 315 = 25.7ms
12
black
4
dummy
NS_pulse
CR
113
14
1
1
CR
113
2
A1 / A2
remaining storage lin
6
12
black
110
111
112
113
114
314
315/0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
line count
298 sensor lines
264
subsampled
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315/0
1
4
dummy
black
2
A3 / A4
frame shift
line shift
2
B1 / B2
18
315
2
B3 / B4
FS and Subsampling pulses in monitor mode
4 phase - 4:4 Frame Shift with 2/10 subsampling
Transport frequency 1.56MHz
A1
A2
A3
A4
B1
B2
B3
B4
A1
A2
A3
A4
B1
B2
B3
B4
Figure 6 - Monitor mode timing diagrams
2000 January
8
1330
1329
1328
1327
1326
1325
1324
1323
1322
1321
Removing 6 storage gap lines
1320
1319
1318
1317
1316
1315
1314
12 black
1313
1312
1311
1310
1309
1308
1307
1306
1305
1304
1303
1302
1301
1300
1299
1298
1297
1296
1294
1295
FS-counter
1293
Remaining 6 active image lines
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
18
19
17
16
15
14
13
11
1290 active image lines to 258 lines via subsampling
12
10
9
8
7
6
5
12 black
4
3
2
1
4 dummy
FS-counter
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
Pixel timing
C1
C2
C3
C4
RG
—> time
Y : 5V/ Div.
X : 10ns/ Div.
Figure 7 - Start horizontal readout
2000 January
9
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
Performance
• The light source is a 3200K lamp with a 1.7mm thick BG40 infrared
cut-off filter; F=16.
• Vertical Anti-Blooming condition
• Horizontal transport frequency = 25MHz.
The test conditions for the performance characteristics in the still
mode of operation are as follows:
• All values are measured using typical operating conditions.
• Integration time = 1/30 sec (unless specified otherwise).
• Test temperature = 60°C (333K).
Performance Characteristics
Min.
Typical
Charge Transfer Efficiency 1 vertical
0.999997
Charge Transfer Efficiency 1 horizontal
0.999997
Image lag
Sensitivity, green SG 2
Sensitivity, red SR
2
Max.
Unit
0
%
295
mV/lux.s
240
mV/lux.s
Sensitivity, blue SB 2
175
mV/lux.s
Sensitivity Ratio SG / SR
1.25
Sensitivity Ratio SG / SB
1.7
Sensitivity Ratio SR / SB
1.4
Shading per colour plane 3
Differential colour shading
%
PRNU per colour plane
Green–green difference
%
2
4
0.8
5
2.5
%
5
%
40
50
60
mW
Full-well capacity saturation level (Qmax) 6
35
45
55
x 103
Saturation signal
720
1000
1500
mV
Power consumption (Still mode)
mW
Power consumption (Monitoring mode)
Dynamic range at 20°C : 20log(Qmax /noise electrons)
72
dB
Overexposure 7 handling
100
x Qmax level
1
Charge Transfer Efficiency values are expressed as the value per gate transfer.
The sensitivity when a light source directly illuminates the CCD.
3
Shading is defined as the one-σ value of the pixel output distribution expressed as a percentage of the mean value output (low-pass image).
4
Difference in shading between the four colour planes, with standard imaging condition, still mode.
5
Difference in average green signal between ‘green in red line’ and ‘green in blue line’, with standard imaging condition, still mode
6
Q max is determined from the lowpass filtered image.
7
Overexposure over entire area while maintaining good Vertical Anti-Blooming (VAB). It is tested by measuring the dark line.
2
2000 January
10
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
RGB response
100
Red
90
Green
Response (A.U.)*
80
70
Blue
60
50
40
30
20
10
0
400
450
500
550
600
650
700
Wavelenght (nm)
*Arbitrary units
Figure 8 - RGB response
Output Buffer
Conversion factor at output node
2
Typical
Max
Unit
18
20
25
µV/el.
Supply current
4
mA
Bandwidth
95
MHz
RMS readout noise @ 5MHz bandwidth after CDS
12
15
el.
Typical
Max.
Unit
Dark Condition at 60°° C 1
1
Min
Min.
electrons
Average no. of dark signal electrons per pixel after 1/30 sec integration
25
Dark signal shading
1
Dark current level @ 60° C
0.3
0.6
nA/cm2
Fixed Pattern Noise 2 (FPN) @ 60° C
15
25
electrons
Typical operating conditions (Image capture mode; 60°C; 1/30s exp. time).
FPN is the one-σ value of the highpass image.
2000 January
11
mV
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
Application information
Current handling
One of the purposes of VPS is to drain the holes that are generated
during exposure of the sensor to light. Free electrons are either
transported to the VRD connection and, if excessive (from overexposure), free electrons are drained to VNS. No current should
flow into VPS. During overexposures a total current 0.5 to 1mA
through VPS may be expected. The PNP emitter follower in the circuit
diagram (figure 9) serves these current requirements.
VNS drains superfluous electrons as a result of overexposure. In
other words, it only sinks current. During overexposures a total current
of 0.5 to 1mA through VNS may be expected. The NPN emitter
follower in the circuit diagram meets these current requirements.
The clamp circuit, consisting of the diode and electrolytic capacitor,
enables the addition of a Charge Reset (CR) pulse on top of an
otherwise stable VNS voltage. To protect the CCD, the current
resulting from this pulse should be limited. This can be accomplished
by designing a pulse generator with a rather high output impedance.
a current source or more simply with a resistance to GND. In order
to prevent the output (which typically has an output impedance of
about 400 Ohm) from bandwidth limitation as a result of capacitive
loading, load the output with an emitter follower built from a highfrequency transistor. Mount the base of this transistor as close as
possible to the sensor and keep the connection between the emitter
and the next stage short. The CCD output buffer can easily be
destroyed by ESD. By using this emitter follower, this danger is
suppressed; do NOT reintroduce this danger by measuring directly
on the output pin of the sensor with an oscilloscope probe. Instead,
measure on the output of the emitter follower. Slew rate limitation is
prevented by avoiding a too-small quiescent current in the emitter
follower; about 10mA should do the job. The collector of the emitter
follower should be decoupled properly to suppress the Miller effect
from the base-collector capacitance. A CCD output load resistor of
3.3 kΩ typically results in a bandwidth of 95MHz.
Decoupling of DC voltages
All DC voltages (not VNS, which has additional CR pulses as
described above) should be decoupled with a 100nF decoupling
capacitor. This capacitor must be mounted as close as possible to
the sensor pin. Further noise reduction (by bandwidth limiting) is
achieved by the resistors in the connections between the sensor
and its voltage supplies. The electrons building up the charge packets
that will reach the floating diffusion only add up to a small current,
which will flow through VRD. Therefore a large series resistor in the
VRD connection may be used.
Device protection
The output buffer or VNS of the FXA 1012 is likely to be damaged if
VPS rises above SFD or RD at any time. This danger is most realistic
during power-on or power-off of the camera.
Never exceed the maximum output current. This may damage the
device permanently. The maximum output current should be limited
to 6mA. Be especially aware that the output buffers of these image
sensors are very sensitive to ESD damage.
Because of the fact that our CCDs are built on an n-substrate, we
are dealing with some parasitic NPN transistors. To avoid activation
of these transistors during switch-on and switch-off of the camera,
we recommend the application diagram of figure 9.
NC
B2
B4
BAS28
OUT
OG
C4
R6
BFR92
R9
C3
RD
RG
C1
C4
C7
100n
C8
100n
C9
100n
100n
C3
100K
R13
100K
BAS28
R12
BAS28
R11
BAS28
C6
C10 100n
C11 100n
R14
R15
R16
R17
22K
100K
6K8
18K
Figure 9 - Application diagram to protect the FXA 1012
2000 January
H DRIVER
1
C2
100n
BAT74
100K
R8
3K3
2K2
R7
SFD
SFS
100E
CCD OUT
Cstray
100n
47E
100K
NC
R18 100n
R4
NC
47K
VNS
FXA 1012
C5
47K
BC860C
100n
R2
VPS
C1
1K
BAT74
R3
22K
R1
100K
C2
B3
C3
C2
C1
C4
B3
A1
R5
A1
A2
ES
A2
A3
B1
4.7uF
A3
A4
B4
A4
NC
B2
VNS
BAT74
From PPG
B1
From V-Drivers
VSFD
From CCD Supply
12
74ACT04
RG
Output
To limit the on-chip power dissipation, the output buffer is designed
with open source output. The output should therefore be loaded with
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
Peripheral ICs
To allow compact and low-cost applications, use of the following
peripheral circuits for the FXA 1012 is suggested:
Device Handling
An image sensor is a MOS device which can be destroyed by electrostatic discharge (ESD). Therefore, the device should be handled
with care.
• Pulse Pattern Generator
The PPG (pulse pattern generator) delivers all the pulses, at logic
level, to drive the vertical clocks of the CCD. For this sensor, the
PPG is included in the DSP SAA8122 or separately in the Timing
Generator SAA8103.
Always store the device with short-circuiting clamps or on conductive
foam. Always switch off all electric signals when inserting or removing
the sensor into or from a camera (the ESD protection in a CCD
image sensor is less effective than the ESD protection of standard
CMOS circuits).
• Vertical Drivers + DC/DC Converter
The vertical drivers convert the 3.3V or 5V logic pulses from the
PPG to 12V analog pulses to drive the vertical clocks of the CCD.
The recommended driver is the Philips TDA9991.
Being a high quality optical device, it is important that the cover
glass remain undamaged. When handling the sensor, use fingercots.
• CDS - AGC - ADC
The combined CDS (correlated double sampling) - AGC (automatic
gain control) and ADC (10 bit analog-to-digital convertor) is the
easiest way to link the output of the CCD to a DSP (digital signal
processor). Philips Semiconductors # TDA8783
To remove the protective tape from the cover glass, use the following
procedure:
• do not scratch or tear off the protective tape before mounting.
• peel off the tape slowly.
• the use of an ionised air blower is recommended when peeling off
the tape.
• once peeled off, do not reuse the tape.
• DSP
A dedicated DSP has been developed that can handle the image
for mat and different modes of the FXA 1012. Philips
Semiconductors # SAA8122.
To clean stains from the package surface, use a cotton stick soaked
in ethanol. Wipe carefully in order not to scratch the glass surface.
Special modes of operation
Monitor mode with 240 lines vertical resolution is achieved with 1:5
subsampling, yielding 1200/5 = 240 lines. When 1:4 subsamlping is
applied, an image with 288 lines vertical resolution is obtained.
Dry rubbing of the cover glass may cause electro-static discharges
which can destroy the device.
Soldering information
The CCD package temperature must not exceed 150°C. Soldering
iron temperature should be under 300°C when mounting a CCD on
a printed circuit board. Aim for a soldering time of 3 seconds per
pad. Use a soldering iron that has an adjustable temperature control
function (that is grounded) that holds the soldering iron tip at a
constant temperature.
2000 January
13
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
Pin configuration
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
3
2
1
Symbol
Pin Number
Symbol
a3
a4
NC
b1
b2
vps
NC
out
sfd
sfs
rd
rg
13
14
15
16
17
18
19
20
21
22
23
24
c4
c1
c2
c3
og
NC
vns
b4
b3
NC
a1
a2
24
23
22
22
23
24
1
2
3
4
21
21
4
5
20
20
5
6
19
19
6
7
18
18
7
8
17
17
8
9
16
16
9
10
11
12
13
14
15
15
Figure 10 - Pin configuration
2000 January
14
14
13
12
11
10
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
Package information
8. 3 +/ - 0. 2
8. 3 +/ - 0. 2
12. 7 +/ - 0. 1
6. 4 +/ - 0. 4
(R
0.6
)
Glass
Resin
14. 1 +/ - 0. 4
2. 9 +/ - 0. 4
A
H
B
4-
Sensor
1. 2
1
Optical center
( 1. 2)
2- 1
a'
1. 2
.
R0
25
1. 685 +/ - 0. 168
2. 05 +/ - 0. 14
c
1 +/ - 0. 1
8. 605 +/ - 0. 2
V
0. 3 +/ - 0. 13
16. 3 +/ - 0. 2
2. 54
a
.5
0. 7 +/ - 0. 08
R0
1. 865 +/ - 0. 2
1. 2 +/ - 0. 15
6. 3 +/ - 0. 4
3. 55 +/ - 0. 2
a-a'
1. The bottom of the package [A] is the height reference.
2. The height from the bottom [A] to the effective image area is 1.685 +/-0.168mm.
The height from the top of the cover glass [B] to the effective image area is 1.865 +/-0.2mm.
3. The tilt of the effective image area relative to the height reference is less than 0.095mm.
4. The thickness of the Au plating is more than 1.0um.
The thickness of the Au plating is less than 3.0um.
5. The point [C] is the origin of H&V direction.
6. The center of effective image area relative to [C] is (V,H)=(8.605,0)+/-0.2mm.
7. The rotation angle of the effective image area relative to H and V is less than +/-1.5 degrees.
8. The rotation angle of the cover glass relative to H and V is less than +/-2degrees.
9. The thickness of the cover glass is 1.5 +/-0.05mm, and the refractive index 1.5.
10. The refractive index of the resin is 1.5.
11. The tolerances that are not shown are +/-0.13mm.
12. D=2.18 +/-0.44mm
D: Distance between left edge of imaging area and left edge of cover glass.
+/-0.44mm means 4sgm = 0.44mm.
13. No horizontal force is allowed to cover glass lid.
ALL LINEAR DIMENSIONS ARE IN MILLIMETERS
Figure 11 - Mechanical drawing of the FXA 1012 package
2000 January
15
R0
.3
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
13. 5
Protection foil
6. 7
a
Glass
14. 5
12
Resin
Sensor
0. 06
R
2
a'
a-a'
Figure 12 - Protective foil on top of cover glass
2000 January
16
Objective specification
Frame Transfer CCD Image Sensor
Order codes
The sensor can be ordered using the following code:
FXA 1012 sensor
Description
FXA 1012 WC
Order Code
9352 670 10117
You can contact the Image Sensors division of Philips
Semiconductors at the following address:
Philips Semiconductors
Image Sensors
Internal Postbox WAG-05
Prof. Holstlaan 4
5656 AA Eindhoven
The Netherlands
phone
fax
+31 - 40 - 27 44 400
+31 - 40 - 27 44 090
www.semiconductors.philips.com/imagers/
Philips
Semiconductors
FXA 1012
Philips reserves the right to change any information contained herein without notice. All information furnished by Philips is believed to be accurate. © Philips Electronics N.V. 2000
9352 670 10117
Philips Semiconductors