TC211 192- × 165-PIXEL CCD IMAGE SENSOR SOCS008B – JANUARY 1990 • • • • • • • • • • DUAL-IN-LINE PACKAGE (TOP VIEW) Full-Frame Operation Antiblooming Capability Single-Phase Clocking for Horizontal and Vertical Transfers Fast Clear Capability Dynamic Range . . . 60 dB Typical High Blue Response High Photoresponse Uniformity Solid-State Reliability With No Image Burn-In, Residual Imaging, Image Distortion, Image Lag, or Microphonics 6-Pin Dual-In-Line Ceramic Package Square Image Area: – 2640 µm by 2640 µm – 192 Pixels (H) by 165 Pixels (V) – Each Pixel 13.75 µm (H) by 16 µm (V) ABG 1 6 IAG VSS 2 5 SRG ADB 3 4 OUT description The TC211 is a full-frame charge-coupled device (CCD) image sensor designed specifically for industrial applications requiring ruggedness and small size. The image-sensing area is configured into 165 horizontal lines each containing 192 pixels. Twelve additional pixels are provided at the end of each line to establish a dark reference and line clamp. The antiblooming feature is activated by supplying clock pulses to the antiblooming gate, an integral part of each image-sensing element. The charge is converted to signal voltage at 4 µV per electron by a high-performance structure with built-in automatic reset and a voltage-reference generator. The signal is further buffered by a low-noise two-stage source-follower amplifier to provide high output-drive capability. The TC211 is supplied in a 6-pin dual-in-line ceramic package approximately 7,5 mm (0.3 in.) square. The glass window can be cleaned using any standard method for cleaning optical assemblies or by wiping the surface with a cotton swab soaked in alcohol. The TC211 is characterized for operation from – 10°C to 45°C. This MOS device contains limited built-in gate protection. During storage or handling, the device leads should be shorted together or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to VSS. Under no circumstances should pin voltages exceed absolute maximum ratings. Avoid shorting OUT to VSS during operation to prevent damage to the amplifier. The device can also be damaged if the output terminals are reverse-biased and an excessive current is allowed to flow. Specific guidelines for handling devices of this type are contained in the publication Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments. Copyright 1990, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2-1 TC211 192- × 165-PIXEL CCD IMAGE SENSOR SOCS008B – JANUARY 1990 functional block diagram 165 ABG ADB 6 1 IAG 3 1 1 OUT 4 192 5 Serial Register SRG Clear Gate VSS 12 Dark Pixels 192 Image Pixels 6 Dummy Pixels 2 Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. ABG 1 VSS ADB 2 3 I Supply voltage for amplifier drain bias OUT 4 O Output signal SRG 5 I Serial-register gate IAG 6 I Image-area gate storage I Antiblooming gate Amplifier ground functional description The image-sensing area consists of 165 horizontal image lines each containing 192 photosensitive elements (pixels). Each pixel is 13.75 µm (horizontal) by 16.00 µm (vertical). As light enters the silicon in the image-sensing area, free electrons are generated and collected in potential wells (see Figure 1). During this time, the antiblooming gate is activated by applying a burst of pulses every horizontal blanking interval. This prevents blooming caused by the spilling of charge from overexposed elements into neighboring elements. The antiblooming gate is typically held at a midlevel voltage during readout. The quantity of charge collected in each pixel is a linear function of the incident light and the exposure time. After exposure and under dark conditions, the charge packets are transferred from the image area to the serial register at the rate of one image line per each clock pulse applied to the image-area gate. Once an image line has been transferred into the serial register, the serial-register gate can be clocked until all of the charge packets are moved out of the serial register to the charge detection node at the amplifier input. There are 12 dark pixels to the right of the 192 image pixels on each image line. These dark pixels are shielded from incident light and the signal derived from them can be used to generate a dark reference for restoration of the video black level on the next image line. 2-2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC211 192- × 165-PIXEL CCD IMAGE SENSOR SOCS008B – JANUARY 1990 functional description (continued) Each clock pulse applied to the image area gate causes an automatic fast clear of the 192 image pixels and 12 dark pixels of the serial register before the next image line is transferred into the serial register. (Note that the six dummy pixels at the front of the serial register, which are used to transport charge packets from the serial register to the amplifier input, are not cleared by the image area gate clock.) The automatic fast-clear feature can be used to initialize the image area by transferring all 165 image lines to the serial register gate under dark conditions without clocking the serial register gate. Potential Wells Barriers Antiblooming Gate Vertical 16 µm Horizontal 13.75 µm Representative Top View of Pixels Channel Stop Virtual Phase Clocked Phase (imagearea gate) Virtual Phase Clocked Phase (imagearea gate) Virtual Phase Clocked Phase (imagearea gate) Etched Polysilicon Insulating Oxide Cross Section of Pixels Silicon 1 Pixel IAG Low ABG Low ABG Intermediate Cross Section of Potentials in Silicon IAG High ABG High Direction of Vertical Charge Transfer Figure 1. Charge Accumulation and Transfer Process POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2-3 TC211 192- × 165-PIXEL CCD IMAGE SENSOR SOCS008B – JANUARY 1990 Readout Integration ABG 165 Cycles IAG 210 Cycles SRG IAG tw1 t3 t2 SRG t1 tw2 t4 Figure 2. Timing Diagram, Noninterlace Mode absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range for ADB (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to 15 V Input voltage range for IAG, SRG, ABG, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –15 V to 5 V Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30°C to 85°C Storage temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 30°C to 85°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to VSS. 2-4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC211 192- × 165-PIXEL CCD IMAGE SENSOR SOCS008B – JANUARY 1990 recommended operating conditions Supply voltage, ADB MIN NOM MAX 11 12 13 Substrate bias voltage 0 IAG Input voltage, voltage VI† SRG 1.5 Intermediate level‡ –10 –5 2 Low level –11 – 10 –9 High level 1.5 2 2.5 Low level –11 – 10 –9 Intermediate level‡ Low level Clock frequency, fclock V V High level High level ABG 2 UNIT 2.5 4 4.5 5 –3 –2.5 –2 – 7.5 –7 – 6.5 IAG 1.5 SRG 10 ABG 2 V MHz t1 Time interval, SRG↓ to IAG↑ 70 ns t2 Time interval, IAG↑ to SRG transfer pulse ↑ tW1 tW2 Pulse duration, IAG high 0 ns 350 Pulse duration, SRG transfer pulse high 350 ns ns t3 Time interval, IAG↓ to SRG transfer pulse ↓ 350 ns t4 Time interval, SRG transfer pulse ↓ to SRG clock pulse ↑ 70 ns Capacitive load OUT 12 pF Operating free-air temperature, TA –10 45 °C † The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for clock voltage levels. ‡ Adjustment is required for optimal performance. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2-5 TC211 192- × 165-PIXEL CCD IMAGE SENSOR SOCS008B – JANUARY 1990 electrical characteristics over recommended operating range of supply voltage, TA = –10°C to 45°C PARAMETER Dynamic range (see Note 2) MIN Antiblooming disabled (see Note 3) 60 Antiblooming enabled 57 Charge conversion factor TYP† MAX dB µV/e 4 Charge transfer efficiency (see Note 4) 0.99990 0.99998 0.97 0.98 0.99 700 800 Signal response delay time, τ (see Note 5 and Figure 5) 25 Gamma (see Note 6) Output resistance 1/f noise (5 kHz) Noise voltage ns nV/√Hz 70 Noise equivalent signal 150 From ADB to OUT (see Note 7) 19 From SRG to OUT (see Note 8) 37 Supply current 5 IAG Input capacitance, Ci Ω 370 Random noise, f = 100 kHz Rejection ratio at 7.16 7 16 MHz UNIT electrons dB 10 mA 1600 SRG 25 ABG 780 pF † All typical values are at TA = 25°C NOTES: 2. Dynamic range is – 20 times the logarithm of the mean noise signal divided by the saturation output signal. 3. For this test, the antiblooming gate must be biased at the intermediate level. 4. Charge transfer efficiency is one minus the charge loss per transfer in the output register. The test is performed in the dark using an electrical input signal. 5. Signal response delay time is the time between the falling edge of the SRG clock pulse and the output signal valid state. 6. Gamma (γ) is the value of the exponent in the equation below for two points on the linear portion of the transfer function curve (this value represents points near saturation): ǒ Ǔ +ǒ Exposure (2) Exposure (1) g Ǔ Output signal (2) Output signal (1) 7. ADB rejection ratio is – 20 times the logarithm of the ac amplitude at the OUT divided by the ac amplitude at ADB. 8. SRG rejection ratio is – 20 times the logarithm of the ac amplitude at the OUT divided by the ac amplitude at SRG. 2-6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC211 192- × 165-PIXEL CCD IMAGE SENSOR SOCS008B – JANUARY 1990 optical characteristics, TA = 25°C (unless otherwise noted) PARAMETER No IR filter Sensitivity (see Note 9) With IR filter Saturation signal (see Note 11) MIN MAX 260 Measured at VU (see Note 10) 400 600 Antiblooming enabled 350 450 mV 5 Shuttered light 100 Output signal nonuniformity (1/2 saturation) (see Note 13) 10% Image-area well capacity 150 × 103 Dark current TA = 21°C 20% electrons nA/cm2 0.027 Dark signal (see Note 14) Dark signal nonuniformity for entire field (see Note 15) Modulation transfer function UNIT mV/lx 33 Antiblooming disabled Strobe Blooming overload ratio (see Note 12) TYP 10 15 mV 4 15 mV Horizontal 50% Vertical 70% NOTES: 9. 10. 11. 12. 13. Sensitivity is measured at an integration time of 16.667 ms and a source temperature of 2856 K. A CM-500 filter is used. VU is the output voltage that represents the threshold of operation of antiblooming. VU ≈ 1/2 saturation signal. Saturation is the condition in which further increase in exposure does not lead to further increase in output signal. Blooming overload ratio is the ratio of blooming exposure to saturation exposure. Output signal nonuniformity is the ratio of the maximum pixel-to-pixel difference in output signal to the mean output signal for exposure adjusted to give 1/2 the saturation output signal. 14. Dark-signal level is measured from the dummy pixels. 15. Dark-signal nonuniformity is the maximum pixel-to-pixel difference in a dark condition. PARAMETER MEASUREMENT INFORMATION VIH min 100% 90% Intermediate Level 10% VIL max 0% tr tf tr = 220 ns, tf = 330 ns for IAG tr = 115 ns, tf = 135 ns for ABG Figure 3. Typical Clock Waveform for IAG and ABG POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2-7 TC211 192- × 165-PIXEL CCD IMAGE SENSOR SOCS008B – JANUARY 1990 PARAMETER MEASUREMENT INFORMATION VIH min 100% 90% 10% VIL max 0% tr tf tr = 25 ns, tf = 30 ns Figure 4. Typical Clock Waveform for SRG 1.5 V to 2.5 V SRG – 8.5 V – 8.5 V to – 10 V 0% OUT 90% 100% CCD Delay t 10 ns 15 ns Sample and Hold Figure 5. SRG and OUT Waveforms 2-8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 TC211 192- × 165-PIXEL CCD IMAGE SENSOR SOCS008B – JANUARY 1990 TYPICAL CHARACTERISTICS VERTICAL MODULATION TRANSFER FUNCTION (BARS PARALLEL TO SERIAL REGISTER) HORIZONTAL MODULATION TRANSFER FUNCTION (BARS PERPENDICULAR TO SERIAL REGISTER) 1 MTF – Modulation Transfer Function MTF – Modulation Transfer Function 1 0.8 0.6 0.4 0.2 λ = 400 to 700-nm Monochromatic Light VADB = 12 V TA = 25°C 0 0.8 0.6 0.4 0.2 λ = 400 to 700-nm Monochromatic Light VADB = 12 V TA = 25°C 0 0 0.2 0.4 0.6 0.8 1 0 0.2 Normalized Spatial Frequency 0 6.3 12.5 18.8 25.0 0.4 0 31.3 7.3 1 14.6 21.8 29.1 36.4 Spatial Frequency – Cycles/mm Figure 6 Figure 7 CCD SPECTRAL RESPONSIVITY NOISE SPECTRUM OF OUTPUT AMPLIFIER 1 1000 Responsivity – A/W 100 10 100% VADB = 12 V TA = 25°C VADB = 12 V TA = 25°C Hz 0.8 Normalized Spatial Frequency Spatial Frequency – Cycles/mm Noise – nV/ 0.6 50% 20% 0.1 10% 5% 3% 2% 1 103 104 105 f – Frequency – Hz 106 107 0.01 300 500 700 900 1100 1300 Incident Wavelength – nm Figure 8 Figure 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2-9 TC211 192- × 165-PIXEL CCD IMAGE SENSOR SOCS008B – JANUARY 1990 TYPICAL APPLICATION DATA 1 GND 7 GND VCC CK 14 VCC 8 Master Oscillator V VSS 22 kΩ TMS3473B 1 2 3 4 5 6 VCC 7 8 9 10 IALVL1 CLK IAG CMP ABG CBNK GT1 CSYNC S/H SRG TRIG S/H User-Defined Timer VABG+ IALVL I/N IAIN ABIN MIDSEL SAIN PD GND VABG+ VSS VSS IASR ABSR VCC ABLVL IAOUT ABOUT SAOUT VCC VABG– ADB 20 19 18 17 16 15 14 13 12 11 47 kΩ 2.2 kΩ ABLVL TC211 1 ABG 5 kΩ IAG 6 ADB 2 VSS SRG ADB OUT 5 ADB VABG– Parallel Driver ADB 3 4 2N3904 Image Sensor SEL0OUT VSS GND SEL0 PD NC SRG3IN VCC SRG2IN SRG3OUT SRG1IN SRG2OUT TRGIN SRG1OUT NC TRGOUT SEL1OUT VCC VSS SEL1 4 500 20 19 18 17 16 15 14 13 12 11 7 EL2020 6 2 SN28846 1 2 VCC 3 4 5 6 7 8 9 10 3 1 kΩ VDD VCC TL1591 1 2 3 4 Serial Driver ANLG VCC ANLG IN ANLG GND ANLG OUT DGTL VCC DGTL IN DGTL GND SUB GND Sample-and-Hold OUT SUPPORT CIRCUITS DEVICE PACKAGE APPLICATION FUNCTION SN28846DW 20 pin small outline Serial driver Driver for SRG TMS3473BDW 20 pin small outline Parallel driver Driver for IAG, ABG TL1591CPS 8 pin small outline (EIAJ) Sample and hold Single-channel sample-and-hold IC Figure 10. Typical Application Circuit Diagram 2-10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 8 7 6 5 S/H TC211 192- × 165-PIXEL CCD IMAGE SENSOR SOCS008B – JANUARY 1990 MECHANICAL DATA The package for the TC211 consists of a ceramic base, glass window, and a 6-lead frame. The glass window is sealed to the package by an epoxy adhesive. The package leads are configured in a dual-in-line organization and fit into mounting holes with 2,54 mm (0.1 inch) center-to-center spacings. 7,54 (0.297) 7,14 (0.281) 1 6 7,82 (0.308) 2 7,24 (0.285) 5 3 4 2,54 (0.100) 4,45 (0.175) 0,31 (0.012) 0,23 (0.009) 7,62 (0.300) 2,54 (0.100) 0,48 (0.019) 0,38 (0.015) 1,30 (0.051) 1,04 (0.041) 7/94 NOTES: A. Dimensions are in millimeters and parenthetically in inches. Single dimensions are nominal. B. The center of the package and the center of the image area are not coincident. C. The distance from the top of the glass to the image sensor surface is typically 1 mm (0.04 inch). The glass is typically 0.020 inch thick and has an index of refraction of 1.52. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 2-11 SOCS008B – JANUARY 1990 2-12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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