TENTATIVE TB31356AFL TOSHIBA Bi-CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC TB31356AFL 1.8GHz,600MHz DUAL-PLL FREQUENCY SYNTHESIZER The TB31356AFL is a PLL synthesizer used for application of the digital mobile communication and similar other applications. The device features two independently-controllable, built-in PLLs. FEATURES l Operating frequency l l l l PLL1 : 700 to 1800MHz PLL2 : 40 to 600MHz Current consumption Total : 3.7mA(PLL1+PLL2+XIN) (Typ.) PLL1 : 2.7mA (PLL1+XIN) (Typ.) PLL2 : 1.1mA (PLL2+XIN) (Typ.) (XIN=0.1mA Typ.) Operating voltage : 2.4 to 3.3V Independent battery save supported Compact leadless package : QON16pin(0.65mm pitch) LPF BLOCK DIAGRAM 12 11 10 QON16-P-0404-0.65 Weight : 0.04g (Typ.) VCC-PLL2 9 STB 13 DATA 14 7 LA CLK 15 6 LD BS-PLL1 16 16/17 PLL1 64/65 1 8 PLL2 2 3 LPF 5 TCXO BS-PLL2 4 VCC-PLL1 000630EBA1 • TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless,semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc.. • The Toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These Toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of Toshiba products listed in this document shall be made at the customer’s own risk. • The products described in this document are subject to the foreign exchange and foreign trade laws. • The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. • The information contained herein is subject to change without notice. Nov. 27, 2002 PAGE 1 TENTATIVE TB31356AFL PIN FUNCTION (The value of resistor and capacitor are typical.) PIN FUNCTION No. PIN NAME INTERNAL EQUIVALENT CIRCUIT VCC 16KΩ 1KΩ 1 FIN1 PLL1 prescaler input pin. Inputs frequency from VCO. 1 GND 2 GND Ground pin. VCC 3 CP1 4 VCC-PLL1 Charge pump output pin for PLL1. Constant current output. 3 GND Power supply pin (PLL1). 5 5 BS-PLL2 1KΩ PLL2 battery saving pin. GND 6 LD 6 Lock detection output pin. Open drain output. PLL to be detected can be switched by serial data. 1KΩ GND 7 7 LA 1KΩ PLL2 setting frequency switch pin. GND VCC 8 XIN 8 Reference oscillator input pin. GND 9 VCC-PLL2 Power supply pin (PLL2). This specification is design target. It is subject to change without notice . - Nov. 27 2002 PAGE 2 TENTATIVE PIN No. PIN NAME TB31356AFL INTERNAL EQUIVALENT CIRCUIT FUNCTION VCC 10 CP2 Charge pump output pin for PLL2. Constant current output. 11 GND Ground pin. 10 GND VCC 24KΩ 1KΩ 12 FIN2 PLL2 prescaler input pin. Inputs Frequency from VCO. 12 GND 13 14 15 STB DATA CLK 16 BS-PLL1 Strobe input pin. Data input pin. Clock input pin. PLL1 battery saving pin. N 1KΩ GND N=13,14,15,16 This specification is design target. It is subject to change without notice . Nov. 27 2002 PAGE 3 TENTATIVE TB31356AFL DESCRIPTION OF FUNCTION AND OPERATION (1) Serial data control TB31356AFL operates according to serial data program. Serial data is input from the clock (CLK), data (DATA), and strobe (STB) pin. (2) Entry of serial data l At the rising edge of each clock pulse, data is sent to the internal shift register from the LSB sequentially. When all the data is sent, set the strobe pin to high. At this rising edge, data is stored in latches depending on the control contents. At the same time as data is stored, control starts. l The CLK, DATA, and STB pin contain the schmitt trigger circuit to prevent the data errors by noise, etc. At power on, send the option control data before any other divider data. l (3) Serial data input timing =>0.1µs CLK =>0.04µs =>0.04µs DATA =>0.02µs =>0.04µs =>0.02µs =>0.04µs STB (4) Serial data groups and group code l The IC has control divided into five groups so that they may be controlled independent of one another. Each group is identified by three-bit group code attached at the data end. Bit before preceding one Preceding bit Last bit Control contents 0 0 0 PLL1 programmable divider (FIN1) data 0 1 0 PLL2 programmable divider (FIN2) data 0 0 1 PLL1 reference divider (XIN) data 0 1 1 PLL2 reference divider (XIN) data 1 0 0 Option Control This specification is design target. It is subject to change without notice . Nov. 27 2002 PAGE 4 TENTATIVE TB31356AFL (5) PLL1 divider data l Consist of a 6-bit swallow counter (programmable counter), a 12-bit programmable counter, and a 1/64, 1/65 two modulus prescaler. l By sending any data to the swallow counter and programmable counter, number of division can be set from 4032 to 262143. LSB A0 A1 A2 A3 A4 A5 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 SB1 SB2 SBX 0 0 0 Swallow counter : A Programmable counter : N Battery saving Group code Number of divisions = 64N+A (4032 =< Number of divisions =< 262143) 1 5 A=A0+A1*2 .......+A5*2 A : Value of A counter 1 11 N=D0+D1*2 +.......+D11*2 N : Value of N counter (6) PLL2 divider data l Consist of a 4-bit swallow counter (programmable counter), a 11-bit programmable counter, and a 1/16, 1/17 two modulus prescaler. l By sending any data to the swallow counter and programmable counter, number of division can be set from 240 to 32767. LSB A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 LA SB1 SB2 SBX 0 Swallow counter : A Programmable counter : N 1 0 Battery saving Group code Number of divisions = 16N+A (240 =< Number of divisions =< 32767) 1 3 A=A0+A1*2 .......+A3*2 A : Value of A counter 1 10 N=D0+D1*2 +.......+D10*2 N : Value of N counter (7) PLL1 reference divider data l l Consist of a 12-bit reference counter (programmable counter). By sending any data to the reference counter, number of division can be set from 4 to 4095 LSB 0 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 SB1 SB2 SBX 0 Reference counter 1 Battery saving 1 Group code 11 D=D0+D1*2 +.........D11*2 4 =< Number of divisions =< 4095 This specification is design target. It is subject to change without notice . Nov. 27 2002 PAGE 5 TENTATIVE TB31356AFL (8) PLL2 reference divider data l Consist of a 12-bit reference counter (programmable counter). l By sending any data to the reference counter, number of division can be set from 4 to 4095. LSB D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 LA SB1 SB2 SBX Reference counter 1 0 1 1 Battery saving Group code 11 D=D0+D1*2 +.........D11*2 4 =< Number of divisions =< 4095 •PLL2 divider data LA External Pin L H Resistor LA = ”0” LA = ”1” (9) Option Control LSB 0 CP1 CP2 CP3 CP4 LD1 LD2 SB1 SB2 SBX 1 0 0 Charge pump current Lock detection Battery saving Group code l Charge pump output current This IC uses a constant current output type charge pump circuit. Output current is varied by serial data “CP1” and “CP2”. CP1 CP3 0 0 1 1 0 1 0 1 PLL1 Charge Pump Output Current 4mA 2mA 1mA 0.5mA CP2 CP4 0 0 1 1 0 1 0 1 This specification is design target. It is subject to change without notice . PLL2 Charge Pump Output Current 4mA 2mA 1mA 0.5mA Nov. 27 2002 PAGE 6 TENTATIVE l TB31356AFL Lock detection A signal indicating whether the PLL has phase-locked to the desired frequency is presented to the LD pin. The PLL to be detected in this way can be selected by setting two bits, LD1 and LD2, as shown in the table below. LD1 LD2 Detected PLL 0 0 Not detected (fixed low) 0 1 PLL2 1 0 PLL1 1 1 Only when both PLL1 and PLL2 are detected Locked in phase = open, Unlocked = low, Power-down mode = open l Power-down mode The PLL1, PLL2, and crystal oscillator circuit can be switched between operating and power-down modes by using three bits—SB1, SB2, and SBX. The table below shows how operation is controlled by using these bits and external battery save pins. External Pin BS1 BS2 L L L H H L SB1 * * * Serial Data SB2 SBX * * * * * * PLL1 OFF OFF ON Operation State PLL2 Buffer OFF OFF ON ON OFF ON H H 0 0 0 OFF OFF OFF H H 0 0 1 OFF OFF ON H H 0 1 * OFF ON ON H H 1 0 * ON OFF ON H H 1 1 * ON ON ON Notes1 : ON : operating, OFF : power-down (not operating), * : don’t care Notes2 : Switching between operating and battery saving (power down) mode by using serial data is renewed at the rising edge of strobe signal. Notes3 : Switching between operating and battery saving (power down) mode by using external pin (BS-PLL1,BS-PLL2) is controlled real-time. Notes4 : Immediately after power on, need a initial setting by serial data before operation state “ON”. This specification is design target. It is subject to change without notice . Nov. 27 2002 PAGE 7 TENTATIVE TB31356AFL MAXIMUM RATINGS (Ta=25°C) CHARACTERISTIC Power Supply Voltage Power Dissipation Input Voltage Storage Temperature SYMBOL VCC-PLL1 , VCC-PLL2 PD CLK , DATA , STB , LA , BS-PLL1 , BS-PLL2 Tstg RATING 3.6 240 3.6 −55 to +150 UNIT V mW V °C Note: The maximum ratings cannot be exceeded even for an instant. Ple ase make sure the device is operated under conditions not exceeding the parameters shown here. OPERATING RANGES CHARACTERISTIC Operating Voltage Operating Temperature Operating Frequency TEST SYMBOL CIR-CI TEST CONDITION UT Vopr Ta=25°C Topr - fopr - Input Operating Voltage VINopr - Power Supply Voltage at Stand-by 1 ICCQ1 - Low Level Input Voltage VL(SW) - High Level Input Voltage VH(SW) - FIN1 FIN2 FXIN FCLK VIN1 VIN2 VXIN VCC-PLL1 , VCC-PLL2 , BS1="L" , BS2="L" BS State BS-PLL1 , BS-PLL2 , LA, CLK , DATA , STB Active State BS-PLL1 , BS-PLL2 , LA, CLK , DATA , STB RANGE UNIT 2.4 to 3.3 −30 to +85 700 to 1800 40 to 600 5 to 30 1k to 10M 92 to 107 92 to 107 97 to 113 V °C MHz MHz MHz Hz dBµV dBµV dBµV 0 to 10 µA −0.2 to VCC*0.2 V VCC*0.8 to 3.3 V Note 1: The allowable operating ranges stipulate conditions under which the device's basic functions can operate normally, although accompanied by fluctuations in its electrical characteristics. Note 2: The unit "dBµV" denotes the level at load-end. (0 dBm = 107 dBµV @50Ω) This specification is design target. It is subject to change without notice . Nov. 27 2002 PAGE 8 TENTATIVE TB31356AFL ELECTRICAL CHARACTERISTICS (Unless otherwise specified, Ta=25℃, FIN1=1619MHz, FIN2=130MHz, XIN=14.4MHz, VCC-PLL1=3.0V, VCC-PLL2=3.0V) CHARACTERISTIC TEST CIR-CI SYMBOL UT Current Consumption 1 at No Signal Icco1 Current Consumption 2 at No Signal Icco2 Current Consumption 3 at No Signal Icco3 Current Consumption 4 at No Signal Icco4 PLL1 Charge Pump Output Current 1 PLL1 Charge Pump Output Current 2 PLL1 Charge Pump Output Current 3 PLL1 Charge Pump Output Current 4 PLL2 Charge Pump Output Current 5 PLL2 Charge Pump Output Current 6 PLL2 Charge Pump Output Current 7 PLL2 Charge Pump Output Current 8 ICP1 ICP2 ICP3 ICP4 ICP5 ICP6 ICP7 ICP8 Charge Pump Off Leak Current ICP(OFF) LD Output Off Leak Current LD Output On Resistance TEST CONDITION All Operating (PLL1+PLL2+XIN) VCC-PLL1 , VCC-PLL2 BS1="H" , BS2="H" , SB1="1" , SB2="1" PLL1 Operating (PLL1+XIN) VCC-PLL1 , VCC-PLL2 BS1="H" , BS2="L" PLL2 Operating (PLL2+XIN) VCC-PLL1 , VCC-PLL2 BS1="L" , BS2="H" XIN Operating VCC-PLL1 , VCC-PLL2 BS1="H" , BS2="H" , SB1="0",SB2="0",SB="1" Vcp1=1/2VCC CP1="0" , CP3="0" Vcp1=1/2VCC CP1="0" , CP3="1" Vcp1=1/2VCC CP1="1" , CP3="0" Vcp1=1/2VCC CP1="1" , CP3="1" Vcp2=1/2VCC CP2="0" , CP4="0" Vcp2=1/2VCC CP2="0" , CP4="1" Vcp2=1/2VCC CP2="1" , CP4="0" Vcp2=1/2VCC CP2="1" , CP4="1" PLL1 , PLL2 , Vcp=1/2VCC MIN. TYP. MAX. UNIT - 3.7 4.8 mA - 2.7 3.5 mA - 1.1 1.4 mA - 0.10 0.13 mA 2.8 4.0 5.2 mA 1.4 2.0 2.6 mA 0.7 1.0 1.3 mA 0.35 0.5 0.65 mA 2.8 4.0 5.2 mA 1.4 2.0 2.6 mA 0.7 1.0 1.3 mA 0.35 0.5 0.65 mA −0.1 0 0.1 µA ILD VLD=3.3V −1 0 1 µA RLD(ON) VLD=0.4V - 1100 - Ω This specification is design target. It is subject to change without notice . Nov. 27 2002 PAGE 9 TENTATIVE TB31356AFL OUTLINE DRAWING QON16-P-0404-0.65 Unit : mm Note 1 The solder plating part of the four corners of this package isn’t a function pins. Note 2 Please don’t solder to four corners of this package. Note 3 area shows package thorn. This specification is design target. It is subject to change without notice . Nov. 27 2002 PAGE 10