IRLIZ44G, SiHLIZ44G Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • Isolated Package 60 RDS(on) (Ω) VGS = 5 V • High Voltage Isolation = 2.5 kVRMS (t = 60 s; f = 60 Hz) 0.028 Qg (Max.) (nC) 66 • Sink to Lead Creepage Distance = 4.8 mm Qgs (nC) 12 • Logic-Level Gate Drive Qgd (nC) 43 • RDS(on) Specified at VGS = 4 V and 5 V Configuration Single RoHS COMPLIANT • Fast Switching • Ease of Paralleling • Lead (Pb)-free D TO-220 FULLPAK DESCRIPTION Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-220 FULLPAK eliminates the need for additional insulating hardware in commercial-industrial applications. The molding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. This isolation is equivalent to using a 100 micron mica barrier with standard TO-220 product. The FULLPAK is mounted to a heatsink using a single clip or by a single screw fixing. G G D S S N-Channel MOSFET ORDERING INFORMATION Package TO-220 FULLPAK IRLIZ44GPbF SiHLIZ44G-E3 Lead (Pb)-free ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque SYMBOL VDS VGS VGS at 5 V TC = 25 °C TC = 100 °C ID IDM TC = 25 °C for 10 s 6-32 or M3 screw EAS PD dV/dt TJ, Tstg LIMIT 60 ± 10 30 21 120 0.32 400 48 4.5 - 55 to + 175 300d 10 1.1 UNIT V A W/°C mJ W V/ns °C lbf · in N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 25 V, starting TJ = 25 °C, L = 518 µH, RG = 25 Ω, IAS = 30 A (see fig. 12c). c. ISD ≤ 51 A, dI/dt ≤ 250 A/µs, VDD ≤ VDS, TJ ≤ 175 °C. d. 1.6 mm from case. Document Number: 91318 S09-0037-Rev. A, 19-Jan-09 www.vishay.com 1 IRLIZ44G, SiHLIZ44G Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 65 Maximum Junction-to-Case (Drain) RthJC - 3.1 UNIT °C/W SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS VGS = 0 V, ID = 250 µA 60 - - V ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.070 - V/°C VGS(th) VDS = VGS, ID = 250 µA 1.0 - 2.0 V nA Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance IGSS IDSS RDS(on) gfs VGS = ± 10 V - - ± 100 VDS = 60 V, VGS = 0 V - - 25 VDS = 48 V, VGS = 0 V, TJ = 150 °C - - 250 VGS = 5.0 V ID = 18 Ab - - 0.028 VGS = 4.0 V Ab - - 0.039 22 - - - 3300 - - 1200 - - 200 - - 12 - ID = 15 VDS = 25 V, ID = 18 Ab µA Ω S Dynamic Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Drain to Sink Capacitance VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 C Total Gate Charge Qg Gate-Source Charge Qgs f = 1.0 MHz VGS = 5.0 V ID = 51 A, VDS = 48 V, see fig. 6 and 13b - - 66 - - 12 pF nC Gate-Drain Charge Qgd - - 43 Turn-On Delay Time td(on) - 17 - - 230 - - 42 - - 110 - - 4.5 - - 7.5 - - - 30 - - 120 - - 2.5 - 90 180 ns - 0.65 1.3 µC Rise Time Turn-Off Delay Time Fall Time tr td(off) VDD = 30 V, ID = 51 A, RG = 4.6 Ω, RD= 0.56 Ω, see fig. 10b tf Internal Drain Inductance LD Internal Source Inductance LS Between lead, 6 mm (0.25") from package and center of die contact D ns nH G S Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Currenta ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 30 A, VGS = 0 Vb TJ = 25 °C, IF = 51 A, dI/dt = 100 A/µsb V Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. www.vishay.com 2 Document Number: 91318 S09-0037-Rev. A, 19-Jan-09 IRLIZ44G, SiHLIZ44G Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics, TC = 175 °C Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91318 S09-0037-Rev. A, 19-Jan-09 www.vishay.com 3 IRLIZ44G, SiHLIZ44G Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage www.vishay.com 4 Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 8 - Maximum Safe Operating Area Document Number: 91318 S09-0037-Rev. A, 19-Jan-09 IRLIZ44G, SiHLIZ44G Vishay Siliconix RD VDS VGS D.U.T. RG + - VDD 5V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tf tr Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case L Vary tp to obtain required IAS VDS VDS tp VDD D.U.T RG + - I AS V DD VDS 5V tp 0.01 Ω Fig. 12a - Unclamped Inductive Test Circuit Document Number: 91318 S09-0037-Rev. A, 19-Jan-09 IAS Fig. 12b - Unclamped Inductive Waveforms www.vishay.com 5 IRLIZ44G, SiHLIZ44G Vishay Siliconix Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG 5V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform www.vishay.com 6 Fig. 13b - Gate Charge Test Circuit Document Number: 91318 S09-0037-Rev. A, 19-Jan-09 IRLIZ44G, SiHLIZ44G Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - + RG + • dV/dt controlled by RG • ISD controlled by duty factor "D" • D.U.T. - device under test Driver gate drive P.W. Period D= - VDD P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage VDD Body diode forward drop Inductor current Ripple ≤ 5 % ISD * VGS = 5 V for logic level and 3 V drive devices Fig.14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91318. Document Number: 91318 S09-0037-Rev. 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