TECHNICAL NOTE Sound Path Selector LSI Series Voice/Audio Mixer & Selector BU7831KN ●Description BU7831KN is the sound path selector which include 3 stereo inputs, Stereo headphone amp, 600Ω driver amp, and 2stereooutputs. Each output have a mixer and an attenuator, you can set the variable audio path setting. The variable audio source can connect to Headphone and speaker through this LSI. ●Feature 1) 2) 3) 4) 5) 6) 7) 8) It has 3stereo inputs. It has analog mixer on each input. It matches for the application used the Headphone because it has 16Ω audio driver. 16Ω driver has the pop-noise less function. The attenuator of 16Ω driver has soft changing and muting function. It has 600Ω driver for external output. It included stereo output for stereo speaker. VQFN20 small package ●Applications It is for portable equipments with audio player. Apr. 2006 ●Absolute maximum ratings Parameter Symbol Supply voltage VDD Power dissipation Pd Operating temperature range Topr Storage temperature range Tstg *1 Reduce by 5.3 mW/ oC over 25 oC Limits -0.3~4.5 530 *1 -30~+85 -55~+125 Unit V mW o C o C ●Recommended operating range Parameter Supply voltage Symbol VDD MIN 2.5 TYP 3.0 MAX 3.3 Unit V ●Electric Characteristics Unless otherwise specified, •Analog Part Parameter o Ta=25 C、AVDD=DVDD=3.0V Symbol MIN TYP MAX Unit Condition Stand-by current Operation current 1 Istb Idd1 - 0.26 3 0.42 μA mA Operation current 2 Idd2 - 2.3 3.7 mA THDhp1 - 0.05 0.5 % Stand-by mode BIAS part. No signal ST1R, ST1L to HPR, HPL Exclude Idd1, No signal Vo=-10dBV, 20kHzL PF PO1 - 10 - mW VNO - -94 -80 dBV VOMAX1 2.0 - - Vp-p VOMAX2 2.0 - - Vp-p Symbol MIN TYP MAX Unit Condition VIL VIH IIN 2.1 - - 0.7 ±2 V V μA 0V, 3V force Symbol tcyc tdh tds tcs tch MIN 250 50 50 50 50 TYP - MAX - Unit ns ns ns ns ns Total harmonic distortion 1 (HPL, HPR) Output power 1(HPL, HPR) Output Noise Voltage 1 (HPL, HPR) Maximum output level 1 (SPL, SPR) Maximum output level 2 (EXTO) THD=10%, RL=16Ω JIS A weighting THD≦1%, RL=10kΩ THD≦1%, RL=600Ω •Digital input (DC) Parameter Input L level voltage Input H level voltage Input current •CPU interface Parameter Cycle Time Input Data Hold Time Input Data Setup Time Chip Select Setup Time Chip Select Hold Time 2/16 Condition ●Reference Data (Unless otherwise specified, Ta=25 oC、AVDD=DVDD=3.0V) 0.8 0.6 0.4 0.2 CIRCUIT CURRENT : ICC(mA) CIRCUIT CURRENT : ICC(mA) STAND BY CURRENT : Ist(μA) 10 10 1.0 8 6 4 2 2.0 2.5 3.0 3.5 4.0 2.0 4.5 6 4 2 0 0 0.0 8 2.5 3.0 3.5 4.0 2.0 4.5 Fig.2 Operation current At Headphone AMP part Fig.1 Stand-by current 10.00 10.00 0.10 0.01 -100 -80 -60 -40 -20 EXTO : THD+N (%) 10.00 HPR : THD+N (%) 100.00 HPL : THD+N (%) 100.00 1.00 0.10 0.01 0 -100 INPUT LEVEL : VIN (dBV) 4.0 4.5 0.10 0.01 -80 -60 -40 -20 -100 0 -80 -60 -40 -20 0 INPUT LEVEL : VIN (dBV) Fig.5 Total Harmonic Distortion (HPR) Fig.6 Total Harmonic Distortion (EXTO) 100.00 100.00 3.5 1.00 INPUT LEVEL : VIN (dBV) Fig.4 Total harmonic Distortion (HPL) 3.0 Fig.3 Operation current Of All blocks 100.00 1.00 2.5 SUPPLY VOLTAGE : VDD(V) SUPPLY VOLTAGE : VDD(V) SUPPLY VOLTAGE : VDD(V) 20 0 SPR : THD+N (%) SPL : THD+N (%) 1.00 0.10 HPL : LINEARITY (dBV) 10.00 10.00 1.00 0.10 -20 -40 -60 -80 0.01 0.01 -100 -80 -60 -40 -20 -100 0 -60 -40 -20 -100 0 -100 INPUT LEVEL : VIN (dBV) INPUT LEVEL : VIN (dBV) 0 0 0 -60 -80 SPL : LINEARITY (dBV) 20 EXTO : LINEARITY (dBV) 20 -40 -20 -40 -60 -80 -100 -80 -60 -40 -20 INPUT LEVEL : VIN (dBV) Fig.10 Linearity (HPR) 0 -100 -40 -20 0 -20 -40 -60 -80 -100 -100 -60 Fig.9 Linearity (HPL) 20 -20 -80 INPUT LEVEL : VIN (dBV) Fig.8 Total Harmonic Distortion (SPR) Fig.7 Total Harmonic Distortion (SPL) HPR : LINEARITY (dBV) -80 -100 -80 -60 -40 -20 INPUT LEVEL : VIN (dBV) Fig.11 Linearity (EXTO) 3/16 0 -100 -80 -60 -40 -20 INPUT LEVEL : VIN (dBV) Fig.12 Linearity (SPL) 0 20 -70 -70 -75 -75 -80 -80 -85 -85 -40 -60 -80 Noise [dBV] -20 Noise [dBV] -90 -95 -100 -80 -60 -40 -20 -100 -105 -110 2.0 0 2.5 3.0 3.5 4.0 4.5 2.0 SUPLLY VOLTAGE : VDD(V) INPUT LEVEL : VIN (dBV) Fig.13 Linearity (SPR) -70 -70 -75 -75 -75 -80 -80 -80 -85 -85 -85 -95 -90 -95 -100 -100 -105 -105 -110 -110 3.0 3.5 4.0 SUPLLY VOLTAGE : VDD(V) Fig.16 Output Noise (EXTO) 4.5 2.0 4.0 4.5 -95 -105 2.5 3.5 -90 -100 2.0 3.0 Fig.15 Output Noise (HPR) -70 -90 2.5 SUPPLY VOLTAGE : VDD(V) Fig.14 Output Noise (HPL) Noise [dBV] Noise [dBV] -95 -105 -110 -100 -90 -100 Noise [dBV] SPR : LINEARITY (dBV) 0 -110 2.5 3.0 3.5 4.0 4.5 SUPLLY VOLTAGE : VDD(V) Fig.17 Output Noise (SPL) 4/16 2.0 2.5 3.0 3.5 4.0 SUPLLY VOLTAGE : VDD(V) Fig.18 Output Noise (SPR) 4.5 ●Block Diagram, Recommended application circuit, Pin assign 2.5~3.3V + VDD VSS ST1L Other Source ATT1L 0~‐28dB 2dB step ST1R PCM CODEC Stereo Tuner 0~‐28dB 2dBstep ATT1R 0~‐28dB 2dB step ST2L - + ATT4L MIXSEL1 MIXSEL2 - + ATT4R ATT2L 0/‐6dB MIXSEL3 ST2R - + ATT5 0~‐28dB 2dBstep ST3L MIXSEL4 ATT6L 0~‐28dB 2dBstep MIXSEL5 ATT6R ATT3L + - 0/‐6dB ST3R ATT3R 0/‐6dB + - EXTO 16Ω + 100uF Stereo Head Phone HPL 16Ω 100uF + HPR 0~‐28dB 2dBstep Serial BIAS CVCOM External 600Ω 0/‐6dB Stereo Speaker Amp SPR 0~‐28dB 2dBstep ATT2R Stereo Melody SPL NRST SCLK SDATA NCS + 4.7u CSTART CSTEP 1uF 1uF RESET CPU I/F CPU Fig.19 Application circuit example VDD 15 VSS 14 HPR 13 CSTEP 12 CVCOM 11 HPL 16 10 ST3L CSTART 17 9 ST3R BU7831KN EXTO 18 8 ST2L SPR 19 7 ST2R SPL 20 6 ST1L 1 2 3 4 5 SCLK SDATA NCS NRST ST1R Fig.20 Pin Assign 5/16 ●Input terminal equivalent circuit diagram 100kΩ(TYP) PAD PAD A SCLK, SDATA, NCS, NRST PAD B CSTEP PAD C ST2R, ST2L, ST3R, ST3L PAD PAD F CVCOM, CSTART E VSS, VDD D ST1R, ST1L PAD G HPR, HPL, EXTO, SPR, SPL About Digital input (Type A): When you will have possibility to give Hi-z for input pin, You must select from the under heads for protect the pin floated. a) Pull down with less than 10kohm b) Pull up c) Give “L” signal just before Hi-Z. Fig.21 Equivalent circuit diagram No. Name 1 SCLK 2 Function No. Name Serial clock input of CPU I/F 11 CVCOM Reference voltage SDATA Serial data input of CPU I/F 12 CSTEP Connect capacitor for blocking pop-noise 3 NCS Chip select input of CPU I/F 13 HPR Headphone R channel output 4 NRST Reset input L=Reset 14 VSS Ground 5 ST1R Stereo 1 input for R channel 15 VDD Power supply 6 ST1L Stereo 1 input for L channel 16 HPL Headphone L channel output 7 ST2R Stereo 2 input for R channel 17 CSTART 8 ST2L Stereo 2 input for L channel 18 EXTO 9 ST3R Stereo 3 input for R channel 19 SPR Speaker R channel output 10 ST3L Stereo 3 input for L channel 20 SPL Speaker L channel output 6/16 Function Connect capacitor for blocking start up pop-noise 600Ω driver output ●Detail explanation of each function blocks ・Reference Voltage (Bias part) The reference voltage occurrence part that decides the operating point of a group of internal amplifiers is the following. CVCOM_OUT, CSTART_OUT, all is about 1/2VDD[V], and therefore the level of internal signal becomes about 1/2VDD[V], too. CVCOM has a pre-charge function, and it is possible to shorten of rising time of the bias in ON. (As for the CVCOM, ON/OFF of the pre-charge function is possible with a register bit.) CSTART terminal is used as a reference voltage of the output amplifier of the headphone, and it included pop sound low stage function in headphone path ON/ OFF, too. Capacitor value with the outside in the figure is recommended to make the PSRR character of both standard voltages the same. Choose the thing whose character is good in Capacitor with the outside because it becomes the reference voltage of the internal circuit. Pre charge CVCOM 4.7μF 30k CVCOM_OUT 30k To the one except for the headphone amplifier output step Pre charge CSTART 1μF 140k CSTART_OUT 140k To the headphone amplifier output step Fig.22 CVCOM, CSTRT equivalent circuit ・Analog input part The following is about each analog. Input. Please use the coupling capacitor with the outside in consideration of frequency characteristic of input. Input DC level is about 1/2VDD[V]. Input impedance on off (input non-choice) becomes Hi-z. When an input terminal isn’t used (when an input path isn’t set up) is open, and there is no problem. But, be careful that noise from the outside and so on doesn’t turn because it becomes Hi-z. When it is anxious, pull-down in about 100kΩ. ST1L and ST1R inputs change input impedance by setting of ATT1L and ATT1R respectively. ST1L(R) input impedance ATT1 L (R) setting 200kΩ(TYP) 400kΩ(TYP) 0dB setting Mute setting 7/16 200k 200k ST1L ST1R CVC O M _O U T 100k ST2L ST2R ST3L ST3R 100k 100k CVC O M _O U T Fig.23 Input pins equivalent circui ・Analog output part The following is about Analog output part (EXTO, SPL, SPR, HPL, HPR). Each output amplifier is linked path select (MIXER1~5). Because stereo output is presumed, HPL and HPR are turned ON/OFF at the same time, and with pop sound decrease function. MIXER1 At the time of path choice SPL output amplifier ON MIXER2 At the time of path choice SPR output amplifier ON MIXER3 At the time of path choice EXTO output amplifier ON MIXER4 or MIXER5 At the time of path choice HPL, HPR output amplifier ON Be careful that noise from the outside and so on doesn't turn because it becomes Hi-z though the output that isn’t used is open and there is no problem. When it is anxious, pull-down in about 100kΩ. Output Port Output impedance (DC) At ON Output impedance (DC) At OFF EXTO SPL SPR HPL HPR 1.4Ω Hi-z 2.2Ω Hi-z 1.5Ω 0.6Ω GND short 8/16 ・Attenuator Each attenuator has 16 steps (4bit), which contains mute. ATT6L and ATT6R that is attenuator of the headphone output has soft mute that decreases pop sound in switching. (ATT1 - 5 don't have this function.) The amount of software depends on a capacitor to connect to the CSTEP terminal. Decide the value of a capacitor to connect to the CSTEP terminal after you take pop volume and delay time into consideration because a fixed number becomes the bottom mostly at the time of that switching. ATT setting ATT ATT Mute HP output Thsmute Thsmute Thsmute=200×103×CSTEP [S] Fig.24 ・Analog path part About the internal pass circuit, the circuit that it has a path setting by the register turns it on. For example, when MIXSEL*_0 is chosen with either ATT, ST1R input is chosen, and a group of input amplifiers of ST1R turns it on. And a connected output amplifier is turned on when either input is chosen with MIXSEL* in the same way to the output circuit. ・Pop sound decrease circuit at the time of head phone output ON/ OFF It has the function that decreases pop sound that occurs at the time of ON/ OFF of the headphone output (HPL and HPR). When headphone output is chosen/non-chosen, it is the function that the DC output of the headphone output goes down smoothly on falling/rising. Rising time is decided by the capacitor value that it is connected to the CSTART terminal. Falling time is decided by the CSTART terminal and the coupling capacitor. Pop sound decreases as much as to be here if rising/falling is smooth. Decide the value of a capacitor to connect to the CSTART terminal after you take pop sound, rising/falling time into consideration because a fixed number becomes the bottom mostly at the time of that switching. And do settlement of timing in consideration of this time when you make it turn ON/OFF by the continuance. Pop sound is made when it switches in the middle of the descent of rising/falling. Headphone ON/OFF Headphone Output (DC) Thpout Thpout=80.6×103×CSTART[S] Fig.25 9/16 ・Digital part Input such as clock, data is to input "H" or "L" properly about each digital input terminal to contain at the time of standing by as well. If you turn off the power (When Hi-z is input), a control side is to avoid an input terminal's becoming open in either following method It has the possibility that penetration electric current occurs because it becomes the input which isn't fixed as BU7831KN when it isn't avoided. a) Terminal, in less than 10kΩ, pull-down b) Terminal, pull-up c) When it becomes input Hi-z, "L" is given to it. ・CPU interface NCS tch tcyc tcs SCLK tds SDATA A7 tdh A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 Fig.26 th SDATA will be confirmed by 16 clock that is inputted after NCS falling edge, and then serial data reflect to internal register by NCS falling edge. The data format is 16bit rear. CPU I/F is 1Byte=16bit. Because it doesn't cope with continuous data transmission, you must surely insert the section of NCS= "H" between 1st Byte and 2nd Byte. The following the is to secure time beyond the SCLK 1 clock. (th≧tcyc) th NCS SCL SDATA Fig.27 10/16 Using in the BU7831KN dedicated line is recommended with a CPU I/F. Control it by a sequence like the bottom when you don't do special control. NCS CPU SCLK BU7831KN SDATA Other NCS_OTH IC Fig.28 CPU I/F input signals waveforms NCS NCS_OTH SCLK SDATA BU7831KN Control Other IC Control BU7831KN Control Fig.29 Please NCS of BU7831KN is set “H” when you control the other IC. When NCS is "H", the register of BU7831KN can't write it. note ) NCS_OTH is based on the specifications of other IC's. 11/16 ●Recommended operation sequence VDD ON NRST=L start. Rise up VDD first. After the mode setting, input the audio signal. VDD NRST Mode Set CPU I/F Analog Signal Audio Signal Fig. 30 VDD OFF HPRST=0(82h=00h) is taken at the time of use of HPAMP first. VDD OFF, after the mute on setting(88h=FFh), NRST=L at using HPAMP. VDD OFF, after NRST=L at not using HPAMP. HPRST(82h) 01h 00h ATT6L,R(88h) XXh FFh NRST VDD Headphone output Fig. 31 HPAMP ON Mute OFF (HPRST 82h bit0), after the mode setting. CPU I/F Mode Set Headphone output(DC) HPRST (82h bit0) Thpout Thsmute Fig. 32 12/16 ・HPAMP OUTPUT rise time setting up expression Thpout = 80.6 × 103 × CSTART [s] (typ) ・HSMUTE delay time setting up expression Thsmute = 200 × 103 × CSTEP [s] (typ) HPAMP OFF HPRST=0(82h bit0) is set up first. Other setups are canceled after ATT6L, R is set up in the mute(88h=ffh). HPRST (82h bit0) ATT6L,R (88h bit7-0) FFh XXh Path lifting CPU I/F Headphone output Thsmute Fig. 33 HPAMP Volume Control As the mute time is set by capacitor connected CSTEP pin, Volume control it is set after enough time. The delay time is as same as Thsmute. Volume control bit Headphone output Thsmute Thsmute Fig. 34 13/16 Mode Setting Flow Power Supply ON Power Supply OFF Stand-by mode Reference Voltage ON (VCOM=1) RESET (NRST=0 or VCOM=0) INPUT Path setting MIXING Path setting *1 Analog Power OFF (PDN=0) Analog Power ON (PDN=1) HPAMP MUTE ON (Using HPAMP) HPAMP RESET lifting (Using HPAMP) HPAMP RESET setting (Using HPAMP) OUTPUT *1 : When the analog path setting is not changed. (Repeat output) *2 : When the Power supply OFF, after output. Fig. 35 14/16 *2 ●Cautions on use 1) Absolute maximum ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. 2) Operating conditions Characteristics are guaranteed under the conditions of each specified parameter. 3) Reverse polarity connection of the power supply Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply lines. An external direction diode can be added. 4) Power supply line Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line, separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals to ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the circuit, note that capacitance characteristic values are reduced at low temperatures. 5) GND voltage GND potential should maintain at the minimum ground voltage level. Furthermore, no terminals should be lower than the GND potential voltage including electric transients. 6) Short circuit between terminals and GND or other devices Pay attention to the assembly direction of the ICs. Wrong mounting direction or shorts between terminals to GND, or other components on the circuits, can damage the IC. 7) Operation in a strong electromagnetic field Using the ICs in a strong electromagnetic field can cause operation malfunction. 8) Inspection with set PCB During testing, turn on or off the power before mounting or dismounting the board from the test board. Do not power up the board without waiting for the output capacitors to discharge. The capacitors in the low output impedance terminal can stress the device. Pay attention to the electro static voltages during IC handling, transportation, and storage. 9) Input terminals In terms of the construction of IC, parasitic elements are inevitably formed in relation to potential. The operation of the parasitic element can cause interference with circuit operation, thus resulting in a malfunction and breakdown of the input terminal. Therefore, pay thorough attention not to apply a voltage lower than the GND to the input terminals. Furthermore, do not apply a voltage to the input terminals when no power supply voltage is applied to the IC. In addition, even if the power supply voltage is applied, apply a voltage lower than the power supply voltage to the input terminals, or a voltage within the guaranteed value of electrical characteristics. 10) Ground wiring patterns The power supply and ground lines must be as short and thick as possible to reduce line impedance. Fluctuating voltage on the power ground line may damage the device. 11) External capacitor When using external ceramic capacitors, consider degradation in the nominal capacitance value due to DC bias and changes in the capacitance with temperature. 15/16 ●Power Dissipation 700 600 Pd(W) 530mW 500 This value is the measurement value that was mounted on the PCB 400 by ROHM 300 Material : 200 Size: Grass epoxy 70mmX70mmX1.6mm 100 0 0 25 50 75 100 125 150 Ta(℃) Fig.36 ●Ordering type name selection B U ROHM type name 7 8 3 part number 1 K N package type name KN=QFN 16/16 - E 2 taping type name E2 = embossed reel tape Catalog NO.05T294Be '06.4 ROHM C Appendix Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM CO.,LTD. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. 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More detail product informations and catalogs are available, please contact your nearest sales office. ROHM Customer Support System www.rohm.com Copyright © 2009 ROHM CO.,LTD. THE AMERICAS / EUROPE / ASIA / JAPAN Contact us : webmaster @ rohm.co. jp 21 Saiin Mizosaki-cho, Ukyo-ku, Kyoto 615-8585, Japan TEL : +81-75-311-2121 FAX : +81-75-315-0172 Appendix-Rev4.0