Multi Line Sensor Heads for narrow-width scanners LSH3004-AA20A Compatible with A6 size media, feature a dual-arch structure, allowing straight-pass reading (both-directions). In addition, it is compact, measuring only 119.5mm in length. zApplications Check readers, card scanners, and a variety of other image input devices. zFeatures 1) Signal amplifier integrated into each sensor IC in order to eliminate external noise. 2) LED light source mounted on the same substrate as the sensor chip itself, resulting in a more compact, lightweight package. 3) Proprietary prism maintains a uniform output signal. 4) Ceramic substrate used, ensuring excellent dimensional and thermal stability. 6.5 119.5 10.7 104.9(Effective Reading Width) φ2(Depth 1) 5 29.75 15.5 25 MAX.1.5 MAX.2.3 60 12.5 17.5 2.5 5.5 Paper Feed Direction zDimensions (Unit : mm) (12.9) No.9 No.1 Pin No. No.1 No.2 No.3 No.4 No.5 No.6 (NOTE 1) Deflection at the top of glass:0-0.25 Projection to platen is positive. (NOTE 2) Socket Housing:IL-Z-9S-S125C3(JAE) Socket Contact:IL-Z-C3-A-15000(JAE) www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ (3.8) 1/3 Signal CLK SP VDD GND AO RLED Pin No. No.7 No.8 No.9 Signal GLED BLED VLED 2009.11 - Rev.A LSH3004-AA20A Data Sheet zCharacteristics Parameter Symbol Typ. Unit Effective scanning width − 104.9 mm Primary scan dot density − 300 dpi Total dot number − 1296 dots Power supply voltage VDD 3.3 V Scanning speed SLT 0.28×3 Clock frequency CLK 5 MHz ms / line ∗ Maximum dynamic range VRMax. 0.5 V Minimum dynamic range VRMin. 0.25 V Vod 0.8±0.2 V − 5 to 45 °C Dark output Operating temperature ∗ Analogue signals are produced output at double rate of clock frequency. zPin assignments No. Circuit I/O 1 CLK I Clock 2 SP I Start pulse 3 VDD I Power Supply 4 GND I Ground 5 Ao O Analog Output 6 RLED I LED ground Functions 7 GLED I LED ground 8 BLED I LED ground 9 VLED I LED power supply zTiming chart (a) CLK Timing Chart 1/fCLK twCLK 50% twCLK 50% 50% CLK ts SP 50% 50% tSETUP tHOLD Ao 1pixel www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 2/3 2pixel 2009.11 - Rev.A LSH3004-AA20A Data Sheet (b) Data Output Timing Chart After turning on the SP pulse, the analog output shape starts from the setting up point of 83 clock pulse. 1 2 82 83 84 CLK SP Ao VREF Output Period (82pixels) Analog Output Period 1 to 82clock 1 to 1296pixels Note) Output blank part cannot be used as the analog output standard level. zInner circuit VDD 1µF x 6, 0.1µF x 1 680Ω 1296 1 GND 1µFx1 SP VDD 220Ω ANALOG MEMORY CIRCUIT CLK VREF 100kΩ Ao VLED RGND GGND BGND zPeripheral circuit 8 7 6 9 5 3 2 1 4 C2 R2 B G R1 R C1 C3 C4 LED GND VLED AO VDD SP CLK GND ∗ R1=R2=100Ω C1=47µF, C2=100pF C3=100µF, C4=0.1µF ∗ Please adjust the value of resistance to fit your interface circuit. www.rohm.com c 2009 ROHM Co., Ltd. All rights reserved. ○ 3/3 2009.11 - Rev.A Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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