MC10E116, MC100E116 5VECL Quint Differential Line Receiver Description The MC10E/100E116 is a quint differential line receiver with emitter-follower outputs. For applications which require bandwidths greater than that of the E116, the E416 device may be of interest. Active current sources plus a deep collector feature of the MOSAIC III process provide the receivers with excellent common-mode noise rejection. Each receiver has a dedicated VCCO supply lead, providing optimum symmetry and stability. If both inverting and non-inverting inputs are at an equal potential of > −2.5 V, the receiver does not go to a defined state, but rather current-shares in normal differential amplifier fashion, producing output voltage levels midway between HIGH and LOW, or the device may even oscillate. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The 100 Series contains temperature compensation. http://onsemi.com PLCC−28 FN SUFFIX CASE 776 MARKING DIAGRAM* 1 MCxxxE116G Features • • • • • • • • • • • • • 500 ps Max. Propagation Delay VBB Supply Output Dedicated VCCO Pin for Each Receiver PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = −4.2 V to −5.7 V Output Qs will default low when inputs are < VCC −2.5 V Internal Input 50 kW Pulldown Resistors Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test ESD Protection: Human Body Model; > 2 kV, Machine Model; > 200 V Moisture Sensitivity Level: Pb = 1 Pb−Free = 3 For Additional Information, see Application Note AND8003/D Flammability Rating: UL 94 V−0 @ 0.125 in, Oxygen Index: 28 to 34 Transistor Count = 98 devices Pb−Free Packages are Available* AWLYYWW xxx A WL YY WW G = 10 or 100 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. 10 1 Publication Order Number: MC10E116/D MC10E116, MC100E116 D3 D4 D4 25 24 23 VCCO Q4 Q4 VCCO 22 21 20 19 D3 26 18 Q3 D2 27 17 Q3 D2 28 16 VCC 15 Q2 Pinout: 28-Lead PLCC (Top View) VEE 1 VBB 2 14 Q2 D0 3 13 VCCO D0 4 12 Q1 5 6 D1 7 D1 VCCO 8 9 Q0 Q0 10 11 VCCO Q1 * All VCC and VCCO pins are tied together on the die. D0 Q0 D0 Q0 D1 Q1 D1 Q1 D2 Q2 D2 Q2 D3 Q3 D3 Q3 D4 Q4 D4 Q4 VBB Warning: All VCC, VCCO, and VEE pins must be externally connected to Power Supply to guarantee proper operation. Figure 1. Pinout Assignment Figure 2. Logic Diagram Table 1. PIN DESCRIPTION PIN FUNCTION D0, D0 − D4, D4 ECL Differential Input Pairs Q0, Q0 − Q4, Q4 ECL Differential Output Pairs VBB Reference Voltage Output. VCC, VCCO Positive Supply VEE Negative Supply Table 2. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit VCC PECL Mode Power Supply VEE = 0 V 8 V VEE NECL Mode Power Supply VCC = 0 V −6 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V 6 −6 V V Iout Output Current Continuous Surge 50 100 mA mA IBB VBB Sink/Source ± 0.5 mA TA Operating Temperature Range Tstg Storage Temperature Range qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm qJC Thermal Resistance (Junction−to−Case) Standard Board Tsol Wave Solder Pb Pb−Free VI v VCC VI w VEE 0 to +85 °C −65 to +150 °C PLCC−28 PLCC−28 63.5 43.5 °C/W °C/W PLCC−28 22 to 26 °C/W 265 265 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. http://onsemi.com 2 MC10E116, MC100E116 Table 3. 10E SERIES PECL DC CHARACTERISTICS VCCx = 5.0 V, VEE = 0.0 V (Note 1) −40°C Symbol Min Characteristic 0°C Typ Max 29 35 Min 25°C Typ Max 29 35 Min 85°C Typ Max 29 35 Min Typ Max Unit 29 35 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 2) 3980 4070 4160 4020 4105 4190 4090 4185 4280 mV VOL Output LOW Voltage (Note 2) 3050 3210 3370 3050 3210 3370 3050 3227 3405 mV VIH Input HIGH Voltage (Single−Ended) 3830 3995 4160 3870 4030 4190 3940 4110 4280 mV VIL Input LOW Voltage (Single−Ended) 3050 3285 3520 3050 3285 3520 3050 3302 3555 mV VBB Output Voltage Reference 3.57 3.7 3.65 3.75 3.69 3.81 V VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) 2.2 4.4 2.2 4.4 2.2 4.4 V IIH Input HIGH Current 200 mA IIL Input LOW Current 3.57 3.7 200 200 0.5 0.3 200 0.5 0.25 0.3 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.06 V. 2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. Table 4. 10E SERIES NECL DC CHARACTERISTICS VCCx = 0.0 V; VEE = −5.0 V (Note 4) −40°C Symbol Characteristic Min 0°C Typ Max 29 35 Min 25°C Typ Max 29 35 Min 85°C Typ Max 29 35 Min Typ Max Unit 29 35 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 5) −1020 −930 −840 −980 −895 −810 −910 −815 −720 mV VOL Output LOW Voltage (Note 5) −1950 −1790 −1630 −1950 −1790 −1630 −1950 −1773 −1595 mV VIH Input HIGH Voltage (Single−Ended) −1170 −1005 −840 −1130 −970 −810 −1060 −890 −720 mV VIL Input LOW Voltage (Single−Ended) −1950 −1715 −1480 −1950 −1715 −1480 −1950 −1698 −1445 mV VBB Output Voltage Reference −1.13 −1.30 −1.35 −1.25 −1.31 −1.19 V VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 6) −2.8 −0.6 −2.8 −0.6 −2.8 −0.6 V IIH Input HIGH Current 200 mA IIL Input LOW Current −1.43 −1.3 200 200 0.5 0.3 200 0.5 0.065 0.3 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 4. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.06 V. 5. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. 6. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. http://onsemi.com 3 MC10E116, MC100E116 Table 5. 100E SERIES PECL DC CHARACTERISTICS VCCx = 5.0 V, VEE = 0.0 V (Note 7) −40°C Symbol Characteristic Min 0°C Typ Max Min 25°C Typ Max 29 35 Min 85°C Typ Max 29 35 Min Typ Max Unit 29 35 mA IEE Power Supply Current 29 35 IEE Power Supply Current 29 35 29 35 29 35 29 40 mA VOH Output HIGH Voltage (Note 8) 3975 4050 4120 3975 4050 4120 3975 4050 4120 mV VOL Output LOW Voltage (Note 8) 3190 3295 3380 3190 3255 3380 3190 3260 3380 mV VIH Input HIGH Voltage (Single−Ended) 3975 3835 3975 4120 3835 3975 4120 3835 3975 4120 mV VIL Input LOW Voltage (Single−Ended) 3355 3190 3355 3525 3190 3355 3525 3190 3355 3525 mV VBB Output Voltage Reference 3.64 3.75 3.62 3.74 3.62 3.74 V VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 9) 2.2 4.4 2.2 4.4 2.2 4.4 V IIH Input HIGH Current 200 mA IIL Input LOW Current 3.62 3.74 200 200 0.5 0.3 200 0.5 0.25 0.5 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 7. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.8 V. 8. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. 9. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. http://onsemi.com 4 MC10E116, MC100E116 Table 6. 100E SERIES NECL DC CHARACTERISTICS VCCx = 0.0 V; VEE = −5.0 V (Note 10) −40°C Symbol Characteristic IEE Power Supply Current VOH Output HIGH Voltage (Note 11) VOL Output LOW Voltage (Note 11) VIH Input HIGH Voltage (Single−Ended) VIL Input LOW Voltage (Single−Ended) VBB Output Voltage Reference VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 12) IIH Input HIGH Current IIL Input LOW Current Min −1.38 0°C Typ Max 29 35 Typ Max 29 35 −1025 −950 −880 −1810 −1705 −1025 −1165 −1645 −1810 −1.26 Min 25°C Typ Max 29 35 −1025 −950 −880 −1620 −1810 −1745 −1025 −880 −1165 −1645 −1475 −1810 −1.38 −1.25 −2.8 −0.6 200 Min 85°C Typ Max Unit 29 40 mA −1025 −950 −880 mV −1620 −1810 −1740 −1620 mV −1025 −880 −1165 −1025 −880 mV −1645 −1475 −1810 −1645 −1475 mV −1.38 −1.26 −1.38 −1.26 V −2.8 −0.6 −2.8 −0.6 V 200 mA 200 0.5 0.3 Min 200 0.5 0.25 0.5 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 10. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.8 V. 11. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. 12. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. http://onsemi.com 5 MC10E116, MC100E116 Table 7. AC CHARACTERISTICS VCCx= 5.0 V; VEE = 0.0 V or VCCx = 0.0 V; VEE = −5.0 V (Note 13) −40°C Symbol Min Characteristic fMAX Maximum Toggle Frequency tPLH tPHL Propagation Delay to Output D (Differential Configuration) D (Single−Ended) tskew Within-Device Skew (Note 14) tskew Duty Cycle Skew (Note 15) tJITTER Random Clock Jitter (RMS) VPP Input Voltage Swing (Differential Configuration) 150 tr/tf Rise/Fall Time 20−80% 250 Typ 25°C Max Min 800 150 150 tPLH − tPHL 300 300 Typ 85°C Max Min 800 500 550 200 150 Typ Max 800 300 300 450 500 200 150 300 300 Unit MHz 450 500 ps 50 50 50 ps ±10 ±10 ±10 ps <1 <1 <1 ps 150 375 625 275 150 375 575 275 mV 375 575 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 13. 10 Series: VEE can vary −0.46 V / +0.06 V. 100 Series: VEE can vary −0.46 V / +0.8 V. 14. Within-device skew is defined as identical transitions on similar paths through a device. 15. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs. Q Zo = 50 W D Receiver Device Driver Device Q D Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) http://onsemi.com 6 MC10E116, MC100E116 ORDERING INFORMATION Package Shipping † MC10E116FN PLCC−28 37 Units / Rail MC10E116FNG PLCC−28 (Pb−Free) 37 Units / Rail MC10E116FNR2 PLCC−28 500 / Tape & Reel MC10E116FNR2G PLCC−28 (Pb−Free) 500 / Tape & Reel MC100E116FN PLCC−28 37 Units / Rail MC100E116FNG PLCC−28 (Pb−Free) 37 Units / Rail MC100E116FNR2 PLCC−28 500 / Tape & Reel MC100E116FNR2G PLCC−28 (Pb−Free) 500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices http://onsemi.com 7 MC10E116, MC100E116 PACKAGE DIMENSIONS PLCC−28 FN SUFFIX PLASTIC PLCC PACKAGE CASE 776−02 ISSUE E −N− 0.007 (0.180) B Y BRK T L−M M 0.007 (0.180) U M N S T L−M S S N S D Z −M− −L− W 28 D X V 1 A 0.007 (0.180) R 0.007 (0.180) C M M T L−M T L−M S S N S N S 0.007 (0.180) H N S S G J 0.004 (0.100) −T− SEATING T L−M S N T L−M S N S K PLANE F VIEW S G1 M K1 E S T L−M S VIEW D−D Z 0.010 (0.250) 0.010 (0.250) G1 VIEW S S NOTES: 1. DATUMS −L−, −M−, AND −N− DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM −T−, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.485 0.495 0.485 0.495 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 −−− 0.025 −−− 0.450 0.456 0.450 0.456 0.042 0.048 0.042 0.048 0.042 0.056 −−− 0.020 2_ 10_ 0.410 0.430 0.040 −−− http://onsemi.com 8 MILLIMETERS MIN MAX 12.32 12.57 12.32 12.57 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 −−− 0.64 −−− 11.43 11.58 11.43 11.58 1.07 1.21 1.07 1.21 1.07 1.42 −−− 0.50 2_ 10_ 10.42 10.92 1.02 −−− 0.007 (0.180) M T L−M S N S MC10E116, MC100E116 ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 9 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MC10E116/D