SN74LS253 Dual 4-Input Multiplexer with 3-State Outputs The LSTTL / MSI SN74LS253 is a Dual 4-Input Multiplexer with 3-state outputs. It can select two bits of data from four sources using common select inputs. The outputs may be individually switched to a high impedance state with a HIGH on the respective Output Enable (E0) inputs, allowing the outputs to interface directly with bus oriented systems. It is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all ON Semiconductor TTL families. • • • • http://onsemi.com LOW POWER SCHOTTKY Schottky Process for High Speed Multifunction Capability Non-Inverting 3-State Outputs Input Clamp Diodes Limit High Speed Termination Effects GUARANTEED OPERATING RANGES Symbol VCC Parameter Supply Voltage Min Typ Max Unit 4.75 5.0 5.25 V 0 25 70 °C TA Operating Ambient Temperature Range IOH Output Current – High – 2.6 mA IOL Output Current – Low 24 mA 16 1 PLASTIC N SUFFIX CASE 648 16 1 SOIC D SUFFIX CASE 751B ORDERING INFORMATION Semiconductor Components Industries, LLC, 1999 December, 1999 – Rev. 6 1 Device Package Shipping SN74LS253N 16 Pin DIP 2000 Units/Box SN74LS253D 16 Pin 2500/Tape & Reel Publication Order Number: SN74LS253/D SN74LS253 CONNECTION DIAGRAM DIP (TOP VIEW) VCC E0b S0 I3b I2b I1b I0b Zb 16 15 14 13 12 11 10 9 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 1 E0a 2 S1 3 I3a 4 I2a 5 I1a 6 I0a 7 Za 8 GND LOADING (Note a) HIGH LOW Common Select Inputs 0.5 U.L. 0.25 U.L. Output Enable (Active LOW) Input Multiplexer Inputs Multiplexer Output 0.5 U.L. 0.5 U.L. 65 U.L. 0.25 U.L. 0.25 U.L. 15 U.L. Output Enable (Active LOW) Input Multiplexer Inputs Multiplexer Output 0.5 U.L. 0.5 U.L. 65 U.L. 0.25 U.L. 0.25 U.L. 15 U.L. PIN NAMES S0, S1 Multiplexer A E0a I0a – I3a Za Multiplexer B E0b I0b – I3b Zb NOTES: a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW. LOGIC SYMBOL 1 14 2 6 5 4 3 10 11 12 13 15 E I I I I I I I I E S0 0a 0a 1a 2a 3a 0b 1b 2b 3b 0b S1 Za Zb 7 9 VCC = PIN 16 GND = PIN 8 http://onsemi.com 2 SN74LS253 LOGIC DIAGRAM E0b I3b 15 I2b 13 I1b 12 I0b 11 Zb S0 10 S1 14 I3a 2 I2a 3 VCC = PIN 16 GND = PIN 8 = PIN NUMBERS 9 I1a 4 I0a 5 Za E0a 6 1 7 FUNCTIONAL DESCRIPTION If the outputs of 3-state devices are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure that Output Enable signals to 3-state devices whose outputs are tied together are designed so that there is no overlap. The LS253 contains two identical 4-Input Multiplexers with 3-state outputs. They select two bits from four sources selected by common select inputs (S0, S1). The 4-input multiplexers have individual Output Enable (E0a, E0b) inputs which when HIGH, forces the outputs to a high impedance (high Z) state. The LS253 is the logic implementation of a 2-pole, 4-position switch, where the position of the switch is determined by the logic levels supplied to the two select inputs. The logic equations for the outputs are shown below: Za = E0a ⋅(I0a ⋅S1 ⋅S0 + I1a ⋅S1 ⋅S0 ⋅I2a ⋅S1 ⋅S0 + I3a ⋅ S1 ⋅S0) Zb = E0b⋅ (I0b S1 S0 + I1b⋅ S1⋅ S0 I2b⋅ S1⋅ S0 + I3b⋅ S1⋅ S0) TRUTH TABLE SELECT INPUTS DATA INPUTS OUTPUT ENABLE OUTPUT S0 S1 I0 I1 I2 I3 E0 Z X L L H H L L H H X L L L L H H H H X L H X X X X X X X X X L H X X X X X X X X X L H X X X X X X X X X L H H L L L L L L L L (Z) L H L H L H L H H = HIGH Level L = LOW Level X = Irrelevant (Z) = High Impedance (off) Address inputs S0 and S1 are common to both sections. http://onsemi.com 3 SN74LS253 DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol Parameter VIH Input HIGH Voltage VIL Input LOW Voltage VIK Input Clamp Diode Voltage VOH Output HIGH Voltage VOL O Output LOW Voltage Min Typ Max 2.0 0.8 – 0.65 2.4 – 1.5 3.1 Unit Test Conditions V Guaranteed Input HIGH Voltage for All Inputs V Guaranteed Input LOW Voltage for All Inputs V VCC = MIN, IIN = – 18 mA V VCC = MIN, IOH = MAX, VIN = VIH or VIL per Truth Table 0.25 0.4 V IOL = 12 mA 0.35 0.5 V IOL = 24 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table IOZH Output Off Current HIGH 20 µA VCC = MAX, VOUT = 2.7 V IOZL Output Off Current LOW – 20 µA VCC = MAX, VOUT = 0.4 V 20 IIH Input HIGH Current µA VCC = MAX, VIN = 2.7 V IIL Input LOW Current IOS Short Circuit Current (Note 1) ICC Power Supply Current – 30 0.1 mA VCC = MAX, VIN = 7.0 V – 0.4 mA VCC = MAX, VIN = 0.4 V – 130 mA VCC = MAX 12 mA VCC = MAX, VE = 0 V 14 mA VCC = MAX, VE = 4.5 V Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V) See SN74LS251 for Waveforms Limits Symbol Parameter Min Typ Max Unit Test Conditions tPLH tPHL Propagation Delay, Data to Output 17 13 25 20 ns Figure 1 tPLH tPHL Propagation Delay, Select to Output 30 21 45 32 ns Figure 1 tPZH tPZL Output Enable Time 15 15 28 23 ns Figures 4, 5 tPHZ tPLZ Output Disable Time 27 18 41 27 ns Figures 3, 5 http://onsemi.com 4 CL = 45 pF, RL = 667 Ω CL = 5.0 pF, RL = 667 Ω SN74LS253 PACKAGE DIMENSIONS N SUFFIX PLASTIC PACKAGE CASE 648–08 ISSUE R NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. –A– 16 9 1 8 B F C L S –T– SEATING PLANE K H G D M J 16 PL 0.25 (0.010) M T A M http://onsemi.com 5 DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 SN74LS253 PACKAGE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751B–05 ISSUE J –A– 16 9 1 8 –B– P NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 8 PL 0.25 (0.010) M B S G R K F X 45 _ C –T– SEATING PLANE J M D 16 PL 0.25 (0.010) M T B S A S http://onsemi.com 6 DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 SN74LS253 Notes http://onsemi.com 7 SN74LS253 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION North America Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: [email protected] ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support Phone: 303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong 800–4422–3781 Email: ONlit–[email protected] N. American Technical Support: 800–282–9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor – European Support German Phone: (+1) 303–308–7140 (M–F 2:30pm to 5:00pm Munich Time) Email: ONlit–[email protected] French Phone: (+1) 303–308–7141 (M–F 2:30pm to 5:00pm Toulouse Time) Email: ONlit–[email protected] English Phone: (+1) 303–308–7142 (M–F 1:30pm to 5:00pm UK Time) Email: [email protected] JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–8549 Phone: 81–3–5487–8345 Email: [email protected] Fax Response Line: 303–675–2167 800–344–3810 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 SN74LS253/D