ONSEMI 74LS139

SN74LS139
Dual 1-of-4 Decoder/
Demultiplexer
The LSTTL/MSI SN74LS139 is a high speed Dual 1-of-4
Decoder/Demultiplexer. The device has two independent decoders,
each accepting two inputs and providing four mutually exclusive
active LOW Outputs. Each decoder has an active LOW Enable input
which can be used as a data input for a 4-output demultiplexer. Each
half of the LS139 can be used as a function generator providing all
four minterms of two variables. The LS139 is fabricated with the
Schottky barrier diode process for high speed and is completely
compatible with all ON Semiconductor TTL families.
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LOW
POWER
SCHOTTKY
Schottky Process for High Speed
Multifunction Capability
Two Completely Independent 1-of-4 Decoders
Active Low Mutually Exclusive Outputs
Input Clamp Diodes Limit High Speed Termination Effects
ESD > 3500 Volts
16
1
GUARANTEED OPERATING RANGES
Symbol
VCC
Parameter
Supply Voltage
Min
Typ
Max
4.75
5.0
5.25
V
0
25
70
°C
PLASTIC
N SUFFIX
CASE 648
Unit
TA
Operating Ambient
Temperature Range
IOH
Output Current – High
– 0.4
mA
IOL
Output Current – Low
8.0
mA
16
1
SOIC
D SUFFIX
CASE 751B
ORDERING INFORMATION
 Semiconductor Components Industries, LLC, 1999
December, 1999 – Rev. 6
1
Device
Package
Shipping
SN74LS139N
16 Pin DIP
2000 Units/Box
SN74LS139D
16 Pin
2500/Tape & Reel
Publication Order Number:
SN74LS139/D
SN74LS139
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC
Eb
A0b
A1b
O0b
O1b
O2b
O3b
16
15
14
13
12
11
10
9
NOTE:
The Flatpak version has the same
pinouts (Connection Diagram) as
the Dual In-Line Package.
1
2
3
4
5
6
7
8
Ea
A0a
A1a
O0a
O1a
O2a
O3a
GND
LOADING (Note a)
PIN NAMES
A0, A1
E
O0 – O3
Address Inputs
Enable (Active LOW) Input
Active LOW Outputs
HIGH
LOW
0.5 U.L.
0.5 U.L.
10 U.L.
0.25 U.L.
0.25 U.L.
5 U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40 mA HIGH/1.6 mA LOW.
LOGIC SYMBOL
1
E
2 3
15
14 13
A0 A1
E
A0 A1
DECODER a
DECODER b
O0 O1 O2 O3
O0 O1 O2 O3
4 5 6 7
12 11 10 9
VCC = PIN 16
GND = PIN 8
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2
SN74LS139
LOGIC DIAGRAM
Ea
A0a A1a
1
2
Eb
3
A0b A1b
15
14
13
VCC = PIN 16
GND = PIN 8
= PIN NUMBERS
4
O0a
5
O1a
6
7
O2a
O3a
12
11
O0b
O1b
10
O2b
9
O3b
FUNCTIONAL DESCRIPTION
The LS139 is a high speed dual 1-of-4 decoder/
demultiplexer fabricated with the Schottky barrier diode
process. The device has two independent decoders, each of
which accept two binary weighted inputs (A0, A1) and
provide four mutually exclusive active LOW outputs
(O0 – O3). Each decoder has an active LOW Enable (E).
When E is HIGH all outputs are forced HIGH. The enable
can be used as the data input for a 4-output demultiplexer
application.
Each half of the LS139 generates all four minterms of two
variables. These four minterms are useful in some
applications, replacing multiple gate functions as shown in
Fig. a, and thereby reducing the number of packages
required in a logic network.
TRUTH TABLE
INPUTS
OUTPUTS
E
A0
A1
O0
O1
O2
O3
H
L
L
L
L
X
L
H
L
H
X
L
L
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
E
A0
A1
O0
E
A0
A1
O0
E
A0
A1
O1
E
A0
A1
O1
E
A0
A1
O2
E
A0
A1
O2
E
A0
A1
O3
E
A0
A1
O3
Figure a
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3
SN74LS139
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Parameter
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VIK
Input Clamp Diode Voltage
VOH
Output HIGH Voltage
VOL
O
Output LOW Voltage
Min
Typ
Max
Unit
2.0
0.8
– 0.65
2.7
IIH
Input HIGH Current
IIL
Input LOW Current
IOS
Short Circuit Current (Note 1)
ICC
Power Supply Current
– 1.5
3.5
Test Conditions
V
Guaranteed Input HIGH Voltage for
All Inputs
V
Guaranteed Input LOW Voltage for
All Inputs
V
VCC = MIN, IIN = – 18 mA
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
0.25
0.4
V
IOL = 4.0 mA
0.35
0.5
V
IOL = 8.0 mA
– 20
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
20
µA
VCC = MAX, VIN = 2.7 V
0.1
mA
VCC = MAX, VIN = 7.0 V
– 0.4
mA
VCC = MAX, VIN = 0.4 V
–100
mA
VCC = MAX
11
mA
VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS (TA = 25°C)
Symbol
Levels of
Delay
Parameter
Limits
Min
Typ
Max
Unit
tPLH
tPHL
Propagation Delay
Address to Output
2
2
13
22
20
33
ns
tPLH
tPHL
Propagation Delay
Address to Output
3
3
18
25
29
38
ns
tPLH
tPHL
Propagation Delay
Enable to Output
2
2
16
21
24
32
ns
Test Conditions
VCC = 5.0 V
CL = 15 pF
AC WAVEFORMS
VIN
VOUT
1.3 V
VIN
1.3 V
tPHL
tPLH
1.3 V
1.3 V
1.3 V
tPHL
VOUT
Figure 1.
1.3 V
tPLH
1.3 V
Figure 2.
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4
1.3 V
SN74LS139
PACKAGE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
–A–
16
9
1
8
B
F
C
L
S
–T–
SEATING
PLANE
K
H
G
D
M
J
16 PL
0.25 (0.010)
M
T A
M
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DIM
A
B
C
D
F
G
H
J
K
L
M
S
INCHES
MIN
MAX
0.740
0.770
0.250
0.270
0.145
0.175
0.015
0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008
0.015
0.110
0.130
0.295
0.305
0_
10 _
0.020
0.040
MILLIMETERS
MIN
MAX
18.80
19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01
SN74LS139
PACKAGE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
–A–
16
9
1
8
–B–
P
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
8 PL
0.25 (0.010)
M
B
S
G
R
K
F
X 45 _
C
–T–
SEATING
PLANE
J
M
D
16 PL
0.25 (0.010)
M
T B
S
A
S
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6
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
SN74LS139
Notes
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SN74LS139
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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SN74LS139/D