ONSEMI MC33261P

MC34261, MC33261
Power Factor Controllers
The MC34261/MC33261 are active power factor controllers
specifically designed for use as a preconverter in electronic ballast and
in off−line power converter applications. These integrated circuits
feature an internal startup timer, a one quadrant multiplier for near
unity power factor, zero current detector to ensure critical conduction
operation, high gain error amplifier, trimmed internal bandgap
reference, current sensing comparator, and a totem pole output ideally
suited for driving a power MOSFET.
Also included are protective features consisting of input
undervoltage lockout with hysteresis, cycle−by−cycle current limiting,
and a latch for single pulse metering. These devices are available in
dual−in−line and surface mount plastic packages.
• Internal Startup Timer
• One Quadrant Multiplier
• Zero Current Detector
• Trimmed 2% Internal Bandgap Reference
• Totem Pole Output
• Undervoltage Lockout with Hysteresis
• Low Startup and Operating Current
• Pinout Equivalent to the SG3561
• Functional Equivalent to the TDA4817
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POWER FACTOR
CONTROLLERS
SEMICONDUCTOR
TECHNICAL DATA
P SUFFIX
PLASTIC PACKAGE
CASE 626
8
1
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO−8)
8
1
Simplified Block Diagram
Zero Current Detector
5
2.5V
Reference
Undervoltage
Lockout
Zero Current
Detect Input
VCC
8
PIN CONNECTIONS
Voltage Feedback
Input
Compensation
Multiplier Input
Current Sense
Input
4
Current Sense
Input
Error Amp
July, 2006 − Rev. 3
MC34261D
Vref
Voltage
Feedback
1 Input
Multiplier
© Semiconductor Components Industries, LLC, 2006
7 Drive Output
6 Gnd
5 Zero Current
Detect Input
3
4
ORDERING INFORMATION
Device
6
2
7
Multiplier,
Latch,
PWM,
Timer,
&
Logic
Gnd
8 VCC
(Top View)
Drive Output
Multiplier
Input 3
1
Compensation
2
1
MC34261P
MC33261D
MC33261P
Operating
Temperature Range
TA = 0° to +70°C
TA = − 40° to +85°C
Package
SO−8
Plastic DIP
SO−8
Plastic DIP
Publication Order Number:
MC34261/D
MC34261, MC33261
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
(ICC + IZ)
30
mA
Output Current, Source or Sink (Note 1)
IO
500
mA
Current Sense, Multiplier, and Voltage Feedback Inputs
Vin
−1.0 to 10
V
Zero Current Detect Input
High State Forward Current
Low State Reverse Current
Iin
Total Power Supply and Zener Current
Power Dissipation and Thermal Characteristics
P Suffix, Plastic Package Case 626
Maximum Power Dissipation @ TA = 70°C
Thermal Resistance, Junction−to−Air
D Suffix, Plastic Package Case 626
Maximum Power Dissipation @ TA = 70°C
Thermal Resistance, Junction−to−Air
mA
50
−10
PD
RθJA
800
100
mW
°C/W
PD
RθJA
450
178
mW
°C/W
Operating Junction Temperature
TJ
+150
°C
Operating Ambient Temperature (Note 3)
MC34261
MC33261
TA
Storage Temperature
Tstg
°C
0 to +70
−40 to +85
−55 to +150
°C
ELECTRICAL CHARACTERISTICS (VCC = 12 V, for typical values TA = 25°C, for min/max values TA is the operating ambient
temperature range that applies [Note 3], unless otherwise noted.)
Characteristic
Symbol
Min
Typ
Max
Unit
2.465
2.44
2.5
2.535
2.54
−
1.0
10
mV
μA
ERROR AMPLIFIER
VFB
Voltage Feedback Input Threshold
TA = 25°C
TA = Tlow to Thigh (VCC = 12 V to 28 V)
Line Regulation (VCC = 12 V to 28 V, TA = 25°C)
Regline
Input Bias Current (VFB = 0 V)
V
IIB
−
−0.3
−1.0
Open Loop Voltage Gain
AVOL
65
85
−
dB
Gain Bandwidth Product (TA = 25°C)
GBW
0.7
1.0
−
MHz
Output Source Current (VO = 4.0 V, VFB = 2.3 V)
ISource
0.25
0.5
0.75
mA
VOH
VOL
5.0
−
5.7
2.1
−
2.44
Dynamic Input Voltage Range
Multiplier Input (Pin 3)
Compensation (Pin 2)
VPin 3
VPin 2
0 to 2.5
VFB to
(VFB + 1.0)
0 to 3.5
VFB to
(VFB + 1.5)
−
−
Input Bias Current (VFB = 0 V)
IIB
−
−0.3
−1.0
μA
Multiplier Gain (VPin 3 = 0.5 V, VPin 2 = VFB + 1.0 V) (Note 2)
K
0.4
0.62
0.8
1/V
Output Voltage Swing
High State (ISource = 0.2 mA, VFB = 2.3 V)
Low State (ISink = 0.4 mA, VFB = 2.7 V)
V
MULTIPLIER
V
ZERO CURRENT DETECTOR
Input Threshold Voltage (Vin Increasing)
Vth
1.3
1.6
1.8
V
Hysteresis (Vin Decreasing)
VH
40
110
200
mV
Input Clamp Voltage
High State (IDET = 3.0 mA)
Low State (IDET = −3.0 mA)
VIH
VIL
6.1
0.3
6.7
0.7
−
1.0
NOTES: 1. Maximum package power dissipation limits must be observed.
Pin 4 Threshold Voltage
2. K =
VPin 3(VPin 2 − VFB)
3. Tlow = −40°C for MC34261
3. Tlow = −40°C for MC33261
Thigh = +70°C for MC34261
Thigh = +85°C for MC33261
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2
V
MC34261, MC33261
ELECTRICAL CHARACTERISTICS (VCC = 12 V, for typical values TA = 25°C, for min/max values TA is the operating ambient
temperature range that applies [Note 3], unless otherwise noted.)
Symbol
Min
Typ
Max
Input Bias Current (VPin 4 = 0 V)
IIB
−
−0.5
−2.0
μA
Input Offset Voltage (VPin 2 = 1.1 V, VPin 3 = 0 V)
VIO
−
3.5
15
mV
tPHL (in/out)
−
200
400
ns
VOL
−
1.8
9.8
7.8
0.3
2.4
10.3
8.3
0.8
3.3
−
8.8
14
16
18
Characteristic
Unit
CURRENT SENSE COMPARATOR
Delay to Output
DRIVE OUTPUT
Output Voltage (VCC = 12 V)
Low State (ISink = 20 mA)
Low State (ISink = 200 mA)
High State (ISource = 20 mA)
High State (ISource = 200 mA)
VOH
Output Voltage (VCC = 30 V)
High State (ISource = 20 mA, CL = 15 pF)
VO(max)
V
V
Output Voltage Rise Time (CL = 1.0 nF)
tr
−
50
120
ns
Output Voltage Fall Time (CL = 1.0 nF)
tf
−
50
120
ns
VOH(UVLO)
−
0.2
0.8
V
tDLY
150
400
−
μs
Vth
9.2
10.0
10.8
V
VShutdown
7.0
8.0
9.0
V
VH
1.75
2.0
2.5
V
−
−
−
0.3
7.1
9.0
0.5
12
20
30
36
−
Output Voltage with UVLO Activated (VCC = 7.0 V, ISink = 1.0 mA)
RESTART TIMER
Restart Time Delay
UNDERVOLTAGE LOCKOUT
Startup Threshold (VCC Increasing)
Minimum Operating Voltage After Turn−On (VCC Decreasing)
Hysteresis
TOTAL DEVICE
Power Supply Current
Startup (VCC = 7.0 V)
Operating
Dynamic Operating (50 kHz, CL = 1.0 nF)
ICC
Power Supply Zener Voltage
VZ
mA
V
NOTES: 1. Maximum package power dissipation limits must be observed.
Pin 4 Threshold Voltage
2. K =
VPin 3(VPin 2 − VFB)
Thigh = +70°C for MC34261
Thigh = +85°C for MC33261
Figure 1. Current Sense Input Threshold
versus Multiplier Input
V CS , CURRENT SENSE THRESHOLD VOLTAGE (V)
V CS , CURRENT SENSE THRESHOLD VOLTAGE (V)
3. Tlow = −40°C for MC34261
3. Tlow = −40°C for MC33261
3.0
2.5
2.0
1.5
1.0
0.5
0
See Figure 2
−0.5
−0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Figure 2. Current Sense Input Threshold
versus Multiplier Input
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
−0.02
−0.12
−0.08
−0.04
0
0.04
VM, MULTIPLIER INPUT VOLTAGE (V)
VM, MULTIPLIER INPUT VOLTAGE (V)
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3
0.08
0.12
Figure 3. Voltage Feedback Input Threshold
Change versus Temperature
Figure 4. Error Amp Open Loop Gain and
Phase versus Frequency
100
A VOL, OPEN LOOP VOLTAGE GAIN (dB)
+4.0
VCC = 12 V
Pins 1 to 2
0
−4.0
−8.0
−12
−16
−55
−25
0
25
50
75
100
125
0
80
VCC = 12 V
VO = 3.0 V to 3.5 V
RL = 100 k
TA = 25°C
Gain
60
60
40
90
Phase
20
−20
10
100
1.0 k
100 k
180
10 M
1.0 M
Figure 6. Error Amp Large Signal
Transient Response
VCC = 12 V
AV = −1.0
TA = 25°C
VCC = 12 V
AV = −1.0
TA = 25°C
200 mV/DIV
3.0 V
20 mV/DIV
2.5 V
2.5 V
2.0 V
2.45 V
1.0 μs/DIV
0.5 μs/DIV
Figure 7. Error Amp Output Saturation
versus Sink Current
Figure 8. Restart Time Delay versus Temperature
5.0
525
VCC = 12 V
VFB = 2.7 V
TA = 25°C
4.0
t DLY , RESTART TIME DELAY ( μs)
Vsat , OUTPUT SATURATION VOLTAGE (V)
10 k
f, FREQUENCY (Hz)
Figure 5. Error Amp Small Signal
Transient Response
3.0
2.0
1.0
0
120
150
0
TA, AMBIENT TEMPERATURE (°C)
2.55 V
30
φ, EXCESS PHASE ( ° C)
Δ VFB , VOLTAGE FEEDBACK THRESHOLD CHANGE (mV)
MC34261, MC33261
0
0.5
1.0
1.5
ISink, OUTPUT SINK CURRENT (mA)
475
425
375
325
275
−55
2.0
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4
VCC = 12 V
−25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
125
MC34261, MC33261
Figure 10. Output Saturation Voltage
versus Load Current
40
0
Vsat , OUTPUT SATURATION VOLTAGE (V)
VCC
−2.0
20
VCC = 12 V
−6.0
Lower Threshold
(Vin Decreasing)
−25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
Sink Saturation
(Load to VCC)
2.0
Gnd
0
125
0
VO , OUTPUT VOLTAGE
Figure 11. Drive Output Waveform
VCC = 12 V
CL = 1.0 nF
TA = 25°C
10
%
100 ns/DIV
16
Figure 12. Drive Output Cross Conduction
VCC = 12 V
CL = 15 pF
TA = 25°C
100 ns/DIV
12
VCC , SUPPLY VOLTAGE (V)
11
12
8.0
VFB = 0 V
Current Sense = 0 V
Multiplier = 0 V
CL = 1.0 nF
f = 50 kHz
TA = 25°C
4.0
0
320
Figure 14. Undervoltage Lockout Thresholds
versus Temperature
Figure 13. Supply Current versus Supply Voltage
I CC , SUPPLY CURRENT (mA)
80
160
240
IO, OUTPUT LOAD CURRENT (mA)
I CC , SUPPLY CURRENT
90
%
4.0
5.0 V/DIV
−20
−40
−55
Source Saturation
(Load to Ground)
−4.0
Upper Threshold
(Vin Increasing)
0
VCC = 12 V
80 μs Pulsed Load
120 Hz Rate
100 mA/DIV
Δ V th , THRESHOLD VOLTAGE CHANGE (mV)
Figure 9. Zero Current Detector Input Threshold
Voltage Change versus Temperature
0
10
20
30
Startup Threshold
(VCC Increasing)
10
9.0
8.0
Minimum Operating Threshold
(VCC Decreasing)
7.0
40
6.0
−55
VCC, SUPPLY VOLTAGE (V)
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5
−25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
125
MC34261, MC33261
FUNCTIONAL DESCRIPTION
Introduction
Most electronic ballasts and switching power supplies use
a bridge rectifier and a filter capacitor to derive raw dc
voltage from the utility ac line. This simple rectifying circuit
draws power from the line when the instantaneous ac voltage
exceeds the capacitor’s voltage. This occurs near the line
voltage peak and results in a high charge current spike. Since
power is only taken near the line voltage peaks, the resulting
spikes of current are extremely nonsinusoidal with a high
content of harmonics. This results in a poor power factor
condition where the apparent input power is much higher
than the real power.
The MC34261, MC33261 are high performance, critical
conduction, current mode power factor controllers
specifically designed for use in off−line active
preconverters. These devices provide the necessary features
required to significantly enhance poor power factor loads by
keeping the ac line current sinusoidal and in phase with the
line voltage. With proper control of the preconverter, almost
any complex load can be made to appear resistive to the ac
line, thus significantly reducing the harmonic current
content.
Multiplier
A single quadrant, two input multiplier is the critical
element that enables this device to control power factor. The
ac haversines are monitored at Pin 3 with respect to ground
while the Error Amp output at Pin 2 is monitored with
respect to the Voltage Feedback Input threshold. A graph of
the Multiplier transfer curve is shown in Figure 1. Note that
both inputs are extremely linear over a wide dynamic range,
0 V to 3.2 V for the Multiplier input (Pin 3), and 2.5 V to 4.0
V for the Error Amp output (Pin 2). The Multiplier output
controls the Current Sense Comparator threshold (Pin 4) as
the ac voltage traverses sinusoidally from zero to peak line.
This has the effect of forcing the MOSFET peak current to
track the input line voltage, thus making the preconverter
load appear to be resistive.
Pin 4 Threshold ≈ 0.62(VPin 2 − VFB)VPin 3
Zero Current Detector
The MC34261 operates as a critical conduction current
mode controller, whereby output switch conduction is
initiated by the Zero Current Detector and terminated when
the peak inductor current reaches the threshold level
established by the Multiplier output. The Zero Current
Detector initiates the next on−time by setting the RS Latch
at the instant the inductor current reaches zero. This critical
conduction mode of operation has two significant benefits.
First, since the MOSFET cannot turn on until the inductor
current reaches zero, the output rectifier’s reverse recovery
time becomes less critical allowing the use of an inexpensive
rectifier. Second, since there are no deadtime gaps between
cycles, the ac line current is continuous thus limiting the
peak switch to twice the average input current.
The Zero Current Detector indirectly senses the inductor
current by monitoring when the auxiliary winding voltage
falls below 1.6 V. To prevent false tripping, 110 mV of
hysteresis is provided. The Zero Current Detector input is
internally protected by two clamps. The upper 6.7 V clamp
prevents input overvoltage breakdown while the lower 0.7
V clamp prevents substrate injection. Device destruction
can result if this input is shorted to ground. An external
resistor must be used in series with the auxiliary winding to
limit the current through the clamps.
Operating Description
The MC34261, MC33261 contains many of the building
blocks and protection features that are employed in modern
high performance current mode power supply controllers.
There are, however, two areas where there is a major
difference when compared to popular devices such as the
UC3842 series. Referring to the block diagram in Figure 15,
note that a multiplier has been added to the current sense
loop and that this device does not contain an oscillator. A
description of each of the functional blocks is given below.
Error Amplifier
A fully compensated Error Amplifier with access to the
inverting input and output is provided. It features a typical
dc voltage gain of 85 dB, and a unity gain bandwidth of 1.0
MHz with 58° of phase margin (Figure 4). The noninverting
input is internally biased at 2.5 V ±2.0% and is not pinned
out. The output voltage of the power factor converter is
typically divided down and monitored by the inverting
input. The maximum input bias current is −1.0 μA which can
cause an output voltage error that is equal to the product of
the input bias current and the value of the upper divider
resistor R2. The Error Amp Output is internally connected
to the Multiplier and is pinned out (Pin 2) for external loop
compensation. Typically, the bandwidth is set below 20 Hz,
so that the Error Amp output voltage is relatively constant
over a given ac line cycle. The output stage consists of a 500
μA current source pull−up with a Darlington transistor
pull−down. It is capable of swinging from 2.1 V to 5.7 V,
assuring that the Multiplier can be driven over its entire
dynamic range.
Current Sense Comparator and RS Latch
The Current Sense Comparator RS Latch configuration
ensures that only a single pulse appears at the Drive Output
during a given cycle. The inductor current is converted to a
voltage by inserting a ground referenced sense resistor R9 in
series with the source of output switch Q1. This voltage is
monitored by the Current Sense Input and compared to the
Multiplier output voltage. The peak inductor current is
controlled by the threshold voltage of Pin 4 where:
Ipk =
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Pin 4 Threshold
R9
MC34261, MC33261
With the component values shown in Figure 16, the
Current Sense Comparator threshold, at the peak of the
haversine varies from 1.1 V at 90 Vac to 100 mV at 268 Vac.
The Current Sense Input to Drive Output propagation delay
is typically 200 ns.
wide input range off line preconverter applications. An
internal 36 V clamp has been added from VCC to ground to
protect the IC and capacitor C5 from an overvoltage
condition. This feature is desirable if external circuitry is
used to delay the startup of the preconverter.
Timer
Output
A watchdog timer function was added to the IC to
eliminate the need for an external oscillator when used in
stand alone applications. The Timer provides a means to
automatically start or restart the preconverter if the Drive
Output has been off for more than 400 μs after the inductor
current reaches zero.
The MC34261/MC33261 contain a single totem pole
output stage specifically designed for direct drive of power
MOSFETs. The Drive Output is capable of up to ±500 mA
peak current with a typical rise and fall time of 50 ns with a
1.0 nF load. Additional internal circuitry has been added to
keep the Drive Output in a sinking mode whenever the
Undervoltage Lockout is active. This characteristic
eliminates the need for an external gate pull−down resistor.
The totem pole output has been optimized to minimize cross
conduction current during high speed operation. The
addition of two 10 Ω resistors, one in series with the source
output transistor and one in series with the sink output
transistor, reduces the cross conduction current, as shown in
Figure 12. A 16 V clamp has been incorporated into the
output stage to limit the high state VOH. This prevents
rupture of the MOSFET gate when VCC exceeds 20 V.
Undervoltage Lockout
An Undervoltage Lockout comparator guarantees that the
IC is fully functional before enabling the output stage. The
positive power supply terminal (VCC) is monitored by the
UVLO comparator with the upper threshold set at 10 V and
the lower threshold at 8.0 V (Figure 14). In the standby
mode, with VCC at 7.0 V, the required supply current is less
than 0.5 mA (Figure 13). This hysteresis and low startup
current allow the implementation of efficient bootstrap
startup techniques, making these devices ideally suited for
Table 1. Design Equations
Calculation
Notes
Calculate the maximum required output power.
Required Converter Output Power
Calculated at the minimum required ac line for regulation. Let the efficiency n = 0.95.
Peak Inductor Current
Formula
PO = VO IO
Let the switching cycle t = 20 μs.
Inductance
In theory the on−time ton is constant. In practice ton
tends to increase at the ac line zero crossings due to
the charge on capacitor C6.
2
IL(pk) =
2t
L =
ǒ
VO
2
Ǔ
− Vac Vac2
VO Vac(LL) IL(pk)
2 PO L
ton =
Switch On−Time
η Vac2
The off−time toff is greatest at peak ac line
and approaches zero at the ac line zero
crossings. Theta (θ) represents the angle of
the ac line voltage.
Switch Off−Time
The minimum switching frequency occurs at peak ac
line and increases as toff decreases.
Switching Frequency
f=
Set the current sense threshold VCS to 1.0 V for
universal input (85 Vac to 265 Vac) operation
and to 0.5 V for fixed input (92 Vac to 138 Vac,
or 184 to 276 Vac) operation.
Peak Switch Current
R9 =
Set the multiplier input voltage VM to 3.0 V at high
line. Empirically adjust VM for the lowest distortion
over the ac line range while guaranteeing startup
at minimum line.
Multiplier Input Voltage
The IIB R1 error term can be minimized with a divider
current in excess of 100 μA.
Converter Output Voltage
The bandwidth is typically set to 20 Hz for minimum
output ripple over the ac line haversine.
2 PO
ηVac(LL)
ton
toff =
VO
2 Vac ⎪Sin θ⎜
Error Amplifier Bandwidth
The following converter characteristics must be chosen:
VO − Desired output voltage
Vac − AC RMS line voltage
Vac(LL) − AC RMS low line voltage
IO − Desired output current
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VM =
VO = Vref
−1
1
ton + toff
ǒ
ǒ
VCS
IL(pk)
Vac
R7
R3
R2
R1
2
+1
+1
Ǔ
Ǔ
− IIB R2
1
BW =
2π
R1 R2
R1 + R2
C1
MC34261, MC33261
Figure 15. 80 W Power Factor Controller
1
D2
92 to RFI
138 Vac Filter
C6
100k
R8
8
D4
D1
Zero Current
Detector
D3
1.2V
+
+
22k
R5
T
10V
MUR130
D5
Drive
Output
RS
Latch
10
0.5mA
MTP
8N50E
Q1
10
7
R6
10
+ Error Amp
Vref
230V/
100 0.35A
C4
1.0M
R2
330 R4
4
Current Sense
Comparator
VO
+
16V
Delay
7.5k
R3
100
C5
UVLO
Timer R
0.01
C2
5
6.7V
1.6V
2.5V
Reference
2.2M
R7
+
+ 36V
+
1N4934
D6
0.1
R9
1.0nF
C3
Multiplier
3
11k
R1
1
2
6
0.68
C1
Power Factor Controller Test Data
DC Output
AC Line Input
Current Harmonic Distortion (%)
Vrms
Pin
PF
THD
2
3
5
7
VO(pp)
VO
IO
PO
n(%)
90
85.6
−0.998
2.4
0.11
0.52
1.3
0.67
10.0
230
0.350
80.5
94.0
100
85.1
−0.997
5.0
0.13
1.7
2.4
1.4
10.1
230
0.350
80.5
94.6
110
84.8
−0.997
5.3
0.12
2.5
2.6
1.5
10.2
230
0.350
80.5
94.9
120
84.5
−0.997
5.8
0.12
3.2
2.7
1.4
10.2
230
0.350
80.5
95.3
130
84.2
−0.996
6.6
0.12
4.0
2.8
1.5
10.2
230
0.350
80.5
95.6
138
84.1
−0.995
7.2
0.13
4.5
3.0
1.6
10.2
230
0.350
80.5
95.7
This data was taken with the test set−up shown in Figure 17.
T = Coilcraft N2881−A
Primary: 62 turns of # 22 AWG
Secondary: 5 turns of # 22 AWG
Core: Coilcraft PT2510, EE 25
Gap: 0.072″ total for a primary inductance of 320 μH
Heatsink = AAVID Engineering Inc. 5903B, or 5930B
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8
MC34261, MC33261
Figure 16. 175 W Universal Input Power Factor Controller
1
D2
85 to 265 RFI
Vac
Filter
C6
100k
R8
8
D4
D1
Zero Current
Detector
D3
1.2V
+
+
10V
MUR460
D5
Drive
Output
RS
Latch
10
0.5mA
MTW
14N50E
Q1
10
7
R6
10
+ Error Amp
Vref
400V/
180 0.44A
C4
1.6M
R2
330 R4
4
Current Sense
Comparator
VO
+
16V
Delay
12k
R3
T
UVLO
Timer R
0.01
C2
100
C5
22k
R5
5
6.7V
1.6V
2.5V
Reference
1.3M
R7
+
+ 36V
+
1N4934
D6
0.1
R9
1.0nF
C3
Multiplier
3
10k
R1
1
2
6
0.68
C1
Power Factor Controller Test Data
DC Output
AC Line Input
Current Harmonic Distortion (%)
Vrms
Pin
PF
THD
2
3
5
7
VO(pp)
VO
IO
PO
n(%)
90
187.5
−0.998
2.0
0.10
0.98
0.90
0.78
8.0
400.7
0.436
174.7
93.2
120
184.6
−0.997
1.8
0.09
1.3
1.3
0.93
8.0
400.7
0.436
174.7
94.6
138
183.6
−0.997
2.3
0.05
1.6
1.5
1.0
8.0
400.7
0.436
174.7
95.2
180
181.0
−0.995
4.3
0.16
2.5
2.0
1.2
8.0
400.6
0.436
174.7
95.6
240
179.3
−0.993
6.0
0.08
3.7
2.7
1.4
8.0
400.6
0.436
174.7
97.4
268
178.6
−0.992
6.7
0.16
2.8
3.7
1.7
8.0
400.6
0.436
174.7
97.8
This data was taken with the test set−up shown in Figure 17.
T = Coilcraft N2880−A
Primary: 78 turns of # 16 AWG
Secondary: 6 turns of # 18 AWG
Core: Coilcraft PT4215, EE 42−15
Gap: 0.104″ total for a primary inductance of 870 μH
Heatsink = AAVID Engineering Inc. 5903B
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9
MC34261, MC33261
Figure 17. Power Factor Test Set−Up
Line
115 Vac
Input
2X Step−Up
Isolation
Transformer
RFI Filter
HI
AC POWER ANALYZER
PM 1000
W
Autoformer
0
I
Neutral
Vcf
O
7
VA
1
PF Vrms Arms
2
3
11
A
T
0.005
1.0
0.1
V
5
0 to 270 Vac
Output Power Factor
Controller Circuit
0.005
Acf Ainst FREQ HARM
9
HI
LO
LO
13
Voltech
Earth
An RFI filter is required for best performance when connecting the preconverter directly to the AC line. Commercially available two stage filters
such as the Delta Electronics 03DPCG5 work excellent. The simple single stage test filter shown above can easily be constructed with a common
mode transformer. Transformer (T) is a Coilcraft CMT3−28−2 with 28 mH minimum inductance and a 2.0 A maximum current rating.
Figure 18. Soft−Start Circuit
+
Figure 19. Error Amp Compensation
To VO
0.5 mA
10μA
1
1
2
R1
2
6
C
+
R2
Error Amp
+
1.0M
To VCC
C1
tSoft−Start ≈ 9000C in μF
Startup overshoot can be eliminated with the
addition of a Soft−Start circuit.
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10
MC34261, MC33261
Figure 20. Printed Circuit Board and Component Layout
(Circuits of Figures 15 and 16)
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11
MC34261, MC33261
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC PACKAGE
CASE 626−05
ISSUE L
8
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
5
−B−
1
4
F
−A−
NOTE 2
L
C
J
−T−
N
SEATING
PLANE
D
H
M
K
G
0.13 (0.005)
M
T A
M
B
M
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12
DIM
A
B
C
D
F
G
H
J
K
L
M
N
MILLIMETERS
MIN
MAX
9.40
10.16
6.10
6.60
3.94
4.45
0.38
0.51
1.02
1.78
2.54 BSC
0.76
1.27
0.20
0.30
2.92
3.43
7.62 BSC
−−−
10_
0.76
1.01
INCHES
MIN
MAX
0.370
0.400
0.240
0.260
0.155
0.175
0.015
0.020
0.040
0.070
0.100 BSC
0.030
0.050
0.008
0.012
0.115
0.135
0.300 BSC
−−−
10_
0.030
0.040
MC34261, MC33261
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC PACKAGE
CASE 751−07
(SO−8)
ISSUE W
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
A
8
5
S
B
1
0.25 (0.010)
M
Y
M
4
−Y−
K
G
C
N
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
M
D
0.25 (0.010)
M
Z Y
S
X
J
S
DIM
A
B
C
D
G
H
J
K
M
N
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0_
8_
0.010
0.020
0.228
0.244
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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MC34261/D