MC34066, MC33066 High Performance Resonant Mode Controllers The MC34066/MC33066 are high performance resonant mode controllers designed for off−line and dc−to−dc converter applications that utilize frequency modulated constant on−time or constant off−time control. These integrated circuits feature a variable frequency oscillator with programmable deadtime, precision retriggerable one−shot timer, temperature compensated reference, high gain wide−bandwidth error amplifier with a precision output clamp, steering flip−flop, and dual high current totem pole outputs ideally suited for driving power MOSFETs. Also included are protective features consisting of a high speed fault comparator and latch, programmable soft−start circuitry, input undervoltage lockout with selectable thresholds, and reference undervoltage lockout. These devices are available in dual−in−line and surface mount packages. • Variable Frequency Oscillator with a Control Range Exceeding 1000:1 • Programmable Oscillator Deadtime Allows Constant Off−Time Operation • Precision Retriggerable One−Shot Timer • Internally Trimmed Bandgap Reference • 5.0 MHz Error Amplifier with Precision Output Clamp • Dual High Current Totem Pole Outputs • Selectable Undervoltage Lockout Thresholds with Hysteresis • Enable Input • Programmable Soft−Start Circuitry • Low Startup Current for Off−Line Operation Reference Regulator VCC UVLO Osc Deadtime 1 Osc RC 2 Osc Control Current 3 One−Shot RC 5 Vref UVLO Variable Frequency Oscillator 4 One−Shot 16 Error Amp Out 6 Error Amp + Error Amp − CSoft−Start 1 1 16 SO−16W DW SUFFIX CASE 751G 16 1 1 x A WL YY WW Osc Deadtime 1 10 7 11 16 One−Shot RC Osc RC 2 15 VCC Gnd Error Amp Out 6 Drive 12 Output B Fault−Detector/ Latch = 3 or 4 = Assembly Location = Wafer Lot = Year = Work Week PIN CONNECTIONS Drive Gnd Fault Input 13 Drive Gnd 11 CSoft−Start Error Amp 7 Inverting Input Error Amp 8 Noninverting Input 10 Fault Input 9 Enable/UVLO Adjust (Top View) ORDERING INFORMATION Device Soft−Start MC33066DW AWLYYWW 12 Drive Output B Error Amplifier 8 16 MC3x066P AWLYYWW Vref 5 Bout 13 PDIP−16 P SUFFIX CASE 648 Vref Drive 14 Output A Error Amp Clamp 16 14 Drive Output A Aout Steering Flip−Flop MARKING DIAGRAMS Osc Control 3 Current Gnd 4 VCC 15 Enable/ UVLO Adjust 9 http://onsemi.com Package Shipping MC34066P PDIP−16 25 Units/Rail MC33066DW SO−16W 47 Units/Rail MC33066P PDIP−16 25 Units/Rail Figure 1. Simplified Block Diagram © Semiconductor Components Industries, LLC, 2006 July, 2006 − Rev. 3 1 Publication Order Number: MC34066/D MC34066, MC33066 MAXIMUM RATINGS Rating Symbol Value Unit VCC 20 V Power Input Supply Voltage Drive Output Current, Source or Sink (Note 1) Continuous Pulsed (0.5 μs, 25% Duty Cycle) IO Error Amplifier, Fault, One−Shot, Oscillator, and Soft−Start Inputs Vin −1.0 to +6.0 V Vin(UVLO) −1.0 to VCC V Idchg 20 mA PD RθJA 862 145 mW °C/W PD RθJA 1.25 100 W °C/W Operating Junction Temperature TJ +150 °C Operating Ambient Temperature MC34066 MC33066 TA Storage Temperature Range Tstg UVLO Adjust Input Soft−Start Discharge Current Power Dissipation and Thermal Characteristics DW Suffix Package, Case 751G Maximum Power Dissipation @ TA = 25°C Thermal Resistance, Junction−to−Air P Suffix Package, Case 648 Maximum Power Dissipation @ TA = 25°C Thermal Resistance, Junction−to−Air A 0.3 1.5 °C 0 to +70 −40 to +85 −65 to +150 °C ELECTRICAL CHARACTERISTICS (VCC = 12 V [Note 2], ROSC = 95.3 k, RDT = 0 Ω, RVFO = 5.62 k, COSC = 300 pF, RT = 14.3 k, CT = 300 pF, CL = 1.0 nF, for typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies [Note 3], unless otherwise noted.) Characteristics Symbol Min Typ Max Unit Vref 5.0 5.1 5.2 V Line Regulation (VCC = 10 V to 18 V) Regline − 1.0 20 mV Load Regulation (IO = 0 mA to 10 mA) Regload − 1.0 20 mV Vref 4.9 − 5.3 mV REFERENCE SECTION Reference Output Voltage (IO = 0 mA, TA = 25°C) Total Output Variation over Line, Load, and Temperature Output Short Circuit Current IO 25 100 190 mA Reference Undervoltage Lockout Threshold Vth 3.8 4.3 4.8 V VIO − 1.0 10 mV Input Bias Current (VCM = 1.5 V) IIB − 0.2 1.0 μA Input Offset Current (VCM = 1.5 V) IIO − 0 0.5 μA Open Loop Voltage Gain (VCM = 1.5 V, VO = 2.0 V) AVOL 70 100 − dB Gain Bandwidth Product (f = 100 kHz) GBW 2.5 4.2 − MHz Input Common Mode Rejection Ratio (VCM = 1.5 V to 5.0 V) CMRR 70 95 − dB Power Supply Rejection Ratio (VCC = 10 V to 18 V, f = 120 Hz) PSRR 80 100 − dB VOH VOL 2.3 − 2.7 0.4 3.1 0.6 ERROR AMPLIFIER Input Offset Voltage (VCM = 1.5 V) Output Voltage Swing High State with Respect to Pin 3 (ISource = 2.0 mA) Low State with Respect to Ground (ISink = 1.0 mA) V 1. Maximum package power dissipation limits must be observed. 2. Adjust VCC above the Startup threshold before setting to 12 V. 3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. Thigh = +70°C for MC34066 Tlow = 0°C for MC34066 −40°C for MC33066 +85°C for MC33066 http://onsemi.com 2 MC34066, MC33066 ELECTRICAL CHARACTERISTICS (continued) (VCC = 12 V [Note 4], ROSC = 95.3 k, RDT = 0 Ω, RVFO = 5.62 k, COSC = 300 pF, RT = 14.3 k, CT = 300 pF, CL = 1.0 nF, for typical values TA = 25°C, for min/max values TA is the operating ambient temperature range that applies [Note 5], unless otherwise noted.) Characteristics Symbol Min Typ Max 90 85 100 − 110 115 900 850 1000 − 1100 1150 1.3 1.4 1.5 − 600 70 700 100 800 1.43 1.4 1.5 − 1.57 1.6 − − 9.5 9.0 0.8 1.5 10.3 9.8 1.2 2.0 − − Unit OSCILLATOR Frequency (Error Amp Output Low) TA = 25°C Total Variation (VCC = 10 V to 18 V, TA = TLow to THigh) fOSC(low) Frequency (Error Amp Output High) TA = 25°C Total Variation (VCC = 10 V to 18 V, TA = TLow to THigh) fOSC(high) Oscillator Control Input Voltage, Pin 3 (ISink = 0.5 mA, TA = 25°C) Vin Output Deadtime (Error Amp Output High) RDT = 0 Ω RDT = 1.0 k DT kHz kHz V ns ONE−SHOT Drive Output On−Time (RDT = 1.0 k) TA = 25°C Total Variation (VCC = 10 V to 18 V, TA = TLow to THigh) tOS μs DRIVE OUTPUTS Output Voltage Low State (ISink = 20 mA) Low State (ISink = 200 mA) High State (ISource = 20 mA) High State (ISource = 200 mA) V VOL VOH Output Voltage with UVLO Activated (VCC = 6.0 V, ISink = 1.0 mA) VOL(UVLO) − 0.8 1.2 V Output Voltage Rise Time (CL = 1.0 nF) tr − 20 50 ns Output Voltage Fall Time (CL = 1.0 nF) tf − 20 50 ns Input Threshold Vth 0.95 1.0 1.05 V Input Bias Current (VPin 10 = 0 V) IIB − −2.0 −10 μA tPLH(In/Out) − 60 100 ns Ichg 4.5 8.1 14 μA IIdchg 1.0 8.0 − mA 14.8 8.0 16 9.0 17.2 10 8.0 7.6 9.0 8.6 10 9.6 FAULT COMPARATOR Propagation Delay to Drive Outputs (100 mV Overdrive) SOFT−START Capacitor Charge Current (VPin 11 = 2.5 V) Capacitor Discharge Current (VPin 11 = 2.5 V) UNDERVOLTAGE LOCKOUT Startup Threshold, VCC Increasing Enable/UVLO Adjust Pin Open Enable/UVLO Adjust Pin Connected to VCC Vth(UVLO) Minimum Operating Voltage after Turn−On Enable/UVLO Adjust Pin Open Enable/UVLO Adjust Pin Connected to VCC VCC(min) V V Enable/UVLO Adjust Shutdown Threshold Voltage Vth(Enable) 6.0 7.0 − V Enable/UVLO Adjust Input Current (Pin 9 = 0V) Iin(Enable) − −0.2 −1.0 mA − − 0.45 21 0.6 30 TOTAL DEVICE Power Supply Current (Enable/UVLO Adjust Pin Open) Startup (VCC = 13.5 V) Operating (fOSC = 100 kHz) (Note 4) ICC mA 4. Adjust VCC above the Startup threshold before setting to 12 V. 5. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. Thigh = +70°C for MC34066 Tlow = 0°C for MC34066 −40°C for MC33066 +85°C for MC33066 http://onsemi.com 3 MC34066, MC33066 VCC 15 50k 7k 7k Enable/ UVLO Adjust 9 50k + − 8V Reference Regulator VCC UVLO 5.1V UVLO VCC 5 Vref UVLO − 4 Vref Gnd + 4.2V/4V Osc Deadtime Q1 Q2 RDT 1 Osc RC ROSC − 2 CT T ton 4.9V/3.6V UVLO + Fault Q Current Mirror RVFO + − 6 CSoft−Start Q Drive 12 Output B Drive 13 Gnd 4.9V/3.6V 3 Error Amp Output Error Amp 7 Inverting Input Error Amp Noninverting Input 8 R One−Shot − + RT Osc Control Current IOSC Drive 14 Output A Q + IOSC COSC One−Shot RC 16 Drivers Steering Flip−Flop 5.1V Oscillator 2.5V − + R Fault Comparator S Fault Error Amp Output Clamp Fault Latch EA Clamp + − Fault 10 Input 1.0V Soft−Start Buffer 9μA Error Amplifier 11 Figure 2. MC34066 Representative Block Diagram OPERATING DESCRIPTION Introduction 1) fixed on−time, variable frequency; 2) fixed off−time, variable frequency; and 3) combinations of 1 and 2 that change from fixed on−time to fixed off−time as the frequency increases. Additional features of the IC ensure that system startup and fault conditions are administered in a safe, controlled manner. A simplified block diagram of the IC is shown on the first page of this data sheet, which identifies the main functional blocks and the block−to−block interconnects. Figure 2 is a detailed functional diagram which accurately represents the internal circuitry. The various functions can be divided into two sections. The first section includes the primary control path which produces precise output pulses at the desired frequency Oscillator, a One−Shot, a pulse Steering Flip−Flop, a pair of power MOSFET Drivers, and a wide bandwidth Error Amplifier. The second section provides several peripheral support functions including a voltage reference, undervoltage lockout, Soft−Start circuit, and a fault detector. As power supply designers have strived to increase power conversion efficiency and reduce passive component size, high frequency resonant mode power converters have emerged as attractive alternatives to conventional square−wave control. When compared to square−wave converters, resonant mode control offers several benefits including lower switching losses, higher efficiency, lower EMI emission, and smaller size. This integrated circuit has been developed to support new trends in power supply design. The MC34066 Resonant Mode Controller is a high performance bipolar IC dedicated to variable frequency power control at frequencies exceeding 1.0 MHz. This integrated circuit provides the features, performance and flexibility for a wide variety of resonant mode power supply applications. The primary purpose of the control chip is to supply precise pulses to the gates of external power MOSFETs at a repetition rate regulated by a feedback control loop. The MC34066 can be operated in any of three modes as follows: http://onsemi.com 4 MC34066, MC33066 Primary Control Path If RDT is 0 Ω, COSC charges from 3.6 V to 5.1 V in less than 50 ns. The high slew rate of COSC and the propagation delay of the comparator make it difficult to control the peak voltage. This accuracy issue is overcome by clamping the base of Q1 through diode Q2 to a voltage reference. The peak voltage of the oscillator waveform is thereby precisely set at 5.1 V. The frequency of the Oscillator is modulated by varying the current IOSC flowing through RVFO into the Osc Control Current pin. The control current drives a unity gain Current Mirror which pulls an identical current from the COSC capacitor. As IOSC increases, COSC discharges faster thus decreasing the Oscillator period and increasing the frequency. The maximum frequency occurs when the Error Amplifier output is at the upper clamp level, nominally 2.5 V above the voltage at the Osc Control Current pin. The minimum discharge time for COSC, which corresponds to the maximum oscillator frequency, is given by Equation 1. The output pulse width and repetition rate are regulated through the interaction of the variable frequency Oscillator, One−Shot timer and Error Amplifier. The Oscillator triggers the One−Shot which generates a pulse that is alternately steered to a pair of totem−pole output drivers by a toggle Flip−Flop. The Error Amplifier monitors the output of the regulator and modulates the frequency of the Oscillator. High−speed Schottky logic is used throughout the primary control channel to minimize delays and enhance high frequency characteristics. Oscillator The characteristics of the variable frequency Oscillator are crucial for precise controller performance at high operating frequencies. In addition to triggering the One−Shot timer and initiating the output pulse, the Oscillator also determines the initial voltage for the One−Shot capacitor and defines the minimum deadtime between output pulses. The Oscillator is designed to operate at frequencies exceeding 1.0 MHz. The Error Amplifier can control the oscillator frequency over a 1000:1 frequency range, and both the minimum and maximum frequencies are easily and accurately programmed by the proper selection of external components. The Oscillator also includes an adjustable deadtime feature for applications requiring additional time between output pulses. The functional diagram of the Oscillator and One−Shot timer is shown in Figure 3. The oscillator capacitor COSC is initially charged by transistor Q1 through the optional deadtime resistor RDT. When COSC exceeds the 4.9 V upper threshold of the oscillator comparator, the base of Q1 is pulled low allowing COSC to discharge through the external resistors and the internal Current Mirror. When the voltage on COSC falls below the comparator’s 3.6 V lower threshold, Q1 turns on and again charges COSC. tdchg(min) = (RDT + ROSC)COSCIn tdchg(max) = (RDT + ROSC) COSCIn ROSC Q2 5.1V Oscillator − + 2 COSC IOSC RT 4.9V/3.6V − + 16 Osc Control Current tchg(max) = RDT COSC In 4.9V/3.6V 3 RVFO 5.1−3.6 + 80 ns 5.1−4.9 (3) The minimum and maximum oscillator frequencies are programmed by the proper selection of resistor ROSC and RVFO. After selecting RDT for the desired deadtime, the minimum frequency is programmed by ROSC using Equations 2 and 3 in Equation 4: UVLO + Fault IOSC (2) One−Shot One−Shot RC CT 5.1 3.6 The outputs of the control IC are off whenever the oscillator capacitor COSC is being charged by transistor Q1. The minimum time between output pulses (deadtime) can be programmed by controlling the charge time of COSC. Resistor RDT reduces the current delivered by Q1 to COSC, thus increasing the charge time and output deadtime. Varying RDT from 0 Ω to 1000 Ω will increase the output deadtime from 80 ns to 680 ns with COSC equal to 300 pF. The general expression for the oscillator charge time is give by Equation 3. Q1 1 RDT Osc RC (1) The minimum oscillator frequency will result when the IOSC current is zero, and COSC is discharged through the external resistors ROSC and RDT. This occurs when the Error Amplifier output voltage is less than the two diode drops required to bias the input of the Current Mirror. The maximum oscillator discharge time is given by Equation 2. VCC Osc Deadtime 2.5ROSC + 5.1 RVFO 2.5ROSC + 3.6 RVFO Current Mirror 6 Error Amp Output Figure 3. Oscillator and One−Shot Timer 1 = tdchg(max) + tchg fOSC(min) http://onsemi.com 5 (4) MC34066, MC33066 One−Shot Timer The maximum oscillator frequency is set by resistor RVFO in a similar fashion using Equations 1 and 3 in Equation 5: 1 = tdchg(min) + tchg fOSC(max) The One−Shot capacitor CT is charged concurrently with the oscillator capacitor by transistor Q1, as shown in Figure 3. The One−Shot period begins when the oscillator comparator turns off Q1, allowing CT to discharge. The period ends when resistor RT discharges CT to the threshold of the One−Shot comparator. Discharging CT from an initial voltage of 5.1 V to a threshold voltage of 3.6 V results in the One−Shot period given by Equation 6. (5) The value chosen for resistor RDT will affect the peak voltage of the oscillator waveform. As RDT is increased from zero, the time required to charge COSC becomes large with respect to the propagation delay through the oscillator comparator. Consequently, the overshoot of the upper threshold is reduced and the peak voltage on the oscillator waveform drops from 5.1 V to 4.9 V. The best frequency accuracy is achieved when RDT is zero ohms. tOS = RT CT In http://onsemi.com 6 5.1 = 0.348 RT CT 3.6 (6) MC34066, MC33066 RDT = 0 tdchg > tOne−Shot tdchg < tOne−Shot 5.1 V COSC 3.6 V tdchg tdchg 5.1 V CT 3.6 V tOS ton AOUT ton toff ton BOUT RDT = 1.0 k tdchg < tOne−Shot tdchg > tOne−Shot 5.1 V 4.9 V COSC 3.6 V tchg tchg tdchg tdchg 5.1 V CT 3.6 V tOS ton AOUT ton toff ton BOUT Figure 4. Timing Waveforms http://onsemi.com 7 MC34066, MC33066 Output Section Errors in the threshold voltage and propagation delays through the output drivers will affect the One−Shot period. To guarantee accuracy, the output pulse of the control ship is trimmed to within 5% of 1.5 μs with nominal values of RT and CT. The outputs of the Oscillator and One−Shot comparators are OR’d together to produce the pulse ton, which drives the Flip−Flop and output drivers. The output pulse ton is initiated by the Oscillator, but either the oscillator comparator or the One−Shot comparator can terminate the pulse. When the oscillator discharge time exceeds the one−shot period, the complete one−shot period is delivered to the output section. If the oscillator discharge time is less than the one−shot period, then the oscillator comparator terminates the pulse prematurely and retriggers the One−Shot. The waveforms on the left side of Figure 4 correspond to nonretriggered operation with constant on−time and variable off−times. The right side of Figure 4 represents retriggered operation with variable on−time and constant off−time. The pulse, ton, generated by the Oscillator and One−Shot timer is gated to dual totem pole output drives by the Steering Flip−Flop shown in Figure 6. Positive transitions of ton toggle the Flip−Flop, which causes the pulses to alternate between Output A and Output B. The flip−flop is reset by the undervoltage lockout circuit during startup to guarantee that the first pulse appears at Output A. The totem−pole output drives are ideally suited for driving power MOSFETs and are capable of sourcing and sinking 1.5 A. Rise and fall times are typically 20 ns when driving a 1.0 nF load. High source/sink capability in a totem−pole driver normally increases the risk of high cross conduction current during output transitions. The MC34066 utilizes a unique design that virtually eliminates cross conduction, thus controlling the chip power dissipation at high frequencies. A separate ground terminal is provided for the output drivers to isolate the sensitive analog circuitry from large transient currents. VCC Error Amplifier A fully accessible high performance Error Amplifier is provided for feedback control of the power supply system. The Error Amplifier is internally compensated and features dc open loop gain greater than 70 dB, input offset voltage less than 10 mV and guaranteed minimum gain−bandwidth product of 2.5 MHz. The input common mode range extends from 1.5 V to 5.1 V, which includes the reference voltage. For common mode voltages below 1.5 V, the Error Amplifier output is forced low providing minimum oscillator frequency. The Oscillator Control Current pin is biased by the Error Amplifier output voltage through RVFO as illustrated in Figure 5. The output swing of the Error Amplifier is restricted by a clamp circuit to limit the maximum oscillator frequency. The clamp circuit limits the voltage across RVFO to 2.5 V, thus limiting IOSC to 2.5 V/RVFO. Oscillator accuracy is improved by trimming the clamp voltage to obtain the fOSC(high) specification of 1.0 MHz with nominal value external components. ton UVLO Q Drive 14 Output A Drive Output B 12 Drive 13 Gnd Figure 6. Steering Flip−Flop and Output Drivers PERIPHERAL SUPPORT FUNCTIONS The MC34066 Resonant Controller provides a number of support and protection functions including a precision voltage reference, undervoltage lockout comparators, soft−start circuitry, and a fault detector. These peripheral circuits ensure that the power supply can be turned on and off in a safe, controlled manner and that the system will be quickly disabled when a fault condition occurs. Undervoltage Lockout and Voltage Reference RVFO Error Amp Inverting Input 8 R Fault Separate undervoltage lockout comparators sense the input VCC voltage and the regulated reference voltage as illustrated in Figure 7. When VCC increases to the upper threshold voltage, the VCC UVLO comparator enables the Reference Regulator. After the Vref output of the Reference Regulator rises to 4.2 V, the Vref UVLO comparator switches the UVLO signal to a logic zero state enabling the primary control path. Reducing VCC to the lower threshold voltage causes the VCC UVLO comparator to disable the Reference Regulator. The Vref UVLO comparator then switches the UVLO output to a logic one state disabling the controller. 3 Error Amp 6 Output Error Amp 7 Noninverting Input Q T Osc Control Current IOSC Drivers Steering Flip−Flop + − 2.5V Error Amp Output Clamp + − EA Clamp Error Amplifier Figure 5. Error Amplifier and Clamp http://onsemi.com 8 MC34066, MC33066 VCC 15 50k 7k Enable/ UVLO Adjust 9 7k + 50k Reference Regulator − 5.1V VCC UVLO Vref UVLO UVLO 8.0V 5 − 4 Vref Gnd + 4.2V/4.0V Figure 7. Undervoltage Lockout and Reference The Enable/UVLO Adjust terminal allows the power supply designer to select the VCC UVLO threshold voltages. When this pin is open, the comparator switches the controller on at 16 V and off at 9.0 V. If this pin is connected to the VCC terminal, the upper and lower thresholds are reduced to 9.0 V and 8.6 V, respectively. Forcing the Enable/UVLO Adjust pin low will pull the VCC UVLO comparator input low (through an internal diode) turning off the controller. The Reference Regulator provides a precise 5.1 V reference to internal circuitry and can deliver up to 10 mA to external loads. The reference is trimmed to better than 2% initial accuracy and includes active short circuit protection. also be reset after startup by pulling the Enable/UVLO Adjust pin momentarily low to disable the Reference Regulator. Soft−Start Circuit The Soft−Start circuit shown in Figure 8 forces the variable frequency Oscillator to start at the minimum frequency and ramp upward until regulated by the feedback control loop. The external capacitor at the CSoft−Start terminal is initially discharged by the UVLO + Fault signal. The low voltage on the capacitor pass through the Soft−Start Buffer to hold the Error Amplifier output low. After UVLO + Fault switches to a logic zero, the soft−start capacitor is charged by a 9.0 μA current source. The buffer allows the Error Amplifier output to follow the soft−start capacitor until it is regulated by the Error Amplifier inputs (or reaches the 2.5 V clamp). The soft−start function is generally applicable to controllers operating below resonance and can be disabled by simply opening the CSoft−Start terminal. Fault Detector The high−speed Fault Comparator and Latch illustrated in Figure 8 can protect a power supply from destruction under fault conditions. The Fault Input pin connects to the input of the Fault Comparator. If this input exceeds the 1.0 V threshold of the comparator, the Fault Latch is set and two logic signals simultaneously disable the primary control path. The signal labeled Fault at the output of the Fault Comparator is connected directly to the output drivers. This direct path reduces the propagation delay from the Fault Input to the A and B outputs to typically 70 ns. The Fault Latch output is OR’d with UVLO output from the Vref UVLO comparator to produce the logic output labeled UVLO + Fault. This signal disables the Oscillator and One−Shot by forcing both the COSC and CT capacitors to be continually charged. UVLO + Fault EA Clamp 9μA Soft−Start Buffer UVLO APPLICATIONS The MC34066 can be used for the control of series, parallel or higher order half/full bridge resonant converters. The IC is designed to provide control in discontinuous conduction mode (DCM) or continuous conduction mode (CCM) or a combination of the two. For example, in a parallel resonant converter (PRC) operating in the DCM, the IC is programmed to operate in fixed on−time, variable frequency mode of operation. For a PRC operating in the CCM, the IC can be programmed to operate in the variable frequency mode with a fixed off−time. When operating with a wide input voltage range, such as a universal input power supply, a PRC can operate in the DCM for high input voltage and in the CCM for low input voltage. In this particular case, on−time is programmed corresponding to DCM. The deadtime of the chip is programmed to provide the desired off−time in the CCM. The frequency range is chosen to cover the complete frequency range from the DCM to the CCM. When programmed as such, the controller will operate in the fixed on−time, variable frequency mode at low frequencies. At the frequency which causes the Oscillator to retrigger the One−Shot, the control law changes to variable frequency with fixed off−time. At higher frequencies the supply will operate in the CCM with this control law. Although the IC is designed and optimized for double ended push−pull type converters, it can also be used for single ended applications, such as forward and flyback resonant converters. Fault Fault Input R Q S Fault Latch + − Fault Comparator 1V 10 CSoft− Start 11 Figure 8. Fault Detector and Soft−Start The Fault Latch is reset during startup by a logic one at the UVLO output of the Vref UVLO comparator. The latch can http://onsemi.com 9 MC34066, MC33066 PACKAGE DIMENSIONS PDIP−16 P SUFFIX CASE 648−08 ISSUE R NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. −A− 16 9 1 8 B F C L S −T− H SEATING PLANE K G D M J 16 PL 0.25 (0.010) M T A M DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01 SO−16W DW SUFFIX CASE 751G−03 ISSUE B A D 9 1 8 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. 16X M T A S B h X 45 _ S 14X e L A 0.25 B B A1 H E 0.25 8X M B M 16 q SEATING PLANE T C http://onsemi.com 10 DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 10.15 10.45 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ MC34066, MC33066 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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