MC100EL91 5 V Triple PECL Input to −5 V ECL Output Translator Description The MC100EL91 is a triple PECL input to ECL output translator. The device receives standard voltage differential PECL signals, determined by the VCC supply level, and translates them to differential −5 V ECL output signals. (For translation of LVPECL to −3.3 V ECL output, see MC100LVEL91.) To accomplish the level translation, the EL91 requires three power rails. The VCC supply should be connected to the positive supply, and the VEE pin should be connected to the negative power supply. The GND pins are connected to the system ground plane. Both VEE and VCC should be bypassed to ground via 0.01 mF capacitors. Under open input conditions, the D input will be biased at VCC/2 and the D input will be pulled to GND. This condition will force the Q output to a low, ensuring stability. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. http://onsemi.com SO−20 WB DW SUFFIX CASE 751D MARKING DIAGRAM* 20 100EL91 AWLYYWWG Features • • • • • • • • • • • 670 ps Typical Propagation Delay ESD Protection: >2 kV Human Body Model The 100 Series Contains Temperature Compensation Operating Range:VCC = 4.75 V to 5.5 V; VEE = −4.2 V to −5.5 V; GND = 0 V Internal Input Pulldown Resistors Q Output will Default LOW with Inputs Open or at GND Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D Flammability Rating: UL 94 V−0 @ 0.125 in, Oxygen Index: 28 to 34 Transistor Count = 282 devices Pb−Free Package is Available* 1 A WL YY WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. 6 1 Publication Order Number: MC100EL91/D MC100EL91 VCC Q0 Q0 GND Q1 Q1 GND 20 19 18 17 16 15 ECL PECL 1 2 3 VCC D0 D0 4 5 6 PECL VBB PECL D1 D1 Q2 VCC 13 12 11 14 Table 1. PIN DESCRIPTION ECL PIN FUNCTION PECL Dn, Dn Qn, Qn PECL VBB VCC VEE GND PECL Inputs ECL Outputs PECL Reference Voltage Output Positive Supply Negative Supply Ground 7 8 9 10 PECL VBB ECL Q2 D2 D2 VEE **All VCC pins are tied together on the die. Warning: All VCC, VEE, and GND pins must be externally connected to Power Supply to guarantee proper operation. Figure 1. 20−Lead Pinout (Top View) and Logic Diagram Table 2. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit VCC PECL Power Supply GND = 0 V 8 to 0 V VEE NECL Power Supply GND = 0 V −8 to 0 V VI PECL Input Voltage GND = 0 V Iout Output Current Continuous Surge IBB PECL VBB Sink/Source TA 6 to 0 V 50 100 mA mA ± 0.5 mA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm SOIC−20 WB SOIC−20 WB 90 60 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board SOIC−20 WB 30 to 35 °C/W Tsol Wave Solder <2 to 3 sec @ 248°C <2 to 3 sec @ 260°C 265 265 °C Pb Pb−Free VI VCC Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. http://onsemi.com 2 MC100EL91 Table 3. PECL INPUT DC CHARACTERISTICS VCC= 5.0 V; VEE= −5.0 V; GND= 0 V (Note 1) −40°C Symbol Min Characteristic Typ 25°C Max Min 85°C Typ Max 6 11 Typ Max Unit 11 mA ICC VCC Power Supply Current VIH Input HIGH Voltage (Single−Ended) 3835 4120 3835 4120 3835 4120 mV VIL Input LOW Voltage (Single−Ended) 3190 3525 3190 3525 3190 3525 mV PECL VBB Output Voltage Reference 3.62 3.74 3.62 3.74 3.62 3.74 V VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 2) VPP < 500 mV VPP y 500 mV IIH Input HIGH Current IIL Input LOW Current 11 Min V 1.3 1.5 4.8 4.8 1.2 1.4 4.8 4.8 150 0.5 1.2 1.4 4.8 4.8 150 0.5 150 0.5 mA mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input parameters vary 1:1 with VCC. VCC = +4.75 V to +5.2 V, VEE = −4.20 V to −5.5 V. 2. VIHCMR min varies 1:1 with GND. VIHCMR max varies 1:1 with VCC. Table 4. NECL OUTPUT DC CHARACTERISTICS VCC= 5.0 V to 5.0 V; VEE= −5.0 V; GND= 0 V (Note 3) −40°C Symbol Characteristic Min Typ 25°C Max Min 28 85°C Typ Max 22 28 Min Typ Max Unit 30 mA IEE VEE Power Supply Current VOH Output HIGH Voltage (Note 4) −1085 −1005 −880 −1025 −955 −880 −1025 −955 −880 mV VOL Output LOW Voltage (Note 4) −1830 −1695 −1555 −1810 −1705 −1620 −1810 −1705 −1620 mV NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. Output parameters vary 1:1 with GND. VCC = +4.75 V to +5.2 V, VEE = −4.20 V to −5.5 V. 4. Outputs are terminated through a 50 W resistor to GND − 2.0 V http://onsemi.com 3 MC100EL91 Table 5. AC CHARACTERISTICS VCC= 5.0 V; VEE= −5.0 V; GND= 0 V (Note 8). −40°C Symbol Min Characteristic fmax Maximum Toggle Frequency tPLH tPHL Propagation Delay D to Q tSKEW Skew Differential Single−Ended. Typ 25°C Max Min 700 540 490 Output−to−Output (Note 5) Part−to−Part (Differential) (Note 5) Duty Cycle (Differential) (Note 6) Random Clock Jitter @ 700 MHz VPP Input Swing (Note 7) 200 tr tf Output Rise/Fall Times Q (20% − 80%) 270 85°C Max Min 700 640 640 740 790 40 100 200 25 tJITTER Typ 570 520 1.2 770 820 40 100 200 610 560 400 200 530 270 400 810 860 40 100 200 1.2 1000 200 530 270 400 Unit MHz 710 710 25 1.2 1000 Max 700 670 670 25 Typ ps ps pS(RMS) 1000 mV 530 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Skews are valid across specified voltage range, part−to−part skew is for a given temperature. 6. Duty cycle skew is the difference between a tPLH and tPHL propagation delay through a device. 7. VPP(min) is the minimum input swing for which AC parameters are guaranteed. The device has a DC gain of ≈40. 8. VCC = +4.75 V to +5.2 V, VEE = −4.20 V to −5.5 V. Outputs are terminated through a 50 W resistor to GND − 2.0 V. Q Zo = 50 W D Receiver Device Driver Device Q D Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V Figure 2. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) http://onsemi.com 4 MC100EL91 ORDERING INFORMATION Package Shipping † MC100EL91DW SO−20 WB 38 Units / Rail MC100EL91DWG SO−20 WB (Pb−Free) 38 Units / Rail MC100EL91DWR2 SO−20 WB 1000 / Tape & Reel MC100EL91DWR2G SO−20 WB (Pb−Free) 1000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices http://onsemi.com 5 MC100EL91 PACKAGE DIMENSIONS SO−20 WB DW SUFFIX CASE 751D−05 ISSUE G A 20 q X 45 _ E h H M 10X 0.25 NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 B M D 1 10 20X B B 0.25 M T A S B S L A 18X e A1 SEATING PLANE C T DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ ECLinPS are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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