SN54/74LS155 SN54/74LS156 DUAL 1-OF-4 DECODER/ DEMULTIPLEXER The SN54 / 74LS155 and SN54 / 74LS156 are high speed Dual 1-of-4 Decoder/Demultiplexers. These devices have two decoders with common 2-bit Address inputs and separate gated Enable inputs. Decoder “a” has an Enable gate with one active HIGH and one active LOW input. Decoder “b” has two active LOW Enable inputs. If the Enable functions are satisfied, one output of each decoder will be LOW as selected by the address inputs. The LS156 has open collector outputs for wired-OR (DOT-AND) decoding and function generator applications. The LS155 and LS156 are fabricated with the Schottky barrier diode process for high speed and are completely compatible with all Motorola TTL families. • • • • • • Schottky Process for High Speed Multifunction Capability Common Address Inputs True or Complement Data Demultiplexing Input Clamp Diodes Limit High Speed Termination Effects ESD > 3500 Volts DUAL 1-OF-4 DECODER / DEMULTIPLEXER LS156-OPEN-COLLECTOR LOW POWER SCHOTTKY J SUFFIX CERAMIC CASE 620-09 16 1 N SUFFIX PLASTIC CASE 648-08 16 CONNECTION DIAGRAM DIP (TOP VIEW) VCC Eb Eb A0 O3b O2b O1b O0b 16 15 14 13 12 11 10 9 1 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. D SUFFIX SOIC CASE 751B-03 16 1 ORDERING INFORMATION 1 Ea 2 Ea 3 A1 4 O3a 5 O2a 6 O1a 8 7 O0a GND SN54LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC LOGIC SYMBOL PIN NAMES A0, A1 Ea, Eb Ea O0 – O3 LOADING (Note a) Address Inputs Enable (Active LOW) Inputs Enable (Active HIGH) Input Active LOW Outputs (Note b) HIGH LOW 0.5 U.L. 0.5 U.L. 0.5 U.L. 10 U.L. 0.25 U.L. 0.25 U.L. 0.25 U.L. 5 (2.5) U.L. NOTES: a) 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW. b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) Temperature Ranges. The HIGH level drive for the LS156 must be established by an external resistor. 1 2 13 3 E DECODER a 14 15 A0 A0 A1 0 1 2 3 A1 0 7 6 5 4 9 VCC = PIN 16 GND = PIN 8 FAST AND LS TTL DATA 5-1 E DECODER b 1 2 3 10 11 12 SN54/74LS155 • SN54/74LS156 LOGIC DIAGRAM Ea Ea 1 VCC = PIN 16 GND = PIN 8 = PIN NUMBERS 7 A0 2 6 O0a A1 13 5 O1a Eb Eb 3 4 O2a FUNCTIONAL DESCRIPTION The LS155 and LS156 are Dual 1-of-4 Decoder/Demultiplexers with common Address inputs and separate gated Enable inputs. When enabled, each decoder section accepts the binary weighted Address inputs (A0, A1) and provides four mutually exclusive active LOW outputs (O0 – O3). If the Enable requirements of each decoder are not met, all outputs of that decoder are HIGH. Each decoder section has a 2-input enable gate. The enable gate for Decoder “a” requires one active HIGH input and one active LOW input (Ea•Ea). In demultiplexing applications, Decoder “a” can accept either true or complemented data by using the Ea or Ea inputs respectively. The enable gate for Decoder “b” requires two active LOW inputs (Eb•Eb). The LS155 or LS156 can be used as a 1-of-8 Decoder/Demultiplexer by tying Ea to Eb and relabeling the common connection as (A2). The other Eb and Ea are connected together to form the common enable. The LS155 and LS156 can be used to generate all four minterms of two variables. These four minterms are useful in some applications replacing multiple gate functions as shown in Fig. a. The LS156 has the further advantage of being able to 14 9 O3a 10 O0b 15 11 O1b 12 O2b O3b AND the minterm functions by tying outputs together. Any number of terms can be wired-AND as shown below. f = (E + A0 + A1) ⋅ (E + A0 + A1) ⋅ (E + A0 + A1) ⋅ (E + A0 + A1) where E = Ea + Ea; E = Eb + Eb E A0 A1 E O0 A0 A1 O0 E A0 A1 E O1 A0 A1 O1 E A0 A1 E O2 A0 A1 O2 E A0 A1 E O3 A0 A1 O3 Figure a TRUTH TABLE ADDRESS ENABLE “a” OUTPUT “a” ENABLE “b” OUTPUT “b” A0 A1 Ea Ea O0 O1 O2 O3 Eb Eb O0 O1 O2 O3 X X L H L H X X L L H H L X H H H H X H L L L L H H L H H H H H H L H H H H H H L H H H H H H L H X L L L L X H L L L L H H L H H H H H H L H H H H H H L H H H H H H L H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care FAST AND LS TTL DATA 5-2 SN54/74LS155 GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit VCC Supply Voltage 54 74 4.5 4.75 5.0 5.0 5.5 5.25 V TA Operating Ambient Temperature Range 54 74 – 55 0 25 25 125 70 °C IOH Output Current — High 54, 74 – 0.4 mA IOL Output Current — Low 54 74 4.0 8.0 mA DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits S b l Symbol P Parameter VIH Input HIGH Voltage VIL Input LOW Voltage VIK Input Clamp Diode Voltage VOH Output HIGH Voltage VOL Output LOW Voltage IIH Input HIGH Current IIL Input LOW Current IOS Short Circuit Current (Note 1) ICC Power Supply Current Min Typ Max U i Unit 2.0 54 0.7 74 0.8 – 0.65 – 1.5 T Test C Conditions di i V Guaranteed Input HIGH Voltage for All Inputs V Guaranteed Input p LOW Voltage g for All Inputs V VCC = MIN, IIN = – 18 mA 54 2.5 3.5 V 74 2.7 3.5 V VCC = MIN,, IOH = MAX,, VIN = VIH or VIL per Truth Table VCC = VCC MIN, VIN = VIL or VIH per Truth Table 54, 74 0.25 0.4 V IOL = 4.0 mA 74 0.35 0.5 V IOL = 8.0 mA 20 µA VCC = MAX, VIN = 2.7 V – 20 0.1 mA VCC = MAX, VIN = 7.0 V – 0.4 mA VCC = MAX, VIN = 0.4 V – 100 mA VCC = MAX 10 mA VCC = MAX Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25°C) Limits S b l Symbol P Parameter Min Typ Max U i Unit T Test C Conditions di i tPLH tPHL Propagation Delay Address, Ea or Eb to Output 10 19 15 30 ns Figure 1 tPLH tPHL Propagation Delay Address to Output 17 19 26 30 ns Figure 2 tPLH tPHL Propagation Delay Ea to Output 18 18 27 27 ns Figure 1 VCC = 5.0 50V CL = 15 pF AC WAVEFORMS VIN VOUT 1.3 V 1.3 V VIN tPHL tPLH 1.3 V 1.3 V VOUT Figure 1 1.3 V 1.3 V tPHL tPLH 1.3 V 1.3 V Figure 2 FAST AND LS TTL DATA 5-3 SN54/74LS156 GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit VCC Supply Voltage 54 74 4.5 4.75 5.0 5.0 5.5 5.25 V TA Operating Ambient Temperature Range 54 74 – 55 0 25 25 125 70 °C VOH Output Voltage — High 54, 74 5.5 V IOL Output Current — Low 54 74 4.0 8.0 mA DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits S b l Symbol P Parameter VIH Input HIGH Voltage VIL Input LOW Voltage VIK Input Clamp Diode Voltage IOH Output HIGH Current VOL Output LOW Voltage IIH Input HIGH Current IIL Input LOW Current ICC Power Supply Current Min Typ Max U i Unit V Guaranteed Input HIGH Voltage for All Inputs V Guaranteed Input p LOW Voltage g for All Inputs – 1.5 V VCC = MIN, IIN = – 18 mA 100 µA VCC = MIN, VOH = MAX 2.0 54 0.7 74 0.8 – 0.65 54, 74 T Test C Conditions di i VCC = VCC MIN, VIN = VIL or VIH per Truth Table 54, 74 0.25 0.4 V IOL = 4.0 mA 74 0.35 0.5 V IOL = 8.0 mA 20 µA VCC = MAX, VIN = 2.7 V 0.1 mA VCC = MAX, VIN = 7.0 V – 0.4 mA VCC = MAX, VIN = 0.4 V 10 mA VCC = MAX AC CHARACTERISTICS (TA = 25°C) Limits Typ Max U i Unit tPLH tPHL S b l Symbol Propagation Delay Address, Ea or Eb to Output P Parameter 25 34 40 51 ns Figure 1 tPLH tPHL Propagation Delay Address to Output 31 34 46 51 ns Figure 2 tPLH tPHL Propagation Delay Ea to Output 32 32 48 48 ns Figure 1 Min T Test C Conditions di i 50V VCC = 5.0 CL = 15 pF RL = 2.0 kΩ AC WAVEFORMS VIN VOUT 1.3 V 1.3 V VIN tPHL tPLH 1.3 V 1.3 V VOUT Figure 1 1.3 V 1.3 V tPHL tPLH 1.3 V 1.3 V Figure 2 FAST AND LS TTL DATA 5-4