SN54/74LS170 4 x 4 REGISTER FILE OPEN-COLLECTOR The TTL / MSI SN54 / 74LS170 is a high-speed, low-power 4 x 4 Register File organized as four words by four bits. Separate read and write inputs, both address and enable, allow simultaneous read and write operation. Open-collector outputs make it possible to connect up to 128 outputs in a wired-AND configuration to increase the word capacity up to 512 words. Any number of these devices can be operated in parallel to generate an n-bit length. The SN54 / 74LS670 provides a similar function to this device but it features 3-state outputs. • • • • • Simultaneous Read/ Write Operation Expandable to 512 Words of n-Bits Typical Access Time of 20 ns Low Leakage Open-Collector Outputs for Expansion Typical Power Dissipation of 125 mW 4 x 4 REGISTER FILE OPEN-COLLECTOR LOW POWER SCHOTTKY J SUFFIX CERAMIC CASE 620-09 16 1 N SUFFIX PLASTIC CASE 648-08 CONNECTION DIAGRAM DIP (TOP VIEW) VCC 16 D1 15 WA 14 WB 13 EW 12 ER 11 Q1 10 16 Q2 9 1 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 1 D2 2 D3 3 D4 4 RB 5 RA 6 Q4 7 Q3 PIN NAMES 8 GND 1 ORDERING INFORMATION SN54LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC LOADING (Note a) HIGH D1 – D4 WA, WB EW RA, RB ER Q1 – Q4 D SUFFIX SOIC CASE 751B-03 16 Data Inputs Write Address Inputs Write Enable (Active LOW) Input Read Address Inputs Read Enable (Active LOW) Input Outputs (Note b) 0.5 U.L. 0.5 U.L. 1.0 U.L. 0.5 U.L. 1.0 U.L. Open-Collector LOGIC SYMBOL LOW 0.25 U.L. 0.25 U.L. 0.5 U.L. 0.25 U.L. 0.5 U.L. 5 (2.5) U.L. NOTES: a. 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW. b. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74) b. Temperature Ranges. The Output HIGH drive must be supplied by an external resistor to VCC. 12 14 13 5 4 WA EW WB RA RB ER 11 15 1 2 3 D1 D2 D3 D4 Q1 Q2 Q3 Q4 10 9 7 6 VCC = PIN 16 GND = PIN 8 FAST AND LS TTL DATA 5-1 SN54/74LS170 LOGIC DIAGRAM 3 12 D2 D3 D4 2 D1 1 15 EW 13 WB WA 14 G D G Q G G Q Q G D D G G D G G D G Q D WORD 1 Q G Q D WORD 0 D Q Q Q Q RB D G D Q Q D G G Q D G D D WORD 2 Q D WORD 3 G Q D Q 4 11 ER RA 5 6 VCC = PIN 16 GND = PIN 8 = PIN NUMBERS 9 7 Q4 Q3 FAST AND LS TTL DATA 5-2 Q2 10 Q1 SN54/74LS170 WRITE FUNCTION TABLE (SEE NOTES A, B, AND C) WRITE INPUTS READ FUNCTION TABLE (SEE NOTES A AND D) WORD READ INPUTS OUTPUTS WB WA EW 0 1 2 3 RB RA ER Q1 Q2 Q3 Q4 L L H H X L H L H X L L L L H Q=D Q0 Q0 Q0 Q0 Q0 Q=D Q0 Q0 Q0 Q0 Q0 Q=D Q0 Q0 Q0 Q0 Q0 Q=D Q0 L L H H X L H L H X L L L L H W0B1 W1B1 W2B1 W3B1 H W0B2 W1B2 W2B2 W3B2 H W0B3 W1B3 W2B3 W3B3 H W0B4 W1B4 W2B4 W3B4 H NOTES: A. H = HIGH Level. L = LOW Level, X = Irrelevant. NOTES: B. (Q = D) = The four selected internal flip-flop outputs will assume the states applied to the four external data inputs. NOTES: C. Q0 = the level of Q before the indicated input conditions were established. NOTES: D. W0B1 = The first bit of word 0, etc. GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit VCC Supply Voltage 54 74 4.5 4.75 5.0 5.0 5.5 5.25 V TA Operating Ambient Temperature Range 54 74 – 55 0 25 25 125 70 °C VOH Output Voltage — High 54, 74 5.5 V IOL Output Current — Low 54 74 4.0 8.0 mA DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol Min Parameter VIH Input HIGH Voltage VIL Input LOW Voltage VIK Input Clamp Diode Voltage IOH Output HIGH Current VOL Output LOW Voltage IIH Input HIGH Current Any D, R, W ER, EW Typ – 0.65 Power Supply Current V Guaranteed Input LOW Voltage for All Inputs – 1.5 V VCC = MIN, IIN = – 18 mA 100 µA VCC = MIN, VOH = MAX VCC = VCC MIN, VIN = VIL or VIH per Truth Table 54, 74 0.25 0.4 V IOL = 4.0 mA 74 0.35 0.5 V IOL = 8.0 mA 20 40 µA VCC = MAX, VIN = 2.4 V mA VCC = MAX, VIN = 7.0 V – 0.4 – 0.8 mA VCC = MAX, VIN = 0.4 V 40 mA VCC = MAX Any D, R, W ER, EW ICC Guaranteed Input HIGH Voltage for All Inputs 0.8 54, 74 Test Conditions V 0.7 74 Input LOW Current Any D, R, W ER, EW Unit 2.0 54 IIL Max 0.1 0.2 FAST AND LS TTL DATA 5-3 SN54/74LS170 AC CHARACTERISTICS (TA = 25°C) Limits Typ Max Unit tPLH tPHL Symbol Propagation Delay, NegativeGoing ER to Q Outputs Parameter 20 20 30 30 ns Figure 1 tPLH tPHL Propagation Delay, RA or RB to Q Outputs 25 24 40 40 ns Figure 2 tPLH tPHL Propagation Delay, NegativeGoing EW to Q Outputs 30 26 45 40 ns Figure 1 tPLH tPHL Propagation Delay, Data Inputs to Q Outputs 30 22 45 35 ns Figure 1 Max Unit Min Test Conditions VCC = 5.0 V CL = 15 pF RL = 2.0 kΩ AC SETUP REQUIREMENTS (TA = 25°C) Limits Symbol Parameter Min Typ tW Pulse Width, ER, EW 25 ns ts Setup Time, Data to EW 10 ns ts Setup Time, WA, WB to EW 15 ns th Hold Time, Data to EW 15 ns th Hold Time, WA, WB to EW 5.0 ns tLATCH Latch Time 25 ns Test Conditions VCC = 5.0 V RL = 2.0 kΩ VOLTAGE WAVEFORMS WRITE-SELECT INPUT WA or WB DATA INPUT D1, D2, D3 or D4 WRITE-ENABLE INPUT EW Vref 3V Vref tsu(W) Vref tw Vref 0V th(W) 3V Vref th(D) tsu(D) Vref 3V Vref DATA INPUT D1, D2, D3 or D4 0V tPLH tPHL Vref Vref 3V Vref 0V 3V WRITE-ENABLE INPUT EW 0V tPLH Vref tPLH VOH OUTPUT Q1, Q2, Q3 or Q4 VOL Figure 1 Vref tPHL tPLH Vref Vref 5-4 0V 3V 0V Figure 2 FAST AND LS TTL DATA 0V VOH VOL 3V Vref tPHL Vref tPHL Vref 3V Vref tW OUTPUT Q1, Q2, Q3 or Q4 0V 3V OUTPUT Q1, Q2, Q3 or Q4 0V Vref READ-ENABLE INPUT ER 3V Vref WRITE-ENABLE INPUT EW 0V tlatch READ-SELECT INPUT RA or RB DATA INPUT D1, D2, D3 or D4