SiP41101 New Product Vishay Siliconix Half-Bridge N-Channel MOSFET Driver With Break-Before-Make FEATURES D D D D D D D APPLICATIONS 5-V Gate Drive Undervoltage Lockout Sub 1- Gate Drivers Internal Bootstrap Diode Drive MOSFETs In 4.5- to 30-V Systems Switching Frequency: 250 kHz to 1 MHz Synchronous Enable/Disable Option D D D D D D Multi-Phase DC/DC High Current Synchronous Buck Converters High Frequency Synchronous Buck Converters Asynchronous-to-Synchronous Adaptations Mobile Computer DC/DC Converters Desktop Computer DC/DC Converters DESCRIPTION The SiP41101 is a high speed half-bridge driver, with make-before-break, for use in high frequency, high current multiphase dc-to-dc power supplies for supply voltages as high as 30 V. It is designed to operate at frequencies up to 1 MHz. The high-side driver is bootstrapped to allow driving an n-channel high-side MOSFET. The bootstrap diode is internal. The output drivers provide currents up to 4 A, allowing use of low rDS(on) power MOSFETs. MOSFETs. The SD control pin is provided to enable the drivers. A Synchronous Enable control pin is provided to disable the the low-side or synchronous MOSFET to maximize efficiency under low output current conditions. The SiP41101 is available in a 16-pin TSSOP package for operation over the industrial temperature range of -40 to 85_C. The SiP41101 comes with internal break-before-make circuitry to prevent shoot-through current in the external TYPICAL APPLICATION DIAGRAM +5 to 30 V +5 V VDD BOOT OUTH IN Controller SiP41101 SH SYNC_EN VOUT SD OUTL GND GND Document Number: 72377 S-31578—Rev. A, 11-Aug-03 SL GND www.vishay.com 1 SiP41101 Vishay Siliconix New Product ABSOLUTE MAXIMUM RATINGS (ALL VOLTAGES REFERENCED TO GND = 0 V) VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to VDD + 0.3 V VSH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V VBOOT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VSH + 7 V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 to 150_C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125_C Power Dissipationa TSSOP-16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 925 mW Thermal Impedance (JA)a TSSOP-16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135_C/W Notes a. Device mounted with all leads soldered or welded to PC board. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. RECOMMENDED OPERATING RANGE (ALL VOLTAGES REFERENCED TO GND = 0 V) VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5 V to 5.5 V CBOOT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 nF to 1 F VBOOT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5 V to 30 V Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 to 85_C SPECIFICATIONSa Limits Test Conditions Unless Specified p Parameter Symbol VDD = 4.5 to 5.5 V, VBOOT = 4.5 to 30 V, TA = -40 to 85_C Mina Typb Maxa Unit 5.5 V Power Supplies Supply Voltage Supply Current Quiescent Current VDD 4.5 IDD fIN = 300 kHz, SD = H, Sync_en = H see Figure 1 25 40 mA IDDQ IN = L, SD = H, Sync_en = H, No Load 1.4 2.5 A VBBM VDD = 5.5 V 2.5 Reference Voltage Break-Before-Make V Logic Inputs — IN, Sync En, SD Input High VIH Input Low VIL 2.5 1.0 V Undervoltage Lockout VDD Undervoltage Undervoltage Hysteresis VUVL VDD Rising VHYST 2.5 3.6 4.4 V 400 mV 0.65 V Bootstrap Diode Forward Voltage VF IF = 10 mA MOSFET Drivers High Side Drive Currentc High-Side Low Side Drive Currentc Low-Side High Side Driver Impedance High-Side Low Side Driver Impedance Low-Side www.vishay.com 2 IPKH(source) IPKH(sink) IPKL(source) IPKL(sink) RDH(source) RDH(sink) RDL(source) RDL(sink) VBOOT - VSH = 4.5 4 5 V, V VOUTH-V VSA=2.25V =2 25V VDD = 4.5 4 5 V, V VOUTL=2.25V =2 25V VDD = 4.5 4 5 V, V SH = GND VDD = 4.5 45V 3.0 3.0 A 4.1 4.1 0.75 1.3 0.75 1.3 0.55 1.1 0.55 1.1 Document Number: 72377 S-31578—Rev. A, 11-Aug-03 SiP41101 Vishay Siliconix New Product SPECIFICATIONSa Limits Test Conditions Unless Specified Parameter Mina Typb Symbol VDD = 4.5 to 5.5 V, VBOOT = 4.5 to 30 V, TA = -40 to 85_C High-Side Rise Timec trH 10% - 90% 15 High-Side Fall Timec tfH 90% - 10% 15 Maxa Unit MOSFET Drivers td(off)H High Side Propagation Delayc High-Side Low-Side Rise Timec Low-Side Fall Timec 5 trL 10% - 90% 25 tfL 90% - 10% 15 td(off)L Low Side Propagation Delayc Low-Side 25 50% - 50% tH-L 10 50% - 50% tL-H ns 25 Notes a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum (-40_ to 85_C). b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. c. Guaranteed by design. TIMING WAVEFORMS IN OUTH OUTL td(off)H td(off)L tH-L tL-H TEST SETUP VDD VDD BOOT 1 OUTH 2 nF IN VDD SH SYNC_EN SD OUTL 5 nF GND SL GND Figure 1. Document Number: 72377 S-31578—Rev. A, 11-Aug-03 www.vishay.com 3 SiP41101 Vishay Siliconix New Product PIN CONFIGURATION, ORDERING INFORMATION, AND TRUTH TABLE SiP41101 (TSSOP-16) IN 1 16 VDD GND 2 15 NC SYNC_EN 3 14 VDD Part Number Temperature Range Marking SiP41101DQ-T1 -40 to 85_C 41101 SD 4 13 NC SL 5 12 BOOT OUTL 6 11 NC NC 7 10 NC OUTH SH 9 8 ORDERING INFORMATION Eval Kit Temperature Range SiP41101DB -40 to 85_C Top View TRUTH TABLE SD SYNC_EN H H H H H L H L IN OUTH OUTL L L H H H L L L L L H H L X X L L PIN DESCRIPTION Pin www.vishay.com 4 Name Function 1 IN 2 GND Input signal to the MOSFET drivers 3 SYNC_EN 4 SD Shutdown 5 SL Connection to source of low-side MOSFET Ground Synchronous MOSFET enable 6 OUTL 7, 8, 11, 13, 15 NC Synchronous or low-side MOSFET gate drive No Connect 9 SH Connection to source of high-side MOSFET 10 OUTH Control or high-side MOSFET gate drive 12 BOOT Connection for the bootstrap capacitor 14, 16 VDD +5-V supply Document Number: 72377 S-31578—Rev. A, 11-Aug-03 SiP41101 Vishay Siliconix New Product FUNCTIONAL BLOCK DIAGRAM VDD BOOT OUTH Levelshift SH SD Undervoltage + - VBBM VDD IN OUTL Sync EN GND SL Figure 2. DETAILED OPERATION Break-Before-Make Function Under Voltage Lockout Function The SiP41101 has an internal break-before-make function to ensure that both high-side and low-side MOSFETs are not turned on at the same time. The high-side drive (OUTH) will not turn on until the low-side gate drive voltage (measured at the OUTL pin) is less than VBBM, thus ensuring that the low-side MOSFET is turned off. The low-side drive (OUTL) will not turn on until the voltage at the MOSFET half-bridge output (measured at the SL pin) is less than VBBM, thus ensuring that the high-side MOSFET is turned The SiP41101 has an internal under-voltage lockout feature to prevent driving the MOSFET gates when the supply voltage (at VDD) is less than the under-voltage lockout specification (VUVL). This prevents the output MOSFETs from being turned on without sufficient gate voltage to ensure they are fully on. There is hysteresis included in this feature to prevent lockout from cycling on and off. TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) IDD Supply Current vs. Frequency 100 Rise and Fall Time vs. CLOAD 50 Rise and Fall times (ns) 40 Current (mA) 50 20 tr(OUTL) 30 tr(OUTH) 20 tf(OUTL) 10 10 tf(OUTH) 0 100 200 500 Frequency (kHz) Document Number: 72377 S-31578—Rev. A, 11-Aug-03 1000 0.3 1 3 10 Load Capacitance (nF) www.vishay.com 5 SiP41101 Vishay Siliconix New Product TYPICAL WAVEFORMS VIN Rising vs. SH VIN Falling vs. SH VIN, 2V/div VIN, 2V/div SH, 5V/div SH, 5V/div 25 ns/div 25 ns/div VIN Rising vs. OUTH and OUTL VIN Falling vs. OUTH and OUTL VIN, 2V/div VIN, 2V/div OUTH, 10V/div OUTH, 10V/div OUTL, 5V/div OUTL, 5V/div 25 ns/div 25ns/div SD vs. OUTL Sync EN vs. OUTL SD, 2V/div Sync EN, 2V/div OUTL, 5V/div 400 ns/div www.vishay.com 6 OUTL, 2V/div 50ns/div Document Number: 72377 S-31578—Rev. A, 11-Aug-03