CAT6095 Digital Output Temperature Sensor FEATURES DESCRIPTION JEDEC JC42.4 Compliant Temperature Sensor Temperature Range: - 40°C to 125°C Supply Range: 3.3 V ± 10% I2C /SMBus Interface Schmitt Triggers and Noise Suppression Filters on SCL and SDA Inputs Low Power CMOS Technology RoHS-compliant 2 x 3 x 0.75 mm TDFN package The CAT6095 is a JEDEC JC42.4 compliant Temperature Sensor designed for general purpose temperature measurements requiring a digital output. The CAT6095 measures temperature at least 10 times every second. Temperature readings can be retrieved by the host via the serial interface, and are compared to high, low and critical trigger limits stored into internal registers. Over or under limit conditions ¯¯¯¯¯¯ pin. can be signaled on the open-drain EVENT The CAT6095 is packaged in space saving TDFN package with exposed backside die attach pads (DAP). The exposed DAP reduces overall thermal resistance, thus providing faster response to thermal changes when compared to SOIC, TSSOP or SOT packages. For Ordering Information details, see page 17. PIN CONFIGURATION FUNCTIONAL SYMBOL TDFN (VP2) A0 1 8 VCC A1 2 7 EVENT A2 3 6 SCL VSS 4 5 SDA VCC SCL A2, A1, A0 Note: For the location of Pin 1, please consult the corresponding package drawing. SDA SCL ¯¯¯¯¯¯ EVENT VCC VSS DAP EVENT SDA PIN FUNCTIONS Name A0, A1, A2 CAT6095 VSS Description Device Address Input Serial Data Input/Output Serial Clock Input Open-drain Event Output Power Supply Ground Backside exposed DAP at VSS © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice 1 Doc. No. MD-1124 Rev. D CAT6095 ABSOLUTE MAXIMUM RATINGS(1) Parameter Operating Temperature Storage Temperature Voltage on any pin with respect to Ground(2) Rating -45 to +130 -65 to +150 -0.5 to +6.5 Unit °C °C V Test Conditions/Comments Max Unit 75°C ≤ TA ≤ 95°C, active range ± 1.0 °C 40°C ≤ TA ≤ 125°C, monitor range ± 2.0 °C -20°C ≤ TA ≤ 125°C, sensing range ± 3.0 °C 12 Bits 0.0625 °C 100 ms 92 ºC/W Max Unit 200 μA TS shut-down; no bus activity 5 μA Pin at GND or VCC 5 μA TEMPERATURE CHARACTERISTICS VCC = 3.3 V ± 10%, TA = −40°C to +125°C, unless otherwise specified Parameter Temperature Reading Error Class B, JC42.4 compliant ADC Resolution Temperature Resolution Temperature Conversion Time (3) Thermal Resistance θJA Junction-to-Ambient (Still Air) D.C. OPERATING CHARACTERISTICS VCC = 3.3 V ± 10%, TA = −40°C to +125°C, unless otherwise specified Symbol ICC ISHDN Parameter Supply Current Test Conditions/Comments Min TS active IL I/O Pin Leakage Current VIL Input Low Voltage -0.5 0.3 x VCC V VIH Input High Voltage 0.7 x VCC VCC + 0.5 V VOL Output Low Voltage 0.4 V IOL = 3 mA, VCC > 2.5 V Notes: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. (2) The DC input voltage on any pin should not be lower than -0.5 V or higher than VCC + 0.5 V. The A0 pin can be raised to a HV level compatible with the use of a DDR3 SPD device sharing the bus with the TS. SCL and SDA inputs can be raised to the maximum limit, irrespective of VCC. (3) Power Dissipation is defined as PJ = (TJ − TA)/θJA, where TJ is the junction temperature and TA is the ambient temperature. The thermal resistance value refers to the case of a package being used on a standard 2-layer PCB. Doc. No. MD-1124 Rev. D 2 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice CAT6095 A.C. CHARACTERISTICS(1) VCC = 3.3 V ± 10%, TA = −40°C to +125°C Symbol (2) FSCL tHIGH tLOW (2) tTIMEOUT (3) tR (3) tF (4) tSU:DAT tHD:DAT (3) tSU:STA tHD:STA tSU:STO tBUF Ti (5) tPU Parameter Clock Frequency High Period of SCL Clock Low Period of SCL Clock SMBus SCL Clock Low Timeout SDA and SCL Rise Time SDA and SCL Fall Time Data Setup Time Data Hold Time (for Input Data) Data Hold Time (for Output Data) START Condition Setup Time START Condition Hold Time STOP Condition Setup Time Bus Free Time Between STOP and START Noise Pulse Filtered at SCL and SDA Inputs Power-up Delay to Valid Temperature Recording Min 10 600 1300 25 Max 400 Units kHz ns ns ms ns ns ns ns ns ns ns ns ns ns ms 35 300 300 100 0 300 600 600 600 1300 900 100 100 PIN CAPACITANCE VCC = 3.3 V, TA = 25°C, f = 1 MHz Symbol CIN Parameter Test Conditions/Comments ¯¯¯¯¯¯ Pin Capacitance SDA, EVENT Input Capacitance (other pins) Min Max Unit VIN = 0 8 pF VIN = 0 6 pF Notes: (1) Timing reference points are set at 30%, respectively 70% of VCC, as illustrated in Figure 4. Bus loading must be such as to allow meeting the VIL, VOL as well as the various timing limits. (2) The TS interface will reset itself and will release the SDA line if the SCL line stays low beyond the tTIMEOUT limit. The time-out count is started (and then re-started) on every negative transition of SCL in the time interval between START and STOP. 2 (3) In a “Wired-OR” system (such as I C or SMBus), SDA rise time is determined by bus loading. Since each bus pull-down device must be able to sink the (external) bus pull-up current (in order to meet the VIL and/or VOL limits), it follows that SDA fall time is inherently faster than SDA rise time. SDA rise time can exceed the standard recommended tR limit, as long as it does not exceed tLOW - tHD:DAT - tSU:DAT, where tLOW and tHD:DAT are actual values (rather than spec limits). A shorter tHD:DAT leaves more room for a longer SDA tR, allowing for a more capacitive bus or a larger bus pull-up resistor. At the minimum tLOW spec limit of 1300 ns, the maximum tHD:DAT of 900 ns demands a maximum SDA tR of 300 ns. The CAT6095’s maximum tHD:DAT is < 700 ns, thus allowing for an SDA tR of up to 500 ns at minimum tLOW. (4) The minimum tSU:DAT of 100 ns is a limit recommended by standards. The TS will accept a tSU:DAT of 0 ns. (5) The first valid temperature recording can be expected after tPU at nominal supply voltage. © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice 3 Doc. No. MD-1124 Rev. D CAT6095 TYPICAL PERFORMANCE CHARACTERISTICS VCC = 3.3 V, TA = −25°C to +125°C, unless otherwise specified. Standby Current TS Active Current (I²C-bus idle, TS shut-down) 300 5 250 4 200 3 ISHDN (µA) ICC (µA) (I²C-bus idle) 150 100 50 2 1 0 0 -25 0 25 50 75 100 -1 125 -25 0 25 TAMB (ºC) 75 100 125 TAMB (ºC) SDA Output Current ¯¯¯¯¯¯ Output Current EVENT 60.0 100.0 VOL = 0.4 V VOL = 0.6 V 50.0 80.0 IOL_EVENT (mA) IOL_SDA_TS (mA) 50 60.0 40.0 20.0 40.0 30.0 20.0 10.0 0.0 -25 0 25 50 75 100 0.0 125 -25 TAMB (ºC) 0 25 50 75 100 125 TAMB (ºC) A/D Conversion Time Temperature Read-Out Error 80 4 3 70 1 TCONV (ms) ΔT (ºC) 2 Part # 2 0 Part # 1 -1 60 50 40 -2 30 -3 -4 20 -25 0 25 50 75 100 125 -25 TAMB (ºC) Doc. No. MD-1124 Rev. D 0 25 50 75 100 125 TAMB (ºC) 4 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice CAT6095 TYPICAL PERFORMANCE CHARACTERISTICS VCC = 3.3 V, TA = −25°C to +125°C, unless otherwise specified. SMBus SCL Clock Low Timeout TS POR Threshold Voltage 2.50 40 35 tTIMEOUT (ms) VTH (V) 2.30 2.10 1.90 30 25 1.70 20 1.50 -25 0 25 50 75 100 -25 125 TAMB (ºC) © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice 0 25 50 75 100 125 TAMB (ºC) 5 Doc. No. MD-1124 Rev. D CAT6095 PIN DESCRIPTION I2C/SMBUS PROTOCOL SCL: The Serial Clock input pin accepts the Serial Clock generated by the Master (Host). The I2C/SMBus uses two ‘wires’, one for clock (SCL) and one for data (SDA). The two wires are connected to the VCC supply via pull-up resistors. Master and Slave devices connect to the bus via their respective SCL and SDA pins. The transmitting device pulls down the SDA line to ‘transmit’ a ‘0’ and releases it to ‘transmit’ a ‘1’. SDA: The Serial Data I/O pin receives input data and transmits data stored in the internal registers. In transmit mode, this pin is open drain. Data is acquired on the positive edge, and is delivered on the negative edge of SCL. Data transfer may be initiated only when the bus is not busy (see A.C. Characteristics). A0, A1 and A2: The Address pins set the device address. These pins have on-chip pull-down resistors. During data transfer, the SDA line must remain stable while the SCL line is HIGH. An SDA transition while SCL is HIGH will be interpreted as a START or STOP condition (Figure 1). ¯¯¯¯¯¯: The open-drain EVENT ¯¯¯¯¯¯ pin can be EVENT programmed to signal over/under temperature limit conditions. START The START condition precedes all commands. It consists of a HIGH to LOW transition on SDA while SCL is HIGH. The START acts as a ‘wake-up’ call to all Slaves. Absent a START, a Slave will not respond to commands. POWER-ON RESET (POR) The CAT6095 incorporates Power-On Reset (POR) circuitry which monitors the supply voltage, and then resets (initializes) the internal state machine below (above) a POR trigger level of approximately 2.0 V, i.e. well below the minimum recommended VCC value. STOP The STOP condition completes all commands. It consists of a LOW to HIGH transition on SDA while SCL is HIGH. The STOP tells the Slave that no more data will be written to or read from the Slave. The TS powers-up into conversion mode. The internal state machine will operate properly above the POR trigger level, but valid temperature readings can be expected only after the first conversion cycle started and completed at nominal supply voltage. DEVICE ADDRESSING The Master initiates data transfer by creating a START condition on the bus. The Master then broadcasts an 8-bit serial Slave address. The first 4 bits of the Slave address (the preamble) select the Temperature Sensor (TS preamble = 0011) as shown in Figure 2. The next 3 bits, A2, A1 and A0, select one of 8 possible TS ¯¯, specifies whether a Slave devices. The last bit, R/W Read (1) or Write (0) operation is being performed DEVICE INTERFACE The CAT6095 supports I2C and SMBus data transmission protocols. These protocols describe serial communication between transmitters and receivers sharing a 2-wire data bus. Data flow is controlled by a Master device, which generates the serial clock and the START and STOP conditions. The CAT6095 acts as a Slave device. Master and Slave alternate as transmitter and receiver. Up to 8 CAT6095 devices may be present on the bus simultaneously, and can be individually addressed by matching the logic state of the address inputs A0, A1, and A2. Doc. No. MD-1124 Rev. D ACKNOWLEDGE A matching Slave address is acknowledged (ACK) by the Slave by pulling down the SDA line during the 9th clock cycle (Figure 3). After that, the Slave will acknowledge all data bytes sent to the bus by the Master. When t he Slave is the transmitter, the Master will in turn acknowledge data bytes in the 9th clock cycle. The Slave will stop transmitting after the Master does not respond with acknowledge (NoACK) and then issues a STOP. Bus timing is illustrated in Figure 4. 6 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice CAT6095 Figure 1. Start/Stop Timing SDA SCL START BIT STOP BIT Figure 2. Slave Address Bits TEMPERATURE SENSOR 0 0 1 1 PREAMBLE A2 A1 A0 R/W DEVICE ADDRESS Figure 3. Acknowledge Timing SCL FROM MASTER 1 8 9 DATA OUTPUT FROM TRANSMITTER DATA OUTPUT FROM RECEIVER START ACKNOWLEDGE Figure 4. Bus Timing tF SCL 70% tLOW tHD:STA tR 70% 30% 70% 30% tSU:STA SDA tHIGH 70% tHD:DAT tSU:DAT 70% 30% 70% 30% tSU:STO 70% 70% 30% tBUF © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice 7 Doc. No. MD-1124 Rev. D CAT6095 WRITE OPERATIONS Temperature Sensor Register Write To write data to a TS register the Master creates a START condition on the bus, and then sends out the ¯¯ bit set to appropriate Slave address (with the R/W ‘0’), followed by an address byte and two data bytes. The matching Slave will acknowledge the Slave address, TS register address and the TS register data (Figure 5). The Master then ends the session by creating a STOP condition on the bus. The STOP completes the TS register update. Note that all registers in the TS are ‘volatile’ meaning any data contained in them is lost when power is removed from the chip. READ OPERATIONS Immediate Read Upon power-up, the Temperature Sensor (TS) address counter is initialized to 00h. The TS address counter will thus point to the Capability Register. This address counter may be updated by subsequent operations. A CAT6095 presented with a Slave address ¯¯ position will acknowledge containing a ‘1’ in the R/W the Slave address and will then start transmitting data being pointed at by the current TS register address counter. The Master stops this transmission by responding with NoACK, followed by a STOP (Figure 6). Selective Read The Read operation can be started at an address different from the one stored in the address counter, by preceeding the Immediate Read sequence with a ‘data less’ Write operation. The Master sends out a START, Slave address and address byte, but rather than following up with data (as in a Write operation), the Master then issues another START and continuous with an Immediate Read sequence (Figure 7). Doc. No. MD-1124 Rev. D 8 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice CAT6095 Figure 5. Temperature Sensor Register Write BUS ACTIVITY: S T A R T MASTER SLAVE ADDRESS REGISTER ADDRESS DATA (MSB) S T O P DATA (LSB) S SDA LINE P A C K SLAVE A C K A C K A C K Figure 6. Immediate Read BUS ACTIVITY: MASTER SDA LINE S T A R T N OS AT CO KP A C K SLAVE ADDRESS S P A C K SLAVE DATA (MSB) DATA (LSB) Figure 7. Selective Read BUS ACTIVITY: MASTER SDA LINE S T A R T S T A R T REGISTER ADDRESS SLAVE ADDRESS S SLAVE © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice SLAVE ADDRESS N OS AT CO KP A C K S A C K P A C K A C K 9 DATA (MSB) DATA (LSB) Doc. No. MD-1124 Rev. D CAT6095 TEMPERATURE SENSOR OPERATION REGISTERS The CAT6095 temperature sensor (TS) combines a Proportional to Absolute Temperature (PTAT) sensor with a ∑-Δ modulator, yielding a 12 bit plus sign digital temperature representation. The CAT6095 contains eight 16-bit wide registers allocated to TS functions, as shown in Table 1. Upon power-up, the internal address counter points to the capability register. The TS runs on an internal clock, and starts a new conversion cycle at least every 100 ms. The result of the most recent conversion is stored in the Temperature Data Register (TDR), and remains there following a TS Shut-Down. Reading from the TDR does not interfere with the conversion cycle. Capability Register (User Read Only) This register lists the capabilities of the TS, as detailed in the corresponding bit map. Configuration Register (Read/Write) This register controls the various operating modes of the TS, as detailed in the corresponding bit map. The value stored in the TDR is compared against limits stored in the High Limit Register (HLR), the Low Limit Register (LLR) and/or Critical Temperature Register (CTR). If the measured value is outside the alarm limits or above the critical limit, ¯¯¯¯¯¯ pin may be asserted. The EVENT ¯¯¯¯¯¯ then the EVENT output function is programmable, via the Configuration Register for interrupt mode, comparator mode and polarity. Temperature Trip Point Registers (Read/Write) The CAT6095 features 3 temperature limit registers, the HLR, LLR and CLR mentioned earlier. The temperature value recorded in the TDR is compared to the various limit values, and the result is used to ¯¯¯¯¯¯ pin. To avoid undesirable EVENT ¯¯¯¯¯¯ activate the EVENT pin activity, this pin is automatically disabled at powerup to allow the host to initialize the limit registers and the converter to complete the first conversion cycle under nominal supply conditions. Data format is two’s complement with the LSB representing 0.25°C, as detailed in the corresponding bit maps . The temperature limit registers can be Read or Written by the host, via the serial interface. At poweron, all the (writable) internal registers default to 0x0000, and should therefore be initialized by the ¯¯¯¯¯¯ output starts host to the desired values.The EVENT out disabled (corresponding to polarity active low); thus preventing irrelevant event bus activity before the limit registers are initialized. While the TS is enabled (not shut-down), event conditions are normally generated by a change in measured temperature as recorded in the TDR, but limit changes can also trigger events as soon as the new limit creates an event condition, i.e. asynchronously with the temperature sampling activity. Temperature Data Register (User Read Only) This register stores the measured temperature, as well as trip status information. B15, B14 and B13 are the trip status bits, representing the relationship between measured temperature and the 3 limit values; these bits are not affected by EVENT status or by Configuration register settings. Measured temperature is represented by bits B12 to B0. Data format is two’s complement, where B12 represents the sign, B11 represents 128°C, etc. and B0 represents 0.0625°C. In order to minimize the thermal resistance between sensor and PCB, it is recommended that the exposed backside die attach pad (DAP) be soldered to the PCB ground plane. Manufacturer ID Register (Read Only) The manufacturer ID assigned by the PCI-SIG trade organization to the CAT6095 device is 0x1B09. Device ID and Revision Register (Read Only) This register contains manufacturer specific device ID and device revision information. Doc. No. MD-1124 Rev. D 10 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice CAT6095 Table 1. Temperature Sensor Registers Register Address Register Name Power-On Default Read/Write 0x00 Capability Register 0x005F Read 0x01 Configuration Register 0x0000 Read/Write 0x02 High Limit Register 0x0000 Read/Write 0x03 Low Limit Register 0x0000 Read/Write 0x04 Critical Limit Register 0x0000 Read/Write 0x05 Temperature Data Register Undefined Read 0x06 Manufacturer ID Register 0x1B09 Read 0x07 Device ID/Revision Register 0x0812 Read – – 0x08 – Reserved CAPABILITY REGISTER B15 B14 B13 B12 B11 B10 B9 B8 RFU RFU RFU RFU RFU RFU RFU RFU B7 B6 B5 B4 B3 B2 B1 B0 EVSD TMOUT RFU RANGE ACC EVENT Bit B15:B8, B5 B7(1) B6 B4:B3 TRES [1:0] Description Reserved for future use; can not be written; should be ignored; will typically read as 0 0: Configuration register bit 4 is frozen upon setting Configuration register bit 8 (i.e. a TS shut¯¯¯¯¯¯ output) down freezes the EVENT 1: Configuration register bit 4 is cleared upon setting Configuration register bit 8 (i.e. a TS ¯¯¯¯¯¯ output) shut-down de-asserts the EVENT 0: The TS implements SMBus time-out within the range 10 to 60 ms 1: The TS implements SMBus time-out within the range 25 to 35 ms 00: LSB = 0.50°C (9 bit resolution) 01: LSB = 0.25°C (10 bit) 10: LSB = 0.125°C (11 bit) 11: LSB = 0.0625°C (12 bit) B2 0: Positive Temperature Only 1: Positive and Negative Temperature B1 0: ±2°C over the active range and ±3°C over the operating range (Class C) 1: ±1°C over the active range and ±2°C over the monitor range (Class B) B0 0: Critical Temperature only 1: Alarm and Critical Temperature Notes: (1) Configuration Register bit 4 can be cleared (but not set) after Configuration Register bit 8 is set, by writing a “1” to Configuration Register ¯¯¯¯¯¯ output can be de-asserted during TS shut-down periods) bit 5 (i.e. the EVENT © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice 11 Doc. No. MD-1124 Rev. D CAT6095 CONFIGURATION REGISTER B15 B14 B13 B12 B11 RFU RFU RFU RFU RFU B7 B6 B5 B4 B3 CLEAR EVENT_STS TCRIT_LOCK EVENT_LOCK Bit B15:B11 B10:B9(1) B8 (5) B7 (4) B6 (4) B5 (3) B4 (2) B3 (1) B2 (7) B1 (1), (6) B0 (1) B10 B9 HYST [1:0] B2 B8 SHDN B1 EVENT_CTRL TCRIT_ONLY EVENT_POL B0 EVENT_MODE Description Reserved for future use ; can not be written ; should be ignored; will typically read as 0 00: Disable hysteresis 01: Set hysteresis at 1.5°C 10: Set hysteresis at 3°C 11: Set hysteresis at 6°C 0: Thermal Sensor is enabled; temperature readings are updated at sampling rate 1: Thermal Sensor is shut down; temperature reading is frozen to value recorded before SHDN 0: Critical trip register can be updated 1: Critical trip register cannot be modified; this bit can be cleared only at POR 0: Alarm trip registers can be updated 1: Alarm trip registers cannot be modified; this bit can be cleared only at POR 0: Always reads as 0 (self-clearing) 1: Writing a 1 to this position clears an event recording in interrupt mode only 0: EVENT output pin is not being asserted 1: EVENT output pin is being asserted 0: EVENT output disabled; polarity dependent: open-drain for bit B1 = 0 and grounded for B1 = 1 1: EVENT output enabled 0: event condition triggered by alarm or critical temperature limit crossing 1: event condition triggered by critical temperature limit crossing only 0: EVENT output active low 1: EVENT output active high 0: Comparator mode 1: Interrupt mode Notes: (1) Can not be altered (set or cleared) as long as either one of the two lock bits, B6 or B7 is set. ¯¯¯¯¯¯ pin, i.e. it is under the control of B3. (2) This bit is a polarity independent ‘software’ copy of the EVENT (3) Writing a ‘1’ to this bit clears an event condition in Interrupt mode, but has no effect in comparator mode. When read, this bit always returns 0. Once the measured temperature exceeds the critical limit, setting this bit has no effect (see Figure 5). (4) Cleared at power-on reset (POR). Once set, this bit can only be cleared by a POR condition. (5) The TS powers up into active mode, i.e. this bit is cleared at power-on reset (POR). When the TS is shut down the ADC is disabled and the temperature reading is frozen to the most recently recorded value. The TS can not be shut down (B8 can not be set) as long as either one of the two lock bits, B6 or B7 is set. However, the bit can be cleared at any time. ¯¯¯¯¯¯ output is “open-drain” and requires an external pull-up resistor for either polarity. The “natural” polarity is “active low”, as it (6) The EVENT allows “wired-or” operation on the EVENT bus. (7) Can not be set as long as lock bit B6 is set. Doc. No. MD-1124 Rev. D 12 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice CAT6095 HIGH LIMIT REGISTER B15 B14 B13 B12 B11 B10 B9 B8 0 0 0 Sign 128°C 64°C 32°C 16°C B7 B6 B5 B4 B3 B2 B1 B0 8°C 4°C 2°C 1°C 0.5°C 0.25°C 0 0 LOW LIMIT REGISTER B15 B14 B13 B12 B11 B10 B9 B8 0 0 0 Sign 128°C 64°C 32°C 16°C B7 B6 B5 B4 B3 B2 B1 B0 8°C 4°C 2°C 1°C 0.5°C 0.25°C 0 0 TCRIT LIMIT REGISTER B15 B14 B13 B12 B11 B10 B9 B8 0 0 0 Sign 128°C 64°C 32°C 16°C B7 B6 B5 B4 B3 B2 B1 B0 8°C 4°C 2°C 1°C 0.5°C 0.25°C 0 0 TEMPERATURE DATA REGISTER B15 B14 B13 B12 B11 B10 B9 B8 TCRIT HIGH LOW Sign 128°C 64°C 32°C 16°C B7 B6 B5 B4 B3 B2 B1 B0 8°C 4°C 2°C 1°C 0.5°C 0.25°C* 0.125°C* 0.0625°C* * When applicable (as defined by Capability bit TRES), unsupported bits will read as 0 Bit Description B15 0: Temperature is below the TCRIT limit 1: Temperature is equal to or above the TCRIT limit B14 0: Temperature is equal to or below the High limit 1: Temperature is above the High limit B13 0: Temperature is equal to or above the Low limit 1: Temperature is below the Low limit © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice 13 Doc. No. MD-1124 Rev. D CAT6095 REGISTER DATA FORMAT EVENT PIN FUNCTIONALITY The values used in the temperature data register and the 3 temperature trip point registers are expressed in two’s complement format. The measured temperature value is expressed with 12-bit resolution, while the 3 trip temperature limits are set with 10-bit resolution. The total temperature range is arbitrarily defined as 256°C, thus yielding an LSB of 0.0625°C for the measured temperature and 0.25°C for the 3 limit values. Bit B12 in all temperature registers represents the sign, with a ‘0’ indicating a positive, and a ‘1’ a negative value. In two’s complement format, negative values are obtained by complementing their positive counterpart and adding a ‘1’, so that the sum of opposite signed numbers, but of equal absolute value, adds up to zero. ¯¯¯¯¯¯ output reacts to temperature changes as The EVENT illustrated in Figure 8, and according to the operating mode defined by the Configuration register. ¯¯¯¯¯¯ output will be In Interrupt Mode, the enabled EVENT asserted every time the temperature crosses one of the alarm window limits, and can be de-asserted by writing a ‘1’ to the clear event bit (B5) in the configuration register. When the temperature exceeds the critical limit, the event remains asserted as long as the temperature stays above the critical limit and can not be cleared. ¯¯¯¯¯¯ output is asserted In Comparator Mode, the EVENT outside the alarm window limits, while in Critical ¯¯¯¯¯¯ is asserted only above Temperature Mode, EVENT the critical limit. The exact trip limits are determined by the 3 temperature limit settings and the hystersis offsets, as illustrated in Figure 9. Note that trailing ‘0’ bits, are ‘0’ irrespective of polarity. Therefore the don’t care bits (B1 and B0) in the 10-bit resolution temperature limit registers, are always ‘0’. 12-Bit Temperature Data Format Binary (B12 to B0) 1 1 1 1 0 0 0 0 0 1100 1001 0000 1100 1110 0000 1110 0111 0000 1111 1111 1111 0000 0000 0000 0000 0000 0001 0001 1001 0000 0011 0010 0000 0111 1101 0000 Doc. No. MD-1124 Rev. D Hex Temperature 1C90 1CE0 1E70 1FFF 000 001 190 320 7D0 −55°C −50°C −25°C −0.0625°C 0°C +0.0625°C +25°C +50°C +125°C Following a TS shut-down request, the converter is stopped and the most recently recorded temperature ¯¯¯¯¯¯ output value present in the TDR is frozen; the EVENT will continue to reflect the state immediatelly preceding the shut-down command. Therefore, if the ¯¯¯¯¯¯ output creates an undesirable bus state of the EVENT condition, appropriate action must be taken either before or after shutting down the TS. This may require ¯¯¯¯¯¯ output or clearing the event, disabling the EVENT ¯¯¯¯¯¯ output polarity. perhaps changing the EVENT In normal use, events are triggered by a change in recorded temperature, but the CAT6095 will also respond to limit register changes. Whereas recorded temperature values are updated at sampling rate frequency, limits can be modified at any time. The ¯¯¯¯¯¯ output will react to limit changes as enabled EVENT soon as the respective registers are updated.This feature may be useful during testing. 14 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice CAT6095 Figure 8. Event Detail TEMPERATURE CRITICAL HYSTERESIS AFFECTS THESE TRIP POINTS UPPER ALARM WINDOW LOWER TIME SOFTWARE CLEARS EVENT EVENT IN “INTERRUPT” EVENT IN “COMPARATOR” MODE EVENT IN “CRITICAL TEMP ONLY” MODE 1. EVENT CANNOT BE CLEARED ONCE THE DUT TEMPERATURE IS GREATER THAN THE CRITICAL TEMPERATURE Figure 9. Hysteresis Detail TH TH – HYST TL TL – HYST BELOW WINDOW BIT ABOVE WINDOW BIT © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice 15 Doc. No. MD-1124 Rev. D CAT6095 PACKAGE OUTLINE DRAWING TDFN 8-Pad 2 x 3 x 0.75 mm (VP2) (1)(2) A D e b E2 E PIN#1 IDENTIFICATION A1 PIN#1 INDEX AREA TOP VIEW D2 SIDE VIEW L BOTTOM VIEW A2 A3 FRONT VIEW For current Tape and Reel information, download the PDF file from: http://www.catsemi.com/documents/tapeandreel.pdf. Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC standard MO-229. Doc. No. MD-1124 Rev. D 16 © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice CAT6095 EXAMPLE OF ORDERING INFORMATION (1) - (4) Prefix CAT Device # Suffix 6095 Optional Group ID VP2 Package VP2: TDFN Product Number 6095 –G T4 Tape & Reel T: Tape & Reel 4: 4,000/Reel Lead Finish G: NiPdAu TOP MARKING TDFN 8-Pad 2 x 3 x 0.75 mm H M 1 2 3 4 5 6 7 8 Top Mark Legend (Position) 3 4 1 2 Mark “HM” 5 6 Mark for traceability. 7 Production Year: A 1 digit mark. 8 Production Month: A 1 digit mark (1 - 9, A, B, C). Notes: (1) All packages are RoHS-compliant (Lead-free, Halogen-free). (2) The standard lead finish is NiPdAu. (3) The device used in the above example is a CAT6095VP2-GT4 (i.e. TDFN, NiPdAu lead finish, Tape & Reel, 4,000/Reel). (4) For additional package and temperature options, please contact your nearest ON Semiconductor Sales office. © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice 17 Doc. No. MD-1124 Rev. D CAT6095 REVISION HISTORY Date 16-Sep-08 Revision A Description Initial Release 3-Nov-08 B Change logo and fine print to ON Semiconductor 01-May-09 C Update Features, Description, Parametric Tables, TS functionality description, Add Top Marking, Ordering Information, Align to JC42.4 TS3000 Standard terminology 05-Oct-09 D Update Parametric Tables, Add Typical Performance Characteristics, Update Package Outline Drawing, Update Example of Ordering Information ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: [email protected] Doc. No. MD-1124 Rev. D N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center: Phone: 81-3-5773-3850 18 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice