ONSEMI NCP51460SN33T1G

NCP51460
20mA Micropower
Precision Voltage
Reference
The NCP51460 is a high performance, low power precision voltage
reference. This device combines very high accuracy, low power
dissipation and small package size. It can supply output current up to
20 mA at a 3.3 V fixed output voltage with excellent line and load
regulation characteristics making it ideal for precision regulator
applications. It is designed to be stable with or without an output
capacitor. The protective features include Short Circuit and Reverse
Input Voltage Protection. The NCP51460 is packaged in a 3−lead
surface mount SOT−23 package.
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SOT−23
SN1 SUFFIX
CASE 318
Features
•
•
•
•
•
•
•
•
•
Fixed Output Voltage 3.3 V
VOUT Accuracy 1% over 0 to +100°C
Wide Input Voltage Range up to 28 V
Low Quiescent Current
Low Noise
Reverse Input Voltage Protection
Stable Without an Output Capacitor
Available in 3 leads SOT−23 Package
Pb−Free Package is Available
MARKING DIAGRAM
AND PIN ASSIGNMENT
GND
3
46AMG
G
1
VIN
(Top View)
Typical Applications
•
•
•
•
2
VOUT
Handheld Instruments
Precision Regulators
Data Acquisition Systems
High Accuracy Micropower Supplies
46A
= Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
VIN = 4.2 to 28 V
VOUT
VIN
CIN
0.1 mF
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
VOUT
NCP51460
(3.3 V fixed)
3.3 V
GND
Figure 1. Typical Application Schematics
© Semiconductor Components Industries, LLC, 2010
April, 2010 − Rev. 0
1
Publication Order Number:
NCP51460/D
NCP51460
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Table 1. PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
Description
1
VIN
2
VOUT
Regulated Output Voltage
3
GND
Power Supply Ground; Device Substrate
Positive Input Voltage
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Input Voltage (Note 1)
VIN
30
V
Reverse Input Voltage
VIN
−15
Output Short Circuit Duration, TA = 25°C
VIN ≤ 27 V
VIN > 27 V
tSC
Maximum Junction Temperature
V
sec
R
50
TJ(max)
150
°C
Storage Temperature
TSTG
−65 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
Latch up Current Maximum Rating: ±150 mA per JEDEC standard: JESD78.
Table 3. THERMAL CHARACTERISTICS
Rating
Symbol
Value
Unit
RqJA
246
°C/W
Thermal Characteristics, SOT−23 package
Thermal Resistance, Junction−to−Ambient (Note 3)
3. Soldered on 1 oz 50 mm2 FR4 copper area.
Table 4. OPERATING RANGES
Rating
Symbol
Min
Max
Unit
Operating Input Voltage (Note 4)
VIN
VOUT + 0.9
28
V
Operating Ambient Temperature Range
TA
0
100
°C
4. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
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NCP51460
Table 5. ELECTRICAL CHARACTERISTICS (VIN = VOUT + 2.5 V, IOUT = 0, CIN = 0.1 mF, COUT = 0 mF; For typical values TA =
25°C, for min/max values 0°C ≤ TA ≤ 100°C unless otherwise noted.) (Note 5).
Parameter
Test Conditions
Output Voltage
Symbol
Min
Typ
Max
Unit
VOUT
3.267
(−1%)
3.3
3.333
(+1%)
V
Line Regulation
VIN = VOUT + 0.9 V to VOUT + 2.5 V
VIN = VOUT + 2.5 V to VOUT + 20 V
RegLINE
−
−
150
65
500
130
ppm/V
Load Regulation
IOUT = 0 to 100 mA
IOUT = 0 to 10 mA
IOUT = 0 to 20 mA
RegLOAD
−
−
−
1100
150
120
4000
300
300
ppm/mA
Dropout Voltage
Measured at VOUT − 2%
IOUT = 0 mA
IOUT = 10 mA
−
−
0.65
0.9
0.9
1.4
Quiescent Current
IOUT = 0 mA, TA = 25°C
IOUT = 0 mA, 0°C ≤ TA ≤ 100°C
IQ
−
−
140
200
220
mA
Output Short Circuit Current
VOUT = 0 V, TA = 25°C
ISC
−
80
−
mA
Reverse Leakage
VIN = − 15 V, TA = 25°C
ILEAK
−
0.1
10
mA
Output Noise Voltage (Note 6)
f = 0.1 Hz to 10 Hz
f = 10 Hz to 1 kHz
VN
−
12
18
−
mVPP
mVrms
Output Voltage Temperature
Coefficient
0°C ≤ TA ≤ 100°C
TCO
−
18
−
ppm/°C
VDO
V
5. Performance guaranteed over the indicated operating temperature range by design and/or characterization, tested at TJ = TA = 25°C. Low
duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
6. The noise spectral density from 0.1 Hz to 10 Hz is measured, then the integral output noise voltage in this range is calculated. Finally the
peak to peak noise is calculated as 5x integral output noise.
3.332
3.327 IOUT = 0 mA
3.322 COUT = 0 mF
3.317
3.312
VIN = VOUT + 20 V
3.307
3.302
3.297
3.292
VIN = VOUT + 0.9 V
VIN = VOUT + 2.5 V
3.287
3.282
3.277
3.272
3.267
−40 −20 0
20
40
60
80
100 120
VOUT, OUTPUT VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
TYPICAL CHARACTERISTICS
140
3.332
3.327 VIN = VOUT + 2.5 V
3.322 COUT = 0 mF
3.317
3.312
IOUT = 0 mA
3.307
3.302
3.297
3.292
IOUT = 10 mA
3.287
3.282
IOUT = 20 mA
3.277
3.272
3.267
−40 −20 0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 2. Output Voltage vs. Temperature
Figure 3. Output Voltage vs. Temperature
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NCP51460
TYPICAL CHARACTERISTICS
1.2
3.332
3.327 VIN = 5.8 V
3.322 IOUT = 0 mA
3.317 COUT = 0 mF
3.312
Unit 1
3.307
3.302
3.297
3.292
3.287
Unit 3 Unit 2
3.282
3.277
3.272
3.267
−40 −20 0
20
VOUT, OUTPUT VOLTAGE (V)
VDROP, DROPOUT VOLTAGE (V)
Three Typical Parts
40
60
80
100
120
IO = 5 mA
0.6
IO = 1 mA
IO = 0 mA
0.5
−20
0
20
40
60
80
100
Figure 4. Output Voltage vs. Temperature
Figure 5. Dropout Voltage
REGLINE, LINE REGULATION (mV)
TJ = 125°C
250
200
TJ = 25°C
150
100
TJ = −25°C
50
0
2
4
6
8
10
12
14
16
18
120 140
20
VIN = 5.8 to 18.3 V
3.5
3.0
2.5
VIN = 5.8 to 15.3 V
2.0
VIN = 5.8 to 12.3 V
1.5
1.0
VIN = 5.8 to 9.3 V
−20
0
20
40
60
80
100
TJ, JUNCTION TEMPERATURE (°C)
Figure 6. Quiescent Current
Figure 7. Line Regulation
IOUT = 0 to
15 mA
6
4
2
IOUT = 0 to
1 mA
0
120 140
160
IOUT = 0 to IOUT = 0 to
20 mA
10 mA
−20
VIN = 5.8 to 23.3 V
4.0
VIN, INPUT VOLTAGE (V)
VIN = 5.8 V
COUT = 0 mF
0
−40
IOUT = 0 mA
4.5 C
OUT = 0 mF
0.5
−40
LOADREG, LOAD REGULATION (mV)
IQ, QUIESCENT CURRENT (mA)
REGLOAD, LOAD REGULATION (mV)
0.7
TJ, JUNCTION TEMPERATURE (°C)
300
8
IO = 10 mA
0.8
TJ, JUNCTION TEMPERATURE (°C)
IOUT = 0 mA
COUT = 0 mF
350
10
IO = 20 mA
0.9
5.0
400
12
1.0
0.4
−40
140
450
0
COUT = 0 mF
1.1
20
40
60
IOUT = 0 to
5 mA
80
100
120
140
140
VIN = 5.8 V
COUT = 0 mF
IOUT = 0 mA
down to −2 mA
120
100
80
IOUT = 0 mA
down to −1.2 mA
60
IOUT = 0 mA
40 down to −1.50 mA
IOUT = 0 mA
down to −500 mA
20
0
−40
−20
0
20
40
60
80
100
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 8. Load Regulation Sourcing
Figure 9. Load Regulation Sinking
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120 140
NCP51460
140
130
COUT = 0 mF
VIN = 28 V
120
110
VIN = 15 V
100
90
VIN = 5.8 V
80
70
60
50
40
−40
−20
0
20
40
60
80
100
120
140
TJ, JUNCTION TEMPERATURE (°C)
PSRR, POWER SUPPLY REJECTION RATIO (dB)
ISC, SHORT CIRCUIT CURRENT (mA)
TYPICAL CHARACTERISTICS
80
70
60
IOUT = 20 mA
50
40
30
IOUT = 0 mA
20
VIN = 5.8 VDC $50 mVAC
COUT = 0 mF
TJ = 25°C
10
0
10
100
60
IOUT = 1 mA
50
40
IOUT = 0 mA
30
20
10
0
10
VIN = 5.8 VDC $50 mVAC
COUT = 0.1 mF MLCC
TJ = 25°C
100
IOUT = 20 mA
1000
10k
f, FREQUENCY
100k
1M
PSRR, POWER SUPPLY REJECTION RATIO (dB)
PSRR, POWER SUPPLY REJECTION RATIO (dB)
70
PSRR, POWER SUPPLY REJECTION RATIO (dB)
PSRR, POWER SUPPLY REJECTION RATIO (dB)
IOUT = 10 mA, COUT = 0 mF, TA = 25°C
fRIPPLE = 100 Hz
60
fRIPPLE = 10 kHz
50
40
30
fRIPPLE = 100 kHz
20
fRIPPLE = 1 MHz
10
0
4
5
6
7
8
9
10
VIN, INPUT VOLTAGE (V)
11
100k
1M
100
90
80
IOUT = 1 mA
70
60
50
IOUT = 0 mA
40
30
VIN = 5.8 VDC $50 mVAC
COUT = 1 mF MLCC
TJ = 25°C
20
10
0
10
100
IOUT = 20 mA
1000
10k
f, FREQUENCY
100k
1M
Figure 13. Power Supply Rejection Ratio
Cout = 1 mF
90
70
10k
Figure 11. Power Supply Rejection Ratio
Cout = 0 mF
Figure 12. Power Supply Rejection Ratio
Cout = 0.1 mF
80
1000
f, FREQUENCY
Figure 10. Short Circuit Current
80
IOUT = 1 mA
12
80
IOUT = 20 mA, COUT = 0 mF, TA = 25°C
70
fRIPPLE = 100 Hz
60
fRIPPLE = 10 kHz
50
40
30
fRIPPLE = 100 kHz
20
fRIPPLE = 1 MHz
10
0
4
Figure 14. Power Supply Rejection Ratio vs.
Input Voltage
5
6
7
8
9
10
VIN, INPUT VOLTAGE (V)
11
Figure 15. Power Supply Rejection Ratio vs.
Input Voltage
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12
NCP51460
TYPICAL CHARACTERISTICS
2.0
VIN = 5.8 V
IOUT = 0 mA,
COUT = 0 mF,
TA = 25°C
2.2
2.0
1.8
1.6
1.4
1.2
1.0
Vn, OUTPUT NOISE (mVrms/rtHz)
Vn, OUTPUT NOISE (mVrms/rtHz)
2.4
0.1 Hz − 10 Hz Integral Noise:
Vn = 2.28 mVrms
0.8
0.6
0.4
0.2
0.0
0.1
1
1.0
10 Hz − 1 kHz Integral Noise:
Vn = 18 mVrms
0.8
0.6
0.4
0.2
10
100
1000
10k
100k
1M
Figure 16. Output Voltage Noise 0.1 Hz − 10 Hz
Figure 17. Output Voltage Noise 10 Hz − 1 MHz
VIN = 5.8 V
IOUT = 0 mA to 20 mA,
COUT = 0.1 mF MLCC,
TA = 25°C
1.6
1.4
Vn, OUTPUT NOISE (mVrms/rtHz)
1.8
IOUT = 0 mA
1.2
1.0
IOUT = 1 mA
0.8
0.6
0.4
IOUT = 10 mA
0.2
IOUT = 20 mA
10
100
1000
10k
100k
1M
3.0
2.8
VIN = 5.8 V
2.6
IOUT = 0 mA to 20 mA,
2.4
COUT = 1 mF MLCC,
2.2
TA = 25°C
IOUT = 1 mA
2.0
1.8
1.6
IOUT = 10 mA
1.4
IOUT = 0 mA
1.2
1.0
0.8
0.6
0.4
IOUT = 20 mA
0.2
0.0
10
100
1000
10k
100k
1M
f, FREQUENCY (Hz)
f, FREQUENCY (Hz)
Figure 18. Output Voltage Noise 10 Hz − 1 MHz
COUT = 0.1 mF
Figure 19. Output Voltage Noise 10 Hz − 1 MHz
COUT = 1 mF
VIN = 5.8 V
IOUT = 0 mA to 20 mA,
COUT = 10 mF MLCC,
TA = 25°C
1.8
1.6
1.4
1.2
IOUT = 10 mA
IOUT = 20 mA
IOUT = 10 mA
VOUT, OUTPUT VOLTAGE
(50 mV/DIV)
Vn, OUTPUT NOISE (mVrms/rtHz)
1.2
f, FREQUENCY (Hz)
2.0
Vn, OUTPUT NOISE (mVrms/rtHz)
1.4
f, FREQUENCY (Hz)
2.0
0.0
1.6
0.0
10
VIN = 5.8 V
IOUT = 0 mA to 20 mA,
COUT = 0 mF,
TA = 25°C
1.8
IOUT = 1 mA
1.0
0.8
0.6
0.4
IOUT = 0 mA
0.2
0.0
10
100
1000
10k
100k
IOUT = 0 mA
3.45
3.40
3.35
3.30
3.25
3.20
3.15
3.10
VOUT
1M
VIN = 0 to 5.8 V, COUT = 0 mF,
trise_fall = 10 mA/1 ms, TA = 25°C
TIME (20 ms/DIV)
f, FREQUENCY (Hz)
Figure 20. Output Voltage Noise 10 Hz − 1 MHz
COUT = 10 mF
Figure 21. Load Transient Response 0 − 10 mA
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NCP51460
IOUT = 0 mA
4.1
3.9
3.7
3.5
3.3
3.1
2.9
2.7
VOUT, OUTPUT VOLTAGE (100 mV/DIV)
VOUT, OUTPUT VOLTAGE (200 mV/DIV)
TYPICAL CHARACTERISTICS
IOUT = 20 mA
VOUT
VIN = 5.8 V, COUT = 0 mF,
trise_fall = 20 mA/1 ms, TA = 25°C
3.4
3.3
2.2
VOUT
3.4
3.3
3.2
VOUT
COUT = 0.1 mF MLCC
3.4
3.3
3.2
VOUT
COUT = 1 mF MLCC
3.4
3.3
2.2
VOUT
COUT = 4.7 mF MLCC
COUT = 0 mF
VIN = 5.8 V, TA = 25°C,
trise_fall = 10 mA/1 ms
IOUT = 0 mA
IOUT = 10 mA
TIME (50 ms/DIV)
TIME (10 ms/DIV)
Figure 23. Load Transient Responses COUT = 0
− 4.7 mF
VOUT, OUTPUT
VIN, INPUT VOLTAGE
VOLTAGE (1 V/DIV)
(2 V/DIV)
VOUT, OUTPUT
VOLTAGE (1 V/DIV)
VIN, INPUT VOLTAGE
(2 V/DIV)
Figure 22. Load Transient Response 0 − 20 mA
6
4
2
0
VIN
3
2
1
0
VOUT
VIN = 0 V to 5.8 V,
CIN = 0 mF, COUT = 0 mF,
IOUT = 0 mA, TA = 25°C,
trise = 20 ms
6
4
2
0
3
2
1
VIN
VIN = 5.8 V to 0 V,
COUT = CIN = 0 mF,
IOUT = 0 mA, TA = 25°C,
trise_fall = 25 ms
0
VOUT
TIME (10 ms/DIV)
TIME (50 ms/DIV)
Figure 24. Turn−On
Figure 25. Turn−Off
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NCP51460
APPLICATIONS INFORMATION
VOUT, OUTPUT VOLTAGE (50 mV/DIV)
Input Decoupling Capacitor (CIN)
It is recommended to connect a 0.1 mF Ceramic capacitor
between VIN and GND pin of the device. This capacitor will
provide a low impedance path for unwanted AC signals or
noise present on the input voltage. The input capacitor will
also limit the influence of input trace inductances and Power
Supply resistance during sudden load current changes.
Higher capacitances will improve the Power Supply
Rejection Ratio and line transient response.
Output Decoupling Capacitor (COUT)
The NCP51460 was designed to be stable without an
additional output capacitor. Without the output capacitor the
VOUT settling times during Reference Turn−on or Turn−off
can be as short as 20 ms (Refer to Figure 24 and 25). The
Load Transient Responses without COUT (Figure 21 and 22)
show good stability of NCP51460 even for fast output
current changes from 0 mA to full load. If smaller VOUT
deviations during load current changes are required, it is
possible to add some external capacitance as shown on
Figure 26.
VIN = 4.2 to 28 V
CIN
0.1 mF
VIN
VOUT
NCP51460
(3.3 V fixed)
GND
3.35
3.30
COUT = 1 mF MLCC + 2 W
VOUT
3.25
3.35
3.30
COUT = 1 mF MLCC
3.25
IOUT = 10 mA
VIN = 5.8 V, TA = 25°C,
trise_fall = 10 mA/1 ms
IOUT = 0 mA
TIME (50 ms/DIV)
Figure 27.
The device was determined to be stable with Aluminum,
Ceramic and Tantalum Capacitors with capacitances
ranging from 0 to 100 mF at TA = 25°C.
Turn−On Response
It is possible to achieve very fast Turn−On time when fast
VIN ramp is applied to NCP51460 input as shown on
Figure 24. However if the Input Voltage change from 0 V to
nominal Input Voltage is extremely fast, the Output Voltage
settling time will increase. Figure 28 below shows this effect
when the Input Voltage change is 5.8 V / 2 ms.
VOUT
3.3 V
COUT
VOUT, OUTPUT
VIN, INPUT VOLTAGE
VOLTAGE (1 V/DIV)
(2 V/DIV)
Figure 26. Output Capacitor Connection
The COUT will reduce the overshoot and undershoot but
will increase the settling time and can introduce some
ringing of the output voltage during fast load transients.
NCP51460 behavior for different values of ceramic X7R
output capacitors is depicted on Figure 23.
The Output Voltage ringing and settling times can be
reduced by using some additional resistance in series with
the Ceramic Capacitor or by using Tantalum or Aluminum
Capacitors which have higher ESR values. Figure 27 below
shows the Load Transient improvement after adding an
additional 2 W series resistor to a 1 mF Ceramics Capacitor.
6
4
2
0
VIN
3
2
1
0
VOUT
VIN = 0 V to 5.8 V,
CIN = 0 mF,
COUT = 0 mF,
IOUT = 0 mA, TA = 25°C,
trise = 45 ms
TIME (10 ms/DIV)
Figure 28.
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NCP51460
can be slightly different and should be confirmed in the end
application.
No external voltage source should be connected directly
to the VOUT pin of NCP51460 regulator. If the external
source forces the output voltage to be greater than the
nominal output voltage level, the current will start to flow
from the Voltage Source to the VOUT pin. This current will
increase with the Output Voltage applied and can cause
damage to the device if VOUT > 10 V Typ. at 25°C
(Figure 30).
24
IO, CURRENT INTO VOUT PIN (mA)
VOUT, OUTPUT
VIN, INPUT VOLTAGE
VOLTAGE (1 V/DIV)
(2 V/DIV)
A 0.1 mF or larger input capacitor will help to decrease the
dv/dt of the input voltage and improve stability during large
load current changes.
During the Turn−On for certain conditions the output
voltage can exhibit an overshoot. The amount of the
overshoot strongly depends on application conditions i.e.
input voltage level, slew rate, input and output capacitors,
and output current. The maximum value of the overshoot
isn’t guaranteed for this device.
The figure below shows an example of the Turn−On
overshoot.
6
4
2
0
3
2
1
0
VIN = 0 V to 6 V,
COUT = 0 mF,
IOUT = 1 mA, TA = 25°C,
trise = 30 ms
COUT = 0 mF,
TA = 25°C
20
16
12
8
4
0
3
4
5
6
7
8
9
10
VOUT, OUTPUT VOLTAGE (V)
TIME (10 ms/DIV)
Figure 30.
Figure 29.
Output Noise
Turn−Off Response
The NCP51460 Output Voltage Noise strongly depends
on the output capacitor value and load value. This is caused
by the fact that the bandwidth of the Reference is inversely
proportional to the capacitor value and directly proportional
to the output current. The Reference bandwidth directly
determines the point where the output voltage noise starts to
fall. This can be observed at the Figure 31 below.
Vn, OUTPUT VOLTAGE NOISE (mVrms/rtHz)
The Turn−Off response time is directly proportional to the
output capacitor value and inversely proportional to the load
value.
The NCP51460 device does not have any dedicated
internal circuitry to discharge the output capacitor when the
input voltage is turned−off or disconnected. This is why
when large output capacitors are used and very small output
current is drawn, it can take a considerable amount of time
to discharge the capacitor. If short turn−off times are
required, the output capacitor value should be minimized i.e.
with no output capacitor a 20 ms turn−off time can be
achieved.
Protection Features
The NCP51460 device is equipped with reverse input
voltage protection which will help to protect the device
when Input voltage polarity is reversed. In this circumstance
the Input current will be minimized to typically less than
0.1 mA.
The short circuit protection will protect the device under
the condition that the VOUT is suddenly shorted to ground.
The short circuit protection will work properly up to an Input
Voltage of 27 V at TA = 25°C. Depending on the PCB trace
width and thickness, air flow and process spread this value
2.2
VIN = 5.8 V
IOUT = 0 mA,
1.8 C
OUT = 0 − 10 mF MLCC,
1.6
TA = 25°C
2.0
1.4
COUT = 0.1 mF
COUT = 1.0 mF
1.2
1.0
0.8
COUT = 10 mF
0.6
COUT = 0 mF
0.4
0.2
0.0
10
100
1000
10k
f, FREQUENCY (Hz)
Figure 31.
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9
100k
1M
NCP51460
The power dissipated by the NCP51460 can be calculated
from the following equations:
The peaks which are visible on the noise spectrum are
reflecting the stability of the NCP51460 device. In the
comparison in Figure 31 it can be noticed that 0 mF and
10 mF cases represents the best stability.
P D [ V IN(I Q@I OUT) ) I OUT(V IN * V OUT) (eq. 2)
or
Thermal Characteristics
As power dissipation in the NCP51460 increases, it may
become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. The board material
and the ambient temperature affect the rate of junction
temperature rise for the part. The maximum power
dissipation the NCP51460 can handle is given by:
P D(MAX) +
[T J(MAX) * T A]
V IN(MAX) [
I OUT ) I Q
(eq. 3)
PCB Layout Recommendations
VIN and GND printed circuit board traces should be as
wide as possible. When the impedance of these traces is
high, there is a chance to pick up noise and cause the
regulator to malfunction. Place external components,
especially the output capacitor, as close as possible to the
NCP51460, and make traces as short as possible.
(eq. 1)
R qJA
P D(MAX) ) (V OUT @ I OUT)
Since TJ is not recommended to exceed 100°C (TJ(MAX)),
then the NCP51460 can dissipate up to 305 mW when the
ambient temperature (TA) is 25°C.
ORDERING INFORMATION
Device
NCP51460SN33T1G
Marking Code
Package
Shipping†
46A
SOT−23
(Pb−Free)
3,000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specification Brochure, BRD8011/D.
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10
NCP51460
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AP
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
D
SEE VIEW C
3
HE
E
DIM
A
A1
b
c
D
E
e
L
L1
HE
q
c
1
2
e
b
0.25
q
A
L
A1
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
0°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.13
0.18
2.90
3.04
1.30
1.40
1.90
2.04
0.20
0.30
0.54
0.69
2.40
2.64
−−−
10 °
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
0°
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
10°
L1
VIEW C
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
SCALE 10:1
0.8
0.031
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCP51460/D