ONSEMI NCP700MN180R2G

NCP700
Ultra Low Noise, High PSSR,
BiCMOS RF LDO Regulator
Noise sensitive RF applications such as Power Amplifiers in cell
phones and precision instrumentation require very clean power supplies.
The NCP700 is 150 mA LDO that provides the engineer with a very
stable, accurate voltage with ultra low noise and very high Power
Supply Rejection Ratio (PSRR) suitable for RF applications. In order
to optimize performance for battery operated portable applications,
the NCP700 employs an advanced BiCMOS process to combine the
benefits of low noise and superior dynamic performance of bipolar
elements with very low ground current consumption at full loads
offered by CMOS.
Furthermore, in order to provide a small footprint for
space-conscious applications, the NCP700 is stable with small, low
value capacitors and is available in a very small DFN6 2x2.2 package.
•Output Voltage Options:
- 1.8 V, 2.8 V, 3.0 V
- Contact Factory for Other Voltage Options
•Ultra Low Noise (typ 15 mVrms)
•Very High PSRR (typ 80 dB)
•Stable with Ceramic Output Capacitors as low as 1 mF
•Low Sleep Mode Current (max 1 mA)
•Active Discharge Circuit
•Current Limit Protection
•Thermal Shutdown Protection
•These are Pb-Free Devices
6 PIN DFN
MN SUFFIX
CASE 506BA
XXMG
G
PIN ASSIGNMENT
CE
1
6
Cnoise
GND
2
5
GND
Vin
3
4
Vout
(Top View)
ORDERING INFORMATION
•Cellular Telephones (Power Amplifier)
•Noise Sensitive Applications (Video, Audio)
•Analog Power Supplies
•PDAs / Palmtops / Organizers / GPS
•Battery Supplied Devices
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
Vout
Vin
Cin
ÉÉ
ÉÉ
1
(Note: Microdot may be in either location)
Typical Applications
Vout
NCP700
CE
Cnoise
GND
MARKING
DIAGRAM
6
XX = Specific Device Code
M = Date Code
G
= Pb-Free Package
Features
Vin
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Cnoise
Cout
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2007
May, 2007 - Rev. 0
1
Publication Order Number:
NCP700/D
NCP700
Vin
Vout
-
Current
Limit
+
Bandgap
Reference
Voltage
Cnoise
CE
Active
Discharge
GND
Figure 2. Simplified Block Diagram
PIN FUNCTION DESCRIPTION
DFN6 2x2.2
Pin No.
Pin Name
Description
1
CE
Chip Enable: This pin allows on/off control of the regulator. To disable the device, connect to
GND. If this function is not in use, connect to Vin. Internal 5 MW Pull Down resistor is connected
between CE and GND.
2, 5, EPAD
GND
3
Vin
Power Supply Input Voltage
4
Vout
Regulated Output Voltage
6
Cnoise
Power Supply Ground (Pins are fused for the DFN package)
Noise reduction pin. (Connect 100 nF or 10 nF capacitor to GND)
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Input Voltage (Note 1)
Vin
-0.3 V to 6 V
V
Chip Enable Voltage
VCE
-0.3 V to Vin +0.3 V
V
VCnoise
-0.3 V to Vin +0.3 V
V
Noise Reduction Voltage
Output Voltage
Maximum Junction Temperature (Note 1)
Storage Temperature Range
Vout
-0.3 V to Vin +0.3 V
V
TJ(max)
150
°C
TSTG
-55 to 150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
NOTE: This device series contains ESD protection and exceeds the following tests:
Human Body Model 2000 V per MIL-STD-883, Method 3015
Machine Model Method 200 V
THERMAL CHARACTERISTICS
Rating
Symbol
Package Thermal Resistance, DFN6: (Note 1)
Junction-to-Lead (pin 2)
Junction-to-Ambient
RθJA
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area
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2
Value
Unit
°C/W
37
120
NCP700
ELECTRICAL CHARACTERISTICS
(Vin = Vout + 1.0 V, VCE = 1.2 V, Cin = 0.1 mF, Cout = 1 mF, Cnoise = 10 nF, TA = -40°C to 85°C, unless otherwise specified (Note 2))
Test Conditions
Characteristic
Symbol
Min
Typ
Max
Unit
Vin
2.5
-
5.5
V
REGULATOR OUTPUT
Input Voltage
Output Voltage (Note 3)
1.8 V
2.8 V
3.0 V
Vin = (Vout +1.0 V) to 5.5 V
Iout = 1 mA
Vout
1.764
2.744
2.940
-
1.836
2.856
3.060
V
Output Voltage (Note 3)
1.8 V
2.8 V
3.0 V
Vin = (Vout +1.0 V) to 5.5 V
Iout = 1 mA to 150 mA
Vout
1.746
2.716
2.910
-
1.854
2.884
3.090
V
-
80
80
65
-
Power Supply Ripple Rejection
Vin = Vout +1.0 V + 0.5 Vp- p
Iout = 1 mA to 150 mA
f = 120 Hz
Cnoise = 100nF
f = 1 kHz
f = 10 kHz
PSRR
dB
Line Regulation
Vin = (Vout +1.0 V) to 5.5 V, Iout = 1 mA
Regline
-0.2
-
0.2
%/V
Load Regulation
Iout = 1 mA to 150 mA
Regload
-
12
25
mV
Output Noise Voltage
f = 10 Hz to 100 kHz
Iout = 1 mA to 150 mA Cnoise = 100 nF
Cnoise = 10 nF
Vn
-
15
20
-
Output Current Limit
Vout = Vout(nom) – 0.1 V
ILIM
150
310
470
mA
Output Short Circuit Current
Vout = 0 V
ISC
150
320
490
mA
Iout = 150 mA
VDO
-
105
100
155
150
mV
Ground Current
Iout = 1 mA
Iout = 150 mA
IGND
-
70
110
90
220
mA
Disable Current
VCE = 0 V
IDIS
-
0.1
1
mA
Thermal Shutdown Threshold (Note 5)
TSD
-
150
-
°C
Thermal Shutdown Hysteresis (Note 5)
TSH
-
20
-
°C
Vth(CE)
1.2
-
0.4
-
V
RPD(CE)
2.5
5
10
MW
Cnoise = 10 nF
Cnoise = 100 nF
ton
-
0.4
4
-
ms
Iout = 1 mA
Iout = 10 mA
toff
-
800
200
-
ms
Dropout Voltage (Note 4)
2.8 V
3.0 V
mVrms
GENERAL
CHIP ENABLE
Input Threshold
Low
High
Internal Pull-Down Resistance (Note 6)
TIMING
Turn-on Time
Iout = 150 mA
Turn-of f Time
Cnoise = 10 nF/100 nF
2. Performance guaranteed over the indicated operating temperature range by design and/or characterization, production tested at TJ = TA
= 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
3. Contact factory for other voltage options.
4. Measured when the output voltage falls 100 mV below the regulated voltage at Vin = Vout + 1.0 V
If Vout < 2.5 V, then VDO = Vin - Vout at Vin = 2.5 V.
5. Guaranteed by design and characterization.
6. Expected to disable device when CE pin is floating.
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NCP700
TYPICAL CHARACTERISTICS
2.820
1.815
Vout = 1.8 V
Vout, OUTPUT VOLTAGE (V)
Vout, OUTPUT VOLTAGE (V)
1.820
1.810
1.805
Iout = 1 mA
1.800
Iout = 150 mA
1.795
1.790
Vout = 2.8 V
2.810
2.805
Iout = 1 mA
2.800
Iout = 150 mA
2.795
2.790
2.785
1.785
1.780
-40
2.815
-20
0
20
40
60
80
100
2.780
-40
-20
0
20
40
60
80
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 3. Output Voltage vs. Temperature
(Vout = 1.8 V)
Figure 4. Output Voltage vs. Temperature
(Vout = 2.8 V)
3.020
100
4.0
Vout = 3.0 V
Vout, OUTPUT VOLTAGE (V)
Vout, OUTPUT VOLTAGE (V)
TA = 25°C
3.015
3.010
3.005
Iout = 1 mA
3.000
Iout = 150 mA
2.995
2.990
2.985
2.980
-40
3.5
Iout = 1 mA
3.0
Vout = 2.8 V
2.5
2.0
Vout = 1.8 V
1.5
1.0
0.5
0
-20
0
20
40
60
80
0
100
1
TA, AMBIENT TEMPERATURE (°C)
130
180
IGND, GROUND CURRENT (mA)
IGND, GROUND CURRENT (mA)
200
Iout = 150 mA
110
100
90
80
Iout = 1 mA
70
60
50
-20
0
20
40
60
3
4
5
6
Figure 6. Output Voltage vs. Input Voltage
140
120
2
Vin, INPUT VOLTAGE (V)
Figure 5. Output Voltage vs. Temperature
(Vout = 3.0 V)
40
-40
Vout = 3.0 V
80
100
Vout = 3.0 V
TA = 25°C
160
Vout = 2.8 V
140
Iout = 150 mA
120
100
Vout = 1.8 V
80
Iout = 1 mA
60
40
20
0
0
1
2
3
4
5
TA, AMBIENT TEMPERATURE (°C)
Vin, INPUT VOLTAGE (V)
Figure 7. Ground Current vs. Temperature
Figure 8. Ground Current vs. Input Voltage
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4
6
NCP700
TYPICAL CHARACTERISTICS
125
TA = 85°C
VDO, DROPOUT VOLTAGE (mV)
Vout = 2.8 V
115
110
TA = 25°C
105
100
95
TA = -40°C
90
85
80
75
0
25
50
75
100
125
ILIM, CURRENT LIMIT (mA)
110
105
TA = 25°C
100
95
TA = -40°C
90
85
80
75
0
25
50
75
100
125
150
Figure 9. Dropout Voltage vs. Output Current
Figure 10. Dropout Voltage vs. Output Current
320
310
300
290
280
-40
-20
0
20
40
60
80
100
350
340
330
320
310
300
290
-40
-20
0
20
40
60
80
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 11. Current Limit vs. Temperature
Figure 12. Short Circuit Current vs.
Temperature
100
700
0
TA = 25°C
Iout = 150 mA
TA = 25°C
Vn, NOISE DENSITY (nV/√Hz)
-10
-20
-30
PSRR (dB)
TA = 85°C
115
Iout, OUTPUT CURRENT (mA)
330
-40
-50
-60
Cnoise = 10 nF
-80
-90
-100
Vout = 3.0 V
Iout, OUTPUT CURRENT (mA)
340
-70
120
150
ISC, SHORT CIRCUIT CURRENT LIMIT (mA)
VDO, DROPOUT VOLTAGE (mV)
125
120
Cnoise = 100 nF
600
Iout = 150 mA
500
Cnoise = 100 nF
400
300
200
100
0
10
100
1,000
10,000
100,000
10
100
1,000
10,000
100,000
f, FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 13. PSRR vs. Frequency
Figure 14. Noise Density vs. Frequency
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5
NCP700
TYPICAL CHARACTERISTICS
4.2 V
VCE
1 V/div
3.6 V
Vin
500 mV/div
TA = 25°C
Vout = 1.8 V
Iout = 150 mA
Cout = 1 mF
TA = 25°C
Vout
1 V/div
Vin = 4 V
Iout = 150 mA
Cnoise = 0 nF
Vout
10 mV/div
TIME (20 ms/div)
TIME (100 ms/div)
Figure 15. Enable Voltage and Output Voltage
vs. Time (Start-Up)
Figure 16. Line Transient
Iout
100 mA/div
Vout
50 mV/div
Vin = 2.8 V
Vout = 1.8 V
Cout = 1 mF
ESR of OUTPUT CAPACITOR (W)
10
TA = 25°C
Unstable Region
Vout = 3.0 V
1
Vout = 1.8 V
Stable Region
0.1
Cout = 1 mF to 10 mF
0.01
0
25
50
75
100
125
TIME (40 ms/div)
Iout, OUTPUT CURRENT (mA)
Figure 17. Load Transient
Figure 18. Output Capacitor ESR vs. Output
Current
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6
150
NCP700
APPLICATION INFORMATION
General
Output Noise
The NCP700 is a 150 mA (current limited) linear
regulator with a logic input for on/off control for the high
speed turn-off output voltage.
Access to the major contributor of noise within the
integrated circuit is provided as the focus for noise reduction
within the linear regulator system.
The main contributor for noise present on the output pin
Vout is the reference voltage node. This is because any noise
which is generated at this node will be subsequently
amplified through the error amplifier and the PMOS pass
device. Access to the reference voltage node is supplied
directly through the Cnoise pin. Noise can be reduced from
a typical value of 20 mVrms by using 10 nF to 15 mVrms by
using a 100 nF from the Cnoise pin to ground.
A bypass capacitor is recommended for good noise
performance and better load transient response.
Power Up/Down
During power up, the NCP700 maintains a high
impedance output (Vout) until sufficient voltage is present on
Vin to power the internal bandgap reference voltage. When
sufficient voltage is supplied (approx 1.2 V), Vout will start
to turn on (assume CE shorted to Vin), linearly increasing
until the output regulation voltage has been reached.
Active discharge circuitry has been implemented to insure
a fast turn off time. Then CE goes low, the active discharge
transistor turns on creating a fast discharge of the output
voltage. Power to drive this circuitry is drawn from the
output node. This is to maintain the lowest quiescent current
when in the sleep mode (VCE = 0.4 V). This circuitry
subsequently turns off when the output voltage discharges.
Thermal Shutdown
When the die temperature exceeds the Thermal Shutdown
threshold, a Thermal Shutdown (TSD) event is detected and
the output (Vout) is turned off. There is no effect from the
active discharge circuitry. The IC will remain in this state
until the die temperature moves below the shutdown
threshold (150°C typical) minus the hysteresis factor (20°C
typical).
This feature provides protection from a catastrophic
device failure due to accidental overheating. It is not
intended to be used as a substitute for proper heat sinking.
The maximum device power dissipation can be calculated
by:
CE (chip enable)
The enable function is controller by the logic pin CE. The
voltage threshold of this pin is set between 0.4 V and 1.2V.
A voltage lower than 0.4 V guarantees the device is off. A
voltage higher than 1.2 V guarantees the device is on. The
NCP700 enters a sleep mode when in the off state drawing
less than 1 mA of quiescent current.
The device can be used as a simple regulator without use
of the chip enable feature by tying the CE pin to the Vin pin.
PD +
TJ * TA
R qJA
Thermal resistance value versus copper area and package is
shown in Figure 19.
RqJA, THERMAL RESISTANCE
JUNCTION-T O-AMBIENT (°C/W)
380
Current Limit
Output Current is internally limited within the IC to a
minimum of 150 mA. The design is set to a higher value to
allow for variation in processing and the temperature
coefficient of the parameter. The NCP700 will source this
amount of current measured with a voltage 100 mV lower
than the typical operating output voltage.
The specification for short circuit current limit (@ Vout =
0V) is specified at 320 mA (typ). There is no additional
circuitry to lower the current limit at low output voltages.
This number is provided for informational purposes only.
330
280
TSOP-5 (1 oz)
230
TSOP-5 (2 oz)
180
DFN6 2x2.2 (1 oz)
130
DFN6 2x2.2 (2 oz)
80
0
Output Capacitor
100
200
300
400
PCB COPPER AREA
The NCP700 has been designed to work with low ESR
ceramic capacitors. There is no ESR lower limit for stability
for the recommended 1 mF output capacitor. Stable region
for Output capacitor ESR vs Output Current is shown in
Figure18.
500
(mm2)
Figure 19. RqJA vs. PCB Copper Area
(TSOP-5 for comparison only)
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7
600
700
NCP700
ORDERING INFORMATION
Nominal Output
Voltage
Marking
Package
Shipping†
NCP700MN180R2G
1.8 V
LZ
3000 / Tape & Reel
NCP700MN280R2G
2.8 V
LX
DFN6
2x2.2
Pb-Free
NCP700MN300R2G
3.0 V
LY
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
PACKAGE DIMENSIONS
A
B
D
ÉÉ
ÉÉ
ÉÉ
PIN ONE
REFERENCE
2X
0.10 C
6 PIN DFN, 2x2.2, 0.65P
CASE 506BA-01
ISSUE O
E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
DIM
A
A1
b
D
D2
E
E2
e
K
L
L1
TOP VIEW
2X
0.10 C
A
0.10 C
MILLIMETERS
MIN
MAX
0.80
1.00
0.00
0.05
0.20
0.30
2.00 BSC
1.10
1.30
2.20 BSC
0.70
0.90
0.65 BSC
0.20
--0.25
0.35
0.00
0.10
7X
0.08 C
SIDE VIEW
A1
C
SEATING
PLANE
6X
L1
D2
6X
L
e
3
1
E2
K
6
4
BOTTOM VIEW
6X
b
0.10 C A B
0.05 C
NOTE 3
The products described herein (NCP700), may be covered by one or more U.S. patents.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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For additional information, please contact your local
Sales Representative
NCP700/D